Abstract: A mobile communication device includes: an antenna module; a touchscreen for detecting a touching operation thereon; an application processor including an auxiliary display module that accesses information in a portable electronic device and sends the information to the touchscreen for display; a wireless communication unit controlled to retrieve data from the Internet for display on the touchscreen or the portable electronic device, or controlled to display a dialing interface on the touchscreen or the portable electronic device to allow for input of a telephone number; and a satellite navigation unit performing navigation based on information provided by a global positioning system and information in an electronic map database, and displaying navigation information on the touchscreen or the portable electronic device. The application processor activates the wireless communication unit, the satellite navigation unit, or the auxiliary display module according to a signal received from the touchscreen.

Abstract: For decreasing errors within an analog phase-locked loop, an all-digital phase-locked loop (ADPLL) with digital components and digital operations is used. The ADPLL may also be used for direct frequency modulation (DFM). By defining a proportional path gain of an ADPLL by a bandwidth and a reference frequency of the ADPLL, by a TDC gain, a DCO gain, a dividing ratio of a frequency divider, a gain of an amplifier or a combination thereof, the gain of the amplifier may be adjusted so that an optimal loop bandwidth of the ADPLL may be well calibrated. For achieving the aim of entirely digital of the ADPLL, the gains of the TDC and the DCO may be further adjusted in a digital manner.

Abstract: A phase locked loop (PLL) with a loop bandwidth calibration circuit is provided. The mixed-mode PLL comprises an analog phase correction path, a digital frequency correction path, a calibration current source, and a loop bandwidth calibration circuit. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit. The calibration current source is coupled to the LPCU. The loop bandwidth calibration circuit is coupled to a frequency divider and coupled between the input and output of the PLL. The loop bandwidth calibration circuit operates after the calibration current source injects a calibration current into the LPCU.

Abstract: A backlight module control system includes a plurality of backlight sub-modules, a control signals output unit, a voltage converter and a plurality of current control units. The control signals output circuit is for providing a voltage control signal, a current control signal and a plurality of PWM signals; the voltage converter is coupled to the control signals output circuit and the backlight sub-modules, and is for outputting an output voltage to the backlight sub-modules according to the voltage control signal; the current control units are coupled to the backlight sub-modules, respectively, and each current control unit is for determining a current of its corresponding backlight sub-module according to the current control signal, and each current control unit is further utilized for determining whether its corresponding backlight sub-module is enabled or not according to its corresponding PWM signal. In addition, only one backlight module is enabled at a same time.

Abstract: An electronic device bearing seat includes a casing, a hook, a first resilient element, an ejector, a second resilient element, a pivot, a connecting rod and an ejecting button. The casing has a first opening and a second opening. The hook is movably provided in the first opening and includes a first withstanding post and a recess. The first resilient element is disposed between the casing and the hook. The ejector is movably provided in the second opening and is detachably fastened in the recess. The ejector includes a second withstanding post. The second resilient element is disposed between the casing and the ejector. The shaft is disposed in the casing. The connecting rod is rotatably disposed at and passed by the pivot and pushes against the first and second withstanding post. The ejecting button is movably disposed on the casing and abuts against the connecting rod.

Abstract: An indolestyryl compound. The indolestyryl compound has formula (I): wherein Z1 comprises benzene, naphthalene, or heterocyclic ring containing O, S, or N, R2 comprises H, halogen atoms, C1-5 alkyl, nitro, ester, carboxyl, sulfo, sulfonamide, sulfuric ester, amide, C1-3 alkoxy, amino, alkylamino, cyano, C1-6 alkylsulfonyl, or C2-7 alkoxy carbonyl, R3, R4, R5, and R6 comprise H, alkyl, aralkyl, or heterocyclic ring containing O, S, or N, R7 and R8 comprise H or alkyl, R10 comprises H, alkyl, halogen atoms, nitro, hydroxyl, amino, ester, or substituted or non-substituted sulfonyl, W comprises carbon or nitrogen, Y comprises carbon, oxygen, sulfur, selenium, —NR, or —C(CH3)2, m is 1˜3, and X1 comprises an anionic group or an anionic organometallic complex, wherein R3 and R4 are joined to a nitrogen atom or R5 and R6 are joined together to form a ring, and R bonded to nitrogen is C1-5 alkyl.

Abstract: A motion compensating method for a motion-compensated video decoder, the motion compensated video decoder having an entropy decoder for generation of MV information and MB modes, the motion compensating method includes selectively combining adjacent partitions within a macroblock in response to the MV information, and update the MV information and MB modes in response to the combination, and creating a predicted macroblock in response to the most updated MV information and MB modes.

Abstract: The present invention discloses a slope control device capable of predicting uniform-current-sharing level and method thereof which can be applied in a redundancy or distributed power system for providing better uniform-current-sharing ability. The device comprises a high linearity transconductor circuit, a slope adjusting circuit and an incremental output voltage circuit. The invention applies either a transconductor parameter or a feedback resistor to increase the droop gain and therefore the current deviation between two power supply modules is reduced. The invention further raises the output voltage step by step to ensure that the output voltage meet the requirement of allowable minimum output voltage according to increment of load current.

Abstract: A data card for a computer system capable of providing a loudspeaker mode for a mobile phone call is disclosed. The data card includes an antenna, an RF module, a first signal processing unit for processing a baseband signal for generating a first analog audio output signal corresponding to audio data played by a speaker when the computer system operates in the loudspeaker mode, a second signal processing unit, a transmission interface for outputting a first digital audio output signal corresponding to the audio data to the computer system, wherein the first digital audio output signal is generated according to the first analog audio output signal through an encoding process, a microphone device, and an audio codec for performing the encoding process on the first analog audio output signal in order to generate the first digital audio output signal.

Abstract: For decreasing errors within an analog phase-locked loop, an all-digital phase-locked loop (ADPLL) with digital components and digital operations is used. The ADPLL may also be used for direct frequency modulation (DFM). By defining a proportional path gain of an ADPLL by a bandwidth and a reference frequency of the ADPLL, by a TDC gain, a DCO gain, a dividing ratio of a frequency divider, a gain of an amplifier or a combination thereof, the gain of the amplifier may be adjusted so that an optimal loop bandwidth of the ADPLL may be well calibrated. For achieving the aim of entirely digital of the ADPLL, the gains of the TDC and the DCO may be further adjusted in a digital manner.

Abstract: A method for fabricating a non-volatile memory of the invention includes providing a substrate, and a tunnel layer is formed on the substrate. A charge-trapping layer is formed on the tunnel layer using silane (SiH4), nitrous oxide (N2O), and ammonia (NH3) as a reactant gas. The charge-trapping layer has a refractive index greater than or equal to 1.49 but less than 1.96 at a wavelength of 633 nm. A top layer is formed on the charge-trapping layer. A gate is formed on the top layer.

Abstract: A manufacturing method of a charge-trapping memory device is provided. This method includes forming a stacked structure having at least a charge-trapping medium. An annealing process in a hydrogen gas is then performed on the stacked structure subsequent to the device fabrication process. The annealing process is conducted at a temperature of about 350° C. to 450° C. and with the concentration of the hydrogen gas greater than 0.5 mole percent.

Abstract: The present invention relates to a method for the preparation of a lithium phosphate compound with an olivine crystal structure, which has a chemical formula of LixMyM?1-yPO4, wherein 0.1?x?1, 0?y?1. The nano-scale lithium phosphate ceramic powder was synthesized by using a self-propagating combustion with reactants of soluble salts and the proper oxidizing agents, followed by heat treatment of powder to obtain nano-scale lithium phosphate compound with an olivine crystal structure in a complete crystal phase. The method of the present invention uses low cost materials and simple processes. The uniform crystal product materials are beneficial to the industrial application.

Abstract: A method of fabricating a non-volatile memory device at least comprises steps as follows. First, a substrate on which a bottom dielectric layer is formed is provided. Then, impurities are introduced through the bottom dielectric layer to the substrate, so as to form a plurality of spaced doped regions on the substrate. The structure is thermally annealed for pushing the spaced doped regions to diffuse outwardly. After annealing, a charge trapping layer is formed on the bottom dielectric layer, and a top dielectric layer is formed on the charge trapping layer. Finally, a gate structure (such as a polysilicon layer and a silicide) is formed on the top dielectric layer.

Abstract: A recording layer including a novel dye for a high density optical recording medium, employing short wavelength laser source with a wavelength not longer than 530 nm for recording high density information and reproduction/playback of the high density information recordings, is provided.

Abstract: The method for fabricating the dielectric layer of the present invention is described as follows. A substrate is provided in a chamber, wherein the chamber is a single-wafer LPCVD chamber. A silicon source gas, an oxidation source gas and a nitridation source gas are then introduced into the chamber, wherein a volumetric flow rate ratio of the oxidation source gas to a total amount of the oxidation source gas and the nitridation source gas is varied within a range of 0.0245 to 0.375. Afterwards, the dielectric layer with a dielectric constant within a range of 4.8 to 7.6 is formed on the substrate.

Abstract: A sinking type electrical connector is adapted for coupling to a circuit board. The sinking type electrical connector includes a body and at least one limiting unit. The body has a front end portion, a connecting portion provided in the front end portion, and a top surface. The limiting unit is provided at one side of the body and includes a plurality of limiting portions respectively located at different levels. A selected one of the limiting portions of the limiting unit which are at different levels is brought to engage the circuit board so that a distance from the top surface of the body to the circuit board is changeable.

Abstract: A non-volatile memory device, a data access circuit and a data access method are provided. The non-volatile memory device includes a main controller, a plurality of sub-controllers and a plurality of memory blocks. The sub-controllers are coupled to the main controller and are used to execute the tasks assigned by the main controller. The memory blocks are respectively coupled to the corresponding sub-controllers. The main controller is used to divide a received main data into a plurality of sub-data, and the sub-data are respectively saved in the memory blocks through corresponding sub-controllers. Therefore, the data access speed of the non-volatile memory device is substantially speeded-up.