Patents by Inventor Andreas Meiser

Andreas Meiser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9893158
    Abstract: A semiconductor device is provided that includes a transistor in a semiconductor body having a main surface. The transistor includes a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The body region and the drift zone are disposed along a first direction between the source region and the drain region. The first direction is parallel to the main surface. The semiconductor device further includes a field plate disposed in field plate trenches extending along the first direction in the drift zone, and a field dielectric layer between the field plate and the drift zone. A thickness of the field dielectric layer gradually increases along the first direction from a portion adjacent to the source region to a portion adjacent to the drain region.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: February 13, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Oliver Haeberlen
  • Publication number: 20180040729
    Abstract: A semiconductor device and a method of manufacturing the same is provided. The semiconductor device including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.
    Type: Application
    Filed: October 17, 2017
    Publication date: February 8, 2018
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Andreas MEISER, Karl-Heinz GEBHARDT, Till SCHLOESSER, Detlef WEBER
  • Patent number: 9882555
    Abstract: A switch is provided having a switch transistor as well as a monitoring component to monitor a control signal applied to the switch transistor. With the monitoring component, in some implementation a monitoring of the control signal independent from a load path may be possible.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: January 30, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Anton Mauder, Jens Barrenscheen
  • Publication number: 20180006639
    Abstract: In accordance with an embodiment, an electronic circuit includes a first transistor device, at least one second transistor device, and a drive circuit. The first transistor device is integrated in a first semiconductor body, and includes a first load pad at a first surface of the first semiconductor body and a control pad and a second load pad at a second surface of the first semiconductor body. The at least one second transistor device is integrated in a second semiconductor body, and includes a first load pad at a first surface of the second semiconductor body and a control pad and a second load pad at a second surface of the second semiconductor body. The first load pad of the first transistor device and the first load pad of the at least one second transistor device are mounted to an electrically conducting carrier.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 4, 2018
    Inventors: Rainald Sander, Andreas Meiser
  • Patent number: 9859418
    Abstract: A semiconductor device is provided including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: January 2, 2018
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Andreas Meiser, Karl-Heinz Gebhardt, Till Schloesser, Detlef Weber
  • Publication number: 20170373685
    Abstract: Switch devices using switch transistors with dual gates are provided. The dual gates may be controlled independently from each other by first and second gate driver circuits.
    Type: Application
    Filed: June 24, 2016
    Publication date: December 28, 2017
    Inventors: Andreas Meiser, Anton Mauder, Jens Barrenscheen
  • Publication number: 20170373678
    Abstract: A switch is provided having a switch transistor as well as a monitoring component to monitor a control signal applied to the switch transistor. With the monitoring component, in some implementation a monitoring of the control signal independent from a load path may be possible.
    Type: Application
    Filed: June 24, 2016
    Publication date: December 28, 2017
    Inventors: Andreas Meiser, Anton Mauder, Jens Barrenscheen
  • Patent number: 9853637
    Abstract: Switch devices using switch transistors with dual gates are provided. The dual gates may be controlled independently from each other by first and second gate driver circuits.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: December 26, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Anton Mauder, Jens Barrenscheen
  • Patent number: 9852945
    Abstract: A semiconductor device is manufactured at least partially in a semiconductor substrate. The substrate has first and second opposing main surfaces. The method includes forming a cell field portion and a contact area, the contact area being electrically coupled to the cell field portion, and forming the cell field portion by at least forming a transistor. The method further includes insulating a part of the semiconductor substrate from other substrate portions to form a connection substrate portion, forming an electrode adjacent to the second main surface so as to be in contact with the connection substrate portion, forming an insulating layer over the first main surface, forming a metal layer over the insulating layer, forming a trench in the first main surface, and filling the trench with a conductive material, and electrically coupling the connection substrate portion to the metal layer via the trench.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: December 26, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Andreas Meiser, Till Schloesser, Martin Poelzl
  • Publication number: 20170358650
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate. The transistor includes a drift zone of a first conductivity type adjacent to a drain region, and a first field plate and a second field plate adjacent to the drift zone. The second field plate is arranged between the first field plate and the drain region. The second field plate is electrically connected to a contact portion arranged in the drift zone. The transistor further includes an intermediate portion of the first conductivity type at a lower doping concentration than the drift zone. A distance between the intermediate portion and the drain region is smaller than the distance between the contact portion and the drain region.
    Type: Application
    Filed: June 6, 2017
    Publication date: December 14, 2017
    Inventors: Andreas Meiser, Franz Hirler, Till Schloesser
  • Patent number: 9825170
    Abstract: A semiconductor device formed in a semiconductor substrate having a first main surface comprises a transistor array and a termination region. The transistor array comprises a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region. The gate electrode is disposed in first trenches. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a first ridge extending along the first direction. The termination region comprises a termination trench, a portion of the termination trench extending in the first direction, a length of the termination trench being larger than a length of the first trenches, the length being measured along the first direction.
    Type: Grant
    Filed: February 10, 2016
    Date of Patent: November 21, 2017
    Assignee: Infineon Technologies AG
    Inventors: Franz Hirler, Andreas Meiser, Till Schloesser
  • Patent number: 9825148
    Abstract: A method of manufacturing a semiconductor device includes forming a transistor in a semiconductor substrate having a first main surface. The transistor is formed by forming a source region, forming a drain region, forming a channel region, forming a drift zone, and forming a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. Forming the semiconductor device further includes forming a conductive layer, a portion of the conductive layer being disposed beneath the gate electrode and insulated from the gate electrode.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: November 21, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Thorsten Meyer
  • Publication number: 20170317176
    Abstract: A semiconductor device includes a transistor in a semiconductor body having a first main surface. The transistor includes: a source contact electrically connected to a source region; a drain contact electrically connected to a drain region; a gate electrode at the channel region, the channel region and a drift zone disposed along a first direction between the source and drain regions, the first direction being parallel to the first main surface, the channel region patterned into a ridge by adjacent gate trenches formed in the first main surface, the adjacent gate trenches spaced apart in a second direction perpendicular to the first direction, a longitudinal axis of the ridge extending in the first direction and a longitudinal axis of the gate trenches extending in the first direction; and at least one of the source and drain contacts being adjacent to a second main surface opposite the first main surface.
    Type: Application
    Filed: July 11, 2017
    Publication date: November 2, 2017
    Inventors: Andreas Meiser, Rolf Weis, Franz Hirler, Martin Vielemeyer, Markus Zundel, Peter Irsigler
  • Patent number: 9806188
    Abstract: A controllable semiconductor component is produced by providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. In a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. The oxide layer is removed from the first trench completely or at least partly such that the semiconductor body has an exposed first surface area arranged in the first trench. An electrically conductive material is filled into the second trench, and the semiconductor body and the oxide layer are partially removed such that the electrically conductive material has an exposed second surface area at the bottom side.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: October 31, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Markus Zundel
  • Patent number: 9799762
    Abstract: A semiconductor device comprises a transistor formed in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode being adjacent to the channel region. The gate electrode is configured to control a conductivity of a channel formed in the channel region, the channel region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The channel region has a shape of a first ridge extending along the first direction, and the transistor includes a first field plate arranged adjacent to the drift zone.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: October 24, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20170301791
    Abstract: A method of forming an integrated circuit includes forming gate trenches in the first main surface of a semiconductor substrate, the gate trenches being formed so that a longitudinal axis of the gate trenches runs in a first direction parallel to the first main surface. The method further includes forming a source contact groove running in a second direction parallel to the first main surface, the second direction being perpendicular to the first direction, the source contact groove extending along the plurality of gate trenches, forming a source region including performing a doping process to introduce dopants through a sidewall of the source contact groove, and filling a sacrificial material in the source contact groove. The method also includes, thereafter, forming components of the logic circuit element, thereafter, removing the sacrificial material from the source contact groove, and filling a source conductive material in the source contact groove.
    Type: Application
    Filed: April 11, 2017
    Publication date: October 19, 2017
    Inventors: Andreas Meiser, Till Schloesser, Detlef Weber, Karl-Heinz Gebhardt
  • Publication number: 20170263719
    Abstract: A method for manufacturing a semiconductor structure is provided, which may include: forming a p-doped region adjacent to an n-doped region in a substrate; carrying out an anodic oxidation to form an oxide layer on a surface of the substrate, wherein the oxide layer in a first portion of the surface extending along the n-doped region has a greater thickness than the oxide layer in a second portion of the surface extending along the p-doped region.
    Type: Application
    Filed: May 24, 2017
    Publication date: September 14, 2017
    Inventors: Hans-Joachim Schulze, Markus Zundel, Anton Mauder, Andreas Meiser, Franz Hirler, Hans Weber
  • Publication number: 20170257025
    Abstract: A switched-mode power converter includes an inductive storage element and a cascode circuit. The cascode circuit includes a double-gate field effect transistor. A switchable load path of the double-gate field effect transistor is electrically connected in series with the inductive storage element.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 7, 2017
    Inventors: Andreas Meiser, Steffen Thiele
  • Publication number: 20170256641
    Abstract: A semiconductor device includes a transistor. The transistor includes a source region and a drain region disposed adjacent to a first main surface of a semiconductor substrate, a first gate electrode and a second gate electrode, the first gate electrode being disconnected from the second gate electrode. The transistor further includes a body region. The first gate electrode is adjacent to a first portion of the body region and the second gate electrode is adjacent to a second portion of the body region. The transistor further includes first trenches patterning the first portion of the body region into a first ridge, and second trenches patterning the second portion of the body region into a second ridge. The first gate electrode is arranged in at least one of first trenches, and the second gate electrode is arranged in at least one of the second trenches.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 7, 2017
    Inventor: Andreas Meiser
  • Patent number: 9748378
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The gate electrode is disposed in trenches extending in a first direction parallel to the first main surface. The gate electrode is electrically coupled to a gate terminal. The channel region and the drift zone are disposed along the first direction between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode. The conductive layer is electrically connected to the gate terminal.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: August 29, 2017
    Assignee: Infineon Technologies AG
    Inventors: Karoline Koepp, Andreas Meiser, Till Schloesser