Patents by Inventor Andreas Meiser

Andreas Meiser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9401355
    Abstract: One embodiment of an integrated circuit includes a semiconductor body. In the semiconductor body a first trench region extends into the semiconductor body from a first surface. The integrated circuit further includes a diode including an anode region and a cathode region. One of the anode region and the cathode region is at least partly arranged in the first trench region. The other one of the anode region and the cathode region includes a first semiconductor region adjoining the one of the anode region and the cathode region from outside of the first trench region.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: July 26, 2016
    Assignee: Infineon Technologies AG
    Inventors: Joachim Weyers, Anton Mauder, Franz Hirler, Andreas Meiser, Ulrich Glaser
  • Patent number: 9397092
    Abstract: A semiconductor device in a semiconductor substrate includes a trench in a first main surface of the semiconductor substrate. The trench includes a first trench portion extending in a first direction and a second trench portion extending in the first direction. The first trench portion is connected with the second trench portion in a lateral direction. The first trench portion and the second trench portion are arranged one after the other along the first direction. The semiconductor device further includes a trench conductive structure having a conductive material disposed in the first trench portion, and a trench capacitor structure having a capacitor dielectric and a first capacitor electrode disposed in the second trench portion. The first capacitor electrode includes a layer lining a sidewall of the second trench portion.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: July 19, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Markus Zundel, Till Schloesser
  • Publication number: 20160197070
    Abstract: A semiconductor device includes a semiconductor body having first and second opposing sides. Contact trenches extend, from the first and second sides, through a dielectric and into the semiconductor body. The contact trenches include conductive material electrically connected to the semiconductor body via sidewalls. The contact trenches include a first contact trench extending through a first dielectric and into the semiconductor body at the first side, the first contact trench including a first conductive material electrically connected to the semiconductor body adjoining the first contact trench, a second contact trench extending through a second dielectric and into the semiconductor body at the second side, the second contact trench including a second conductive material, a first contact pattern surrounded by the first dielectric at the first side, and a second contact pattern surrounded by the second dielectric at the second side.
    Type: Application
    Filed: February 23, 2016
    Publication date: July 7, 2016
    Inventors: Markus Zundel, Andreas Meiser, Hans-Peter Lang, Thorsten Meyer, Peter Irsigler
  • Publication number: 20160190256
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.
    Type: Application
    Filed: March 7, 2016
    Publication date: June 30, 2016
    Inventors: Martin Vielemeyer, Andreas Meiser, Till Schloesser, Franz Hirler, Martin Poelzl
  • Publication number: 20160181402
    Abstract: A method of manufacturing a semiconductor device includes providing dielectric stripe structures extending from a first surface into a semiconductor substrate between semiconductor fins. A first mask is provided that covers a first area including first stripe sections of the dielectric stripe structures and first fin sections of the semiconductor fins. The first mask exposes a second area including second stripe and second fin sections. A channel/body zone is formed in the second fin sections by introducing impurities, wherein the first mask is used as an implant mask. Using an etch mask that is based on the first mask, recess grooves are formed at least in the second stripe sections.
    Type: Application
    Filed: March 1, 2016
    Publication date: June 23, 2016
    Inventors: Martin Poelzl, Till Schloesser, Andreas Meiser
  • Patent number: 9368436
    Abstract: A method for forming a semiconductor device includes forming device regions in a semiconductor substrate having a first side and a second side. The device regions are formed adjacent the first side. The method further includes forming a seed layer over the first side of the semiconductor substrate, and forming a patterned resist layer over the seed layer. A contact pad is formed over the seed layer within the patterned resist layer. The method further includes removing the patterned resist layer after forming the contact pad to expose a portion of the seed layer underlying the patterned resist layer, and forming a protective layer over the exposed portion of the seed layer.
    Type: Grant
    Filed: February 4, 2015
    Date of Patent: June 14, 2016
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Andreas Meiser, Martin Mischitz, Michael Roesner, Michael Pinczolits
  • Publication number: 20160164279
    Abstract: Circuits, switches with over-current protection and methods for measuring a current are described herein. A circuit configured to provide a current from a supply voltage to a load includes a first transistor, a second transistor, and a detecting circuit. The first transistor has a larger active area than the second transistor. The detecting circuit is configured to detect a current through the second transistor. A same voltage is applied between a control terminal of the first transistor and a first controlled terminal of the first transistor and is applied between a control terminal of the second transistor and a first controlled terminal of the second transistor. The detecting circuit is coupled to the second controlled terminal of the second transistor and is coupled to the supply voltage.
    Type: Application
    Filed: December 9, 2014
    Publication date: June 9, 2016
    Inventors: Michael Asam, Andreas Meiser, Steffen Thiele
  • Patent number: 9362371
    Abstract: A method of producing a controllable semiconductor component includes providing a semiconductor body with a top side and a bottom side, and forming a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body. The first trench has a first width and a first depth, and the second trench has a second width greater than the first width and a second depth greater than the first depth. The method further includes forming, in a common process, an oxide layer in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench, and removing the oxide layer from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.
    Type: Grant
    Filed: May 14, 2015
    Date of Patent: June 7, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Markus Zundel
  • Patent number: 9356148
    Abstract: One embodiment of a semiconductor device includes a fin at a first side of a semiconductor body, a body region of a second conductivity type in at least a part of the fin, a drain extension region of a first conductivity type, a source region and a drain region of the first conductivity type, a source contact in contact with the source region, the source contact extending along a vertical direction along the source region, and a gate structure adjoining opposing walls of the fin. The body region and the drain extension region are arranged one after another between the source region and the drain region.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: May 31, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Andreas Meiser, Christian Kampen
  • Patent number: 9351382
    Abstract: In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. The substrate includes a plurality of driver circuits at the first side of the substrate. Each of the plurality of driver circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. The device further includes at least one load interface at the second side of the substrate. The at least one load interface is configured to couple the current from the plurality of the driver circuits to a plurality of loads at the second side of the substrate.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: May 24, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andrea Logiudice, Andreas Meiser
  • Patent number: 9349834
    Abstract: A method of manufacturing a semiconductor device includes forming a transistor in a semiconductor substrate having a first main surface. The transistor is formed by forming a source region, forming a drain region, forming a channel region, forming a drift zone, and forming a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. Forming the semiconductor device further includes forming a conductive layer, a portion of the conductive layer being disposed beneath the gate electrode and insulated from the gate electrode.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: May 24, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Thorsten Meyer
  • Patent number: 9324829
    Abstract: A method includes forming a trench extending from a first surface of a semiconductor body into the semiconductor body such that a first trench section and at least one second trench section adjoin the first trench section, wherein the first trench section is wider than the second trench section. A first electrode is formed, in the at least one second trench section, and dielectrically insulated from semiconductor regions of the semiconductor body by a first dielectric layer. An inter-electrode dielectric layer is formed, in the at least one second trench section, on the first electrode. A second electrode is formed, in the at least one second trench section on the inter-electrode dielectric layer, and in the first trench section, such that the second electrode at least in the first trench section is dielectrically insulated from the semiconductor body by a second dielectric layer.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: April 26, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Markus Zundel
  • Patent number: 9306058
    Abstract: An integrated circuit includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: April 5, 2016
    Assignee: Infineon Technologies AG
    Inventors: Martin Vielemeyer, Andreas Meiser, Till Schloesser, Franz Hirler, Martin Poelzl
  • Publication number: 20160093731
    Abstract: A method of manufacturing a semiconductor device including a transistor comprises forming field plate trenches in a main surface of a semiconductor substrate, a drift zone being defined between adjacent field plate trenches, forming a field dielectric layer in the field plate trenches, thereafter, forming gate trenches in the main surface of the semiconductor substrate, a channel region being defined between adjacent gate trenches, and forming a conductive material in at least some of the field plate trenches and in at least some of the gate trenches. The method further comprising forming a source region and forming a drain region in the main surface of the semiconductor substrate.
    Type: Application
    Filed: September 29, 2015
    Publication date: March 31, 2016
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20160093529
    Abstract: A semiconductor device is manufactured at least partially in a semiconductor substrate. The substrate has first and second opposing main surfaces. The method includes forming a cell field portion and a contact area, the contact area being electrically coupled to the cell field portion, and forming the cell field portion by at least forming a transistor. The method further includes insulating a part of the semiconductor substrate from other substrate portions to form a connection substrate portion, forming an electrode adjacent to the second main surface so as to be in contact with the connection substrate portion, forming an insulating layer over the first main surface, forming a metal layer over the insulating layer, forming a trench in the first main surface, and filling the trench with a conductive material, and electrically coupling the connection substrate portion to the metal layer via the trench.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Andreas Meiser, Till Schloesser, Martin Poelzl
  • Patent number: 9287404
    Abstract: A method of manufacturing a semiconductor device includes providing dielectric stripe structures extending from a first surface into a semiconductor substrate between semiconductor fins. A first mask is provided that covers a first area including first stripe sections of the dielectric stripe structures and first fin sections of the semiconductor fins. The first mask exposes a second area including second stripe and second fin sections. A channel/body zone is formed in the second fin sections by introducing impurities, wherein the first mask is used as an implant mask. Using an etch mask that is based on the first mask, recess grooves are formed at least in the second stripe sections.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: March 15, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Martin Poelzl, Till Schloesser, Andreas Meiser
  • Patent number: 9281359
    Abstract: One embodiment of a semiconductor device includes a semiconductor body with a first side and a second side opposite to the first side. The semiconductor device further includes a first contact trench extending into the semiconductor body at the first side. The first contact trench includes a first conductive material electrically coupled to the semiconductor body adjoining the first contact trench. The semiconductor further includes a second contact trench extending into the semiconductor body at the second side. The second contact trench includes a second conductive material electrically coupled to the semiconductor body adjoining the second contact trench.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: March 8, 2016
    Assignee: Infineon Technologies AG
    Inventors: Markus Zundel, Andreas Meiser, Hans-Peter Lang, Thorsten Meyer, Peter Irsigler
  • Publication number: 20160060105
    Abstract: A method for producing a MEMS device comprises forming a semiconductor layer stack, the semiconductor layer stack comprising at least a first monocrystalline semiconductor layer, a second monocrystalline semiconductor layer and a third monocrystalline semiconductor layer, the second monocrystalline semiconductor layer formed between the first and third monocrystalline semiconductor layers. A semiconductor material of the second monocrystalline semiconductor layer is different from semiconductor materials of the first and third monocrystalline semiconductor layers. After forming the semiconductor layer stack, at least a portion of each of the first and third monocrystalline semiconductor layers is concurrently etched.
    Type: Application
    Filed: August 21, 2015
    Publication date: March 3, 2016
    Inventors: Stefan KOLB, Andreas MEISER, Till SCHLOESSER, Wolfgang WERNER
  • Patent number: 9275895
    Abstract: A method for producing a semiconductor component with a semiconductor body includes providing a substrate of a first conductivity type. A buried semiconductor layer of a second conductivity type is provided on the substrate. A functional unit semiconductor layer is provided on the buried semiconductor layer. At least one trench, which reaches into the substrate, is formed in the semiconductor body. An insulating layer is formed, which covers inner walls of the trench and electrically insulates the trench interior from the functional unit semiconductor layer and the buried semiconductor layer, the insulating layer having at least one opening in the region of the trench bottom. The at least one trench is filled with an electrically conductive semiconductor material of the first conductivity type, wherein the electrically conductive semiconductor material forms an electrical contact from a surface of the semiconductor body to the substrate.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: March 1, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Walter Hartner, Hermann Gruber, Dietrich Bonart, Thomas Gross
  • Publication number: 20160052776
    Abstract: A MEMS device includes a fixed electrode and a movable electrode arranged isolated and spaced from the fixed electrode by a distance. The movable electrode is suspended against the fixed electrode by one or more spacers including an insulating material, wherein the movable electrode is laterally affixed to the one or more spacers.
    Type: Application
    Filed: October 16, 2015
    Publication date: February 25, 2016
    Inventors: Stefan Kolb, Andreas Meiser, Till Schloesser, Wolfgang Werner