Patents by Inventor Andreas Meiser

Andreas Meiser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170117383
    Abstract: A method for forming a semiconductor device includes forming an electrical structure at a main surface of a semiconductor substrate and carrying out an anodic oxidation of a back side surface region of a back side surface of the semiconductor substrate to form an oxide layer at the back side surface of the semiconductor substrate. Additionally, the method includes connecting a carrier substrate to the oxide layer and processing a back side of the semiconductor substrate.
    Type: Application
    Filed: January 5, 2017
    Publication date: April 27, 2017
    Inventors: Andreas Meiser, Anton Mauder, Markus Zundel, Hans-Joachim Schulze, Franz Hirler, Hans Weber
  • Patent number: 9634101
    Abstract: A MOS transistor semiconductor component includes a semiconductor body with first and second surfaces, a first contact electrode on the first surface, a second contact electrode on the second surface, a first insulation layer separating a via region at least from a drift region, a monocrystalline semiconductor region arranged in the via region and extending between the first surface and the second surface, a gate electrode electrically connected to the first contact electrode, a source electrode electrically insulated from the gate electrode, and arranged at least partially above the first surface, and a drain electrode electrically insulated from the second contact electrode on the second surface. The MOS transistor has a gate terminal formed by the second contact electrode and electrically connected to a gate-electrode of the MOS transistor through the via region. The gate-electrode is formed next to the first surface and disposed outside the via region.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: April 25, 2017
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Andreas Meiser
  • Patent number: 9620637
    Abstract: A semiconductor device formed in a semiconductor substrate includes a source region, a drain region, a gate electrode, and a body region disposed between the source region and the drain region. The gate electrode is disposed adjacent at least two sides of the body region, and the source region and the gate electrode are coupled to a source terminal. A width of the body region between the two sides of the body region is selected so that the body region is configured to be fully depleted.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: April 11, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Franz Hirler
  • Patent number: 9614032
    Abstract: A semiconductor device comprises a transistor in a semiconductor body having a first main surface and a second main surface, the first main surface being opposite to the second main surface. The transistor comprises a source region at the first main surface, a drain region, a body region, a drift zone, and a gate electrode at the body region. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The gate electrode is disposed in trenches extending in the first direction. The transistor further comprises an insulating layer adjacent to the second main surface of the body region. The source region vertically extends to the second main surface.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: April 4, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Patent number: 9614064
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a body region, and a gate electrode structure adjacent to the body region. The source region and the drain region are disposed along a first direction, the first direction being parallel to the main surface. The body region is disposed between the source region and the drain region. The body region includes an upper body region at the main surface and a lower body region remote from the main surface. A first width of the lower body region is smaller than a second width of the upper body region. The first width and the second width are measured in a direction perpendicular to the first direction.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: April 4, 2017
    Assignee: Infineon Technologies AG
    Inventor: Andreas Meiser
  • Publication number: 20170092717
    Abstract: A trench etch mask is formed on a process surface of a semiconductor layer. By using the trench etch mask, both first trenches and second trenches are formed that extend from the process surface into the semiconductor layer. The first and second trenches alternate along at least one horizontal direction parallel to the process surface. First semiconductor regions of a first conductivity type are formed in the first trenches. Second semiconductor regions of a second, opposite conductivity type are formed in the second trenches.
    Type: Application
    Filed: September 29, 2016
    Publication date: March 30, 2017
    Inventors: Andreas Meiser, Franz Hirler
  • Patent number: 9608070
    Abstract: A semiconductor device comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region, and the gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction, the body region being adjacent to the source region and the drain region. The semiconductor device further comprises a source contact and a body contact, the source contact being electrically connected to a source terminal, the body contact being electrically connected to the source contact and to the body region.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: March 28, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20170084606
    Abstract: An integrated circuit includes a semiconductor body with a first semiconductor layer, an insulation layer on the first semiconductor layer, and a second semiconductor layer on the insulation layer. The integrated circuit further includes a plurality of transistors each including a load path and a control node The load paths are connected in series, and the plurality of transistors are at least partially integrated in the second semiconductor layer. A voltage limiting structure is connected in parallel with the load path of one of the plurality of transistors, wherein the voltage limiting structure is integrated in the first semiconductor layer and is connected to the one of the plurality of transistors through two electrically conducting vias extending through the insulation layer.
    Type: Application
    Filed: September 22, 2016
    Publication date: March 23, 2017
    Inventors: Andreas Meiser, Dirk Priefert, Rolf Weis
  • Publication number: 20170047443
    Abstract: A semiconductor device is provided including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.
    Type: Application
    Filed: August 11, 2016
    Publication date: February 16, 2017
    Applicant: Infineon Technologies Dresden GmbH
    Inventors: Andreas MEISER, Karl-Heinz GEBHARDT, Till SCHLOESSER, Detlef WEBER
  • Patent number: 9570576
    Abstract: A method for forming a semiconductor device includes forming an electrical structure at a main surface of a semiconductor substrate and carrying out an anodic oxidation of a back side surface region of a back side surface of the semiconductor substrate to form an oxide layer at the back side surface of the semiconductor substrate.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: February 14, 2017
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Anton Mauder, Markus Zundel, Hans-Joachim Schulze, Franz Hirler, Hans Weber
  • Publication number: 20170033191
    Abstract: A semiconductor device is provided that includes a transistor in a semiconductor body having a main surface. The transistor includes a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The body region and the drift zone are disposed along a first direction between the source region and the drain region. The first direction is parallel to the main surface. The semiconductor device further includes a field plate disposed in field plate trenches extending along the first direction in the drift zone, and a field dielectric layer between the field plate and the drift zone. A thickness of the field dielectric layer gradually increases along the first direction from a portion adjacent to the source region to a portion adjacent to the drain region.
    Type: Application
    Filed: July 22, 2016
    Publication date: February 2, 2017
    Applicant: Infineon Technologies AG
    Inventors: Andreas MEISER, Oliver HAEBERLEN
  • Publication number: 20170033189
    Abstract: A method of manufacturing a structure in a semiconductor body comprises forming a first mask above a first surface of the semiconductor body. The first mask comprises an opening surrounding a first portion of the first mask, thereby separating the first portion and a second portion of the first mask. The semiconductor body is processed through the opening at the first surface. The opening is increased by removing at least part of the first mask in the first portion while maintaining the first mask in the second portion. The semiconductor body is further processed through the opening at the first surface.
    Type: Application
    Filed: July 27, 2016
    Publication date: February 2, 2017
    Inventors: Wolfgang Werner, Peter lrsigler, Andreas Meiser
  • Patent number: 9558933
    Abstract: A method for forming a semiconductor device includes carrying out an anodic oxidation of a surface region of a semiconductor substrate to form an oxide layer at a surface of the semiconductor substrate by generating an attracting electrical field between the semiconductor substrate and an external electrode within an electrolyte to attract oxidizing ions of the electrolyte, causing an oxidation of the surface region of the semiconductor substrate. Further, the method includes reducing the number of remaining oxidizing ions within the oxide layer, while the semiconductor substrate is within an electrolyte.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: January 31, 2017
    Assignee: Infineon Technologies AG
    Inventors: Hans-Joachim Schulze, Markus Zundel, Anton Mauder, Andreas Meiser, Franz Hirler, Hans Weber
  • Publication number: 20170012002
    Abstract: A method of manufacturing a semiconductor device includes forming a separation trench into a first main surface of a semiconductor substrate and removing substrate material from a second main surface of the semiconductor substrate, so as to thin the substrate to a thickness of less than 100 ?m, the second main surface being opposite to the first main surface, so as to uncover a bottom side of the trench. Additional methods of manufacturing semiconductor devices are provided.
    Type: Application
    Filed: September 22, 2016
    Publication date: January 12, 2017
    Inventors: Andreas Meiser, Markus Zundel, Martin Poelzl, Paul Ganitzer, Georg Ehrentraut
  • Patent number: 9530884
    Abstract: A method of manufacturing a semiconductor device including a transistor comprises forming field plate trenches in a main surface of a semiconductor substrate, a drift zone being defined between adjacent field plate trenches, forming a field dielectric layer in the field plate trenches, thereafter, forming gate trenches in the main surface of the semiconductor substrate, a channel region being defined between adjacent gate trenches, and forming a conductive material in at least some of the field plate trenches and in at least some of the gate trenches. The method further comprising forming a source region and forming a drain region in the main surface of the semiconductor substrate.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: December 27, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20160365443
    Abstract: A transistor cell includes a drift region, a source region, a body region, and a drain region that is laterally spaced apart from the source region. A gate electrode is adjacent the body region. A field electrode is arranged in the drift region. A source electrode is connected to the source region and the body region, and a drain electrode is connected to the drain region. An avalanche bypass structure is coupled between the source electrode and the drain electrode and includes a first semiconductor layer of the first doping type, a second semiconductor layer of the first doping type, and a pn-junction arranged between the first semiconductor layer and the source electrode. The second semiconductor layer has a higher doping concentration than the first semiconductor layer and is arranged between the second semiconductor layer and the drift region. The drain electrode is electrically connected to the second semiconductor layer.
    Type: Application
    Filed: June 14, 2016
    Publication date: December 15, 2016
    Inventors: Andreas Meiser, Till Schloesser
  • Patent number: 9502421
    Abstract: A semiconductor device is disclosed. In one embodiment, the semiconductor device includes two different semiconductor materials. The two semiconductor materials are arranged adjacent one another in a common plane.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: November 22, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Andreas Meiser
  • Publication number: 20160322357
    Abstract: A semiconductor device includes first and second field effect transistors (FETs) formed in a semiconductor substrate having a first main surface. The first FET includes first source and drain contact grooves, each running in a first direction parallel to the first main surface, each formed in the first main surface. First source regions are electrically connected to a conductive material in the first source contact groove. First drain regions are electrically connected to a conductive material in the first drain contact groove. The second FET includes second source and drain contact grooves, each running in a second direction parallel to the first main surface, each formed in the first main surface. Second source regions are electrically connected to a conductive material in the second source contact groove, and second drain regions are electrically connected to a conductive material in the second drain contact groove.
    Type: Application
    Filed: April 26, 2016
    Publication date: November 3, 2016
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20160322464
    Abstract: A semiconductor device comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region, and the gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction, the body region being adjacent to the source region and the drain region. The semiconductor device further comprises a source contact and a body contact, the source contact being electrically connected to a source terminal, the body contact being electrically connected to the source contact and to the body region.
    Type: Application
    Filed: April 27, 2016
    Publication date: November 3, 2016
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20160322347
    Abstract: A switch comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region, the gate electrode being configured to control a conductivity of a channel formed in the body region. The gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction. The body region is adjacent to the source region and the drain region. The switch further comprises a source contact and a body contact portion, the source contact being electrically connected to a source terminal. The body contact portion is in contact with the source contact and is electrically connected to the body region.
    Type: Application
    Filed: April 27, 2016
    Publication date: November 3, 2016
    Inventors: Andreas Meiser, Till Schloesser