Patents by Inventor Anthony J. Lochtefeld

Anthony J. Lochtefeld has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130285116
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Application
    Filed: May 28, 2013
    Publication date: October 31, 2013
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo Langdo
  • Publication number: 20130252361
    Abstract: Some aspects for the invention include a method and a structure including a light-emitting device disposed over a second crystalline semiconductor material formed over a semiconductor substrate comprising a first crystalline material.
    Type: Application
    Filed: May 28, 2013
    Publication date: September 26, 2013
    Inventors: Jizhong Li, Anthony J. Lochtefeld
  • Patent number: 8519436
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: August 27, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • Patent number: 8502263
    Abstract: Some aspects for the invention include a method and a structure including a light-emitting device disposed over a second crystalline semiconductor material formed over a semiconductor substrate comprising a first crystalline material.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: August 6, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jizhong Li, Anthony J. Lochtefeld
  • Patent number: 8441055
    Abstract: DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
    Type: Grant
    Filed: August 7, 2012
    Date of Patent: May 14, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mayank T. Bulsara, Matthew T. Currie, Anthony J. Lochtefeld
  • Patent number: 8384196
    Abstract: Methods and structures are provided for formation of devices on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping and epitaxial layer overgrowth. A method includes forming an opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semiconductor material lattice-mismatched to the first semiconductor material, is formed within the opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 26, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiyuan Cheng, James Fiorenza, Jennifer M. Hydrick, Anthony J. Lochtefeld, Ji-Soo Park, Jie Bai, Jizhong Li
  • Patent number: 8344355
    Abstract: Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: January 1, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld, Richard Hammond, Eugene A. Fitzgerald
  • Patent number: 8344242
    Abstract: Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: January 1, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: James Fiorenza, Anthony J. Lochtefeld
  • Patent number: 8324660
    Abstract: Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: December 4, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Matthew T. Currie, Zhiyuan Cheng, James Fiorenza, Glyn Braithwaite, Thomas A. Langdo
  • Publication number: 20120302032
    Abstract: DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
    Type: Application
    Filed: August 7, 2012
    Publication date: November 29, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Mayank Bulsara, Matthew T. Currie, Anthony J. Lochtefeld
  • Patent number: 8309986
    Abstract: Semiconductor structures include a trench formed proximate a substrate including a first semiconductor material. A crystalline material including a second semiconductor material lattice mismatched to the first semiconductor material is formed in the trench. Process embodiments include removing a portion of the dielectric layer to expose a side portion of the crystalline material and defining a gate thereover. Defects are reduced by using an aspect ratio trapping approach.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: November 13, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Publication number: 20120282718
    Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
    Type: Application
    Filed: July 20, 2012
    Publication date: November 8, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 8304805
    Abstract: A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: November 6, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 8253181
    Abstract: DRAM trench capacitors formed by, inter alia, deposition of conductive material into a trench or doping the semiconductor region in which the trench is defined.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: August 28, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mayank Bulsara, Matthew T. Currie, Anthony J. Lochtefeld
  • Publication number: 20120199876
    Abstract: Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls.
    Type: Application
    Filed: April 13, 2012
    Publication date: August 9, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jie Bai, Ji-Soo Park, Anthony J. Lochtefeld
  • Patent number: 8237151
    Abstract: In accordance with an embodiment, a diode comprises a substrate, a dielectric material including an opening that exposes a portion of the substrate, the opening having an aspect ratio of at least 1, a bottom diode material including a lower region disposed at least partly in the opening and an upper region extending above the opening, the bottom diode material comprising a semiconductor material that is lattice mismatched to the substrate, a top diode material proximate the upper region of the bottom diode material, and an active diode region between the top and bottom diode materials, the active diode region including a surface extending away from the top surface of the substrate.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: August 7, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 8173551
    Abstract: Lattice-mismatched epitaxial films formed proximate non-crystalline sidewalls. Embodiments of the invention include formation of facets that direct dislocations in the films to the sidewalls.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: May 8, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jie Bai, Ji-Soo Park, Anthony J. Lochtefeld
  • Patent number: 8106380
    Abstract: Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: January 31, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Matthew T. Currie, Anthony J. Lochtefeld, Richard Hammond, Eugene Fitzgerald
  • Publication number: 20110318893
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Application
    Filed: September 7, 2011
    Publication date: December 29, 2011
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Anthony J. Lochtefeld, Thomas A. Langdo, Richard Hammond, Matthew T. Currie, Eugene A. Fitzgerald
  • Patent number: 8026534
    Abstract: The benefits of strained semiconductors are combined with silicon-on-insulator approaches to substrate and device fabrication.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: September 27, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Thomas A. Langdo, Matthew T. Currie, Richard Hammond, Anthony J. Lochtefeld, Eugene A. Fitzgerald