Patents by Inventor Ashutosh Misra

Ashutosh Misra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7098150
    Abstract: This disclosure discusses the forming of gate dielectrics in semi conductor devices, and more specifically to forming thin high-k dielectric films on silicon substrates typically using chemical vapor deposition or atomic layer deposition processes. The current invention forms a high-k dielectric film in a single film-forming step using a vapor phase silicon precursor in conjunction with a liquid phase metal precursor, a nitrogen source and an oxygen source for the deposition of a metal silicon oxy nitride (MSiON) film of desired stochiometry. The vapor phase silicon precursor is not coordinated to a metal allowing independent control over feeding of the metal source and the silicon source. Thus, the M/Si ratio can be easily varied over a wide range.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: August 29, 2006
    Assignee: Air Liquide America L.P.
    Inventors: Ashutosh Misra, Matthew Fisher, Benjamin Jurcik
  • Patent number: 7093065
    Abstract: A memory has a set of address spaces to which token data is written and read. Each address space has a token status bit. A token generator allocates token data to the memory address spaces. Upon a reset occurring, a logic circuit provides logic “0” to the token generator disabling status bit checking control so that all the tokens can be issued sequentially. New token data is allocated to the address spaces sequentially and the respective status bit is updated or maintained as logic “1”. When all address spaces have been allocated, the logic circuit provides the actual state of the status bit to the token generator to control subsequent allocations.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: August 15, 2006
    Assignee: International Business Machines Corporation
    Inventors: Shridhar Narasimha Ambilkar, Girish Gopala Kurup, Ashutosh Misra
  • Patent number: 7093254
    Abstract: Scheduling a sequence of tasks quickly using a task list containing a sequence of entries, with each entry indicating whether a task is enabled or disabled for execution. A scheduler block examines the sequence of entries without wasting time in examining entries between those (entries) related to a prior scheduled task and a task to be scheduled next. By not wasting time examining the entries related to the disabled entries, the next task in the sequence of tasks may be scheduled for execution quickly.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: August 15, 2006
    Assignee: International Business Machines Corporation
    Inventors: Shridhar N. Ambilkar, Girish Gopala Kurup, Ashutosh Misra
  • Patent number: 7087564
    Abstract: This disclosure discusses cleaning of semiconductor wafers after the Chemical-Mechanical Planarization (CMP) of the wafer during the manufacturing of semiconductor devices. Disclosed is an acidic chemistry for the post-CMP cleaning of wafers containing metal, particularly copper, interconnects. Residual slurry particles, particularly copper or other metal particles, are removed from the wafer surface without significantly etching the metal, leaving deposits on the surface, or imparting significant organic (such as carbon) contamination to the wafer while also protecting the metal from oxidation and corrosion. Additionally, at least one strong chelating agent is present to complex metal ions in solution, facilitating the removal of metal from the dielectric and preventing re-deposition onto the wafer. Using acidic chemistry, it is possible to match the pH of the cleaning solution used after CMP to that of the last slurry used on the wafer surface.
    Type: Grant
    Filed: October 1, 2004
    Date of Patent: August 8, 2006
    Assignee: Air Liquide America, L.P.
    Inventors: Ashutosh Misra, Matthew L. Fisher
  • Patent number: 7085701
    Abstract: A method and system select delay values from a VHDL standard delay file that correspond to an instance of a logic gate in a logic model. Then the system collects all the delay values of the selected instance and builds super generics for the rise-time and the fall-time of the selected instance. Then, the system repeats this process for every delay value in the standard delay file (310) that correspond to every instance of every logic gate in the logic model. The system then outputs a reduced size standard delay file (314) containing the super generics for every instance of every logic gate in the logic model.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: August 1, 2006
    Assignee: International Business Machines Corporation
    Inventors: Marvin J. Rich, Ashutosh Misra
  • Publication number: 20060084281
    Abstract: This disclosure discusses the forming of gate dielectrics in semi conductor devices, and more specifically to forming thin high-k dielectric films on silicon substrates typically using chemical vapor deposition or atomic layer deposition processes. The current invention forms a high-k dielectric film in a single film-forming step using a vapor phase silicon precursor in conjunction with a liquid phase metal precursor, a nitrogen source and an oxygen source for the deposition of a metal silicon oxy nitride (MSiON) film of desired stochiometry. The vapor phase silicon precursor is not coordinated to a metal allowing independent control over feeding of the metal source and the silicon source. Thus, the M/Si ratio can be easily varied over a wide range.
    Type: Application
    Filed: November 28, 2005
    Publication date: April 20, 2006
    Inventors: Ashutosh Misra, Matthew Fisher, Benjamin Jurcik
  • Publication number: 20060051975
    Abstract: This disclosure discusses the forming of gate dielectrics in semi conductor devices, and more specifically to forming thin high-k dielectric films on silicon substrates typically using chemical vapor deposition or atomic layer deposition processes. The current invention forms a dielectric film in a single film-forming step using a vapor phase silicon precursor in conjunction with a nitrogen source and an oxygen source for the deposition of a silicon oxy nitride (SiON) film of desired stochiometry. The vapor phase silicon precursor, nitrogen source and oxygen source are carbon and chlorine free, eliminating the undesirable effects of carbon and chlorine in the dielectric film or solid deposits in the chamber exhaust.
    Type: Application
    Filed: September 7, 2004
    Publication date: March 9, 2006
    Inventors: Ashutosh Misra, Matthew Fisher, Benjamin Jurcik
  • Patent number: 6943878
    Abstract: Provided are methods and systems for controlling the concentration of a component in a composition, and semiconductor processing methods and systems. One exemplary method of controlling the concentration of a component in a composition involves: providing a composition which has a liquid portion, wherein the liquid portion contains a component to be monitored; performing an absorption spectroscopy measurement on a sample of the composition; and controlling the concentration of the component in the composition based on the absorption spectroscopy measurement using a feedback control loop. The invention allows for controlling the concentration of a component in a composition, for example, a corrosion inhibitor in a chemical planarization (CMP) chemical, as well as in pre- and post-CMP storage/treatment chemicals, and can provide real time, accurate process control in a simple and robust manner.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: September 13, 2005
    Assignee: Air Liquide Electronics U.S. LP
    Inventors: Matthew L. Fisher, David L. Snyder, Ashutosh Misra
  • Publication number: 20050197266
    Abstract: This disclosure discusses cleaning of semiconductor wafers after the Chemical-Mechanical Planarization (CMP) of the wafer during the manufacturing of semiconductor devices. Disclosed is an acidic chemistry for the post-CMP cleaning of wafers containing metal, particularly copper, interconnects. Residual slurry particles, particularly copper or other metal particles, are removed from the wafer surface without significantly etching the metal, leaving deposits on the surface, or imparting significant organic (such as carbon) contamination to the wafer while also protecting the metal from oxidation and corrosion. Additionally, at least one strong chelating agent is present to complex metal ions in solution, facilitating the removal of metal from the dielectric and preventing re-deposition onto the wafer. Using acidic chemistry, it is possible to match the pH of the cleaning solution used after CMP to that of the last slurry used on the wafer surface.
    Type: Application
    Filed: October 1, 2004
    Publication date: September 8, 2005
    Inventors: Ashutosh Misra, Matthew Fisher
  • Publication number: 20050196970
    Abstract: This disclosure discusses the forming of gate dielectrics in semi conductor devices, and more specifically to forming thin high-k dielectric films on silicon substrates typically using chemical vapor deposition or atomic layer deposition processes. The current invention forms a high-k dielectric film in a single film-forming step using a vapor phase silicon precursor in conjunction with a liquid phase metal precursor, a nitrogen source and an oxygen source for the deposition of a metal silicon oxy nitride (MSiON) film of desired stochiometry. The vapor phase silicon precursor is not coordinated to a metal allowing independent control over feeding of the metal source and the silicon source. Thus, the M/Si ratio can be easily varied over a wide range.
    Type: Application
    Filed: September 10, 2004
    Publication date: September 8, 2005
    Inventors: Ashutosh Misra, Matthew Fisher, Benjamin Jurcik
  • Publication number: 20050181961
    Abstract: This disclosure discusses cleaning of semiconductor wafers after the Chemical-Mechanical Planarization (CMP) of the wafer during the manufacturing of semiconductor devices. Disclosed is an alkaline chemistry for the post-CMP cleaning of wafers containing metal, particularly copper, interconnects. Residual slurry particles, particularly copper or other metal particles, are removed from the wafer surface without significantly etching the metal, leaving deposits on the surface, or imparting significant contamination to the wafer while also protecting the metal from oxidation and corrosion. Additionally, at least one strong chelating agent is present to complex metal ions in solution, facilitating the removal of metal from the dielectric and preventing re-deposition onto the wafer.
    Type: Application
    Filed: October 1, 2004
    Publication date: August 18, 2005
    Inventors: Ashutosh Misra, Matthew Fisher
  • Publication number: 20050129025
    Abstract: A memory has a set of address spaces to which token data is written and read. Each address space has a token status bit. A token generator allocates token data to the memory address spaces. Upon a reset occurring, a logic circuit provides logic “0” to the token generator disabling status bit checking control so that all the tokens can be issued sequentially. New token data is allocated to the address spaces sequentially and the respective status bit is updated or maintained as logic “1”. When all address spaces have been allocated, the logic circuit provides the actual state of the status bit to the token generator to control subsequent allocations.
    Type: Application
    Filed: December 15, 2003
    Publication date: June 16, 2005
    Applicant: International Business Machines Corporation
    Inventors: Shridhar Ambilkar, Girish Kurup, Ashutosh Misra
  • Publication number: 20050132370
    Abstract: Task distribution is performed in hardware without the use of “division” logic component to divide executions between task execution registers, which advantageously require less silicon when implemented in hardware. Instead, a remainder register is used as a temporary store for the number of task executions yet to distributed to task execution registers. Task execution registers are incremented with a value represented by the data pattern of n MSBs of the number of executions required. Corresponding increment and decrement operations occur until task executions, represented by the data value stored in the remainder register, are effectively distributed to task execution registers.
    Type: Application
    Filed: December 15, 2003
    Publication date: June 16, 2005
    Applicant: International Business Machines Corporation
    Inventors: Shridhar Ambilkar, Ashutosh Misra, Raju Pudota
  • Patent number: 6817000
    Abstract: A method and system unbind a rise/fall tuple of a VHDL generic variable and create rise time and fall time generics of each generic variable that are independent of each other. Then, according to a predetermined correlation policy, the method and system collect delay values in a VHDL standard delay file, sort the delay values, remove duplicate delay values, group the delay values into correlation sets, and output an analysis file. The correlation policy may include collecting all generic variables in a VHDL standard delay file, selecting each generic variable, and performing reductions on the set of delay values associated with each selected generic variable.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Marvin J. Rich, Ashutosh Misra
  • Publication number: 20040218173
    Abstract: Provided are methods and systems for controlling the concentration of a component in a composition, and semiconductor processing methods and systems. One exemplary method of controlling the concentration of a component in a composition involves: providing a composition which has a liquid portion, wherein the liquid portion contains a component to be monitored; performing an absorption spectroscopy measurement on a sample of the composition; and controlling the concentration of the component in the composition based on the absorption spectroscopy measurement using a feedback control loop. The invention allows for controlling the concentration of a component in a composition, for example, a corrosion inhibitor in a chemical planarization (CMP) chemical, as well as in pre- and post-CMP storage/treatment chemicals, and can provide real time, accurate process control in a simple and robust manner.
    Type: Application
    Filed: May 25, 2004
    Publication date: November 4, 2004
    Inventors: Matthew L. Fisher, David L. Snyder, Ashutosh Misra
  • Publication number: 20040166584
    Abstract: A method and apparatus for performing online monitoring of a chemical state of a process material. A request to provide a process chemical to a processing tool is received. The process chemical is transported through a chemical transport unit, based upon the request, to the processing tool. An online monitoring of a chemical state of the process chemical is performed. The online monitoring of the process chemical includes analyzing a resultant of a radiation signal sent through the process chemical to determine a refractive index to determine whether the chemical state of the process chemical is within a predetermined level of tolerance.
    Type: Application
    Filed: December 11, 2003
    Publication date: August 26, 2004
    Inventors: Ashutosh Misra, Matthew L. Fisher
  • Publication number: 20040159399
    Abstract: A method and apparatus for performing online monitoring of a physical characteristic of a process material. A request to provide a slurry to a processing tool is received. The slurry is transported through a slurry transport unit, based upon the request, to the processing tool. An online monitoring of a physical characteristic of the slurry is performed. The online monitoring of the slurry includes analyzing an optical signal sent through the slurry to determine whether the physical characteristic of the slurry is within a predetermined level of tolerance.
    Type: Application
    Filed: December 11, 2003
    Publication date: August 19, 2004
    Inventors: Ashutosh Misra, Matthew L. Fisher
  • Patent number: 6762832
    Abstract: Provided are methods and systems for controlling the concentration of a component in a composition, and semiconductor processing methods and systems. One exemplary method of controlling the concentration of a component in a composition involves: providing a composition which has a liquid portion, wherein the liquid portion contains a component to be monitored; performing an absorption spectroscopy measurement on a sample of the composition; and controlling the concentration of the component in the composition based on the absorption spectroscopy measurement using a feedback control loop. The invention allows for controlling the concentration of a component in a composition, for example, a corrosion inhibitor in a chemical planarization (CMP) chemical, as well as in pre- and post-CMP storage/treatment chemicals, and can provide real time, accurate process control in a simple and robust manner.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: July 13, 2004
    Assignee: Air Liquide America, L.P.
    Inventors: Matthew L. Fisher, David L. Snyder, Ashutosh Misra
  • Patent number: 6749691
    Abstract: Methods of removing discoloration from a metal surface of an electronic device are presented the methods comprising the steps of exposing a metallic surface of an electronic device to a first composition comprising an organic reagent, the metallic surface having discoloration thereon, under conditions sufficient to form a first intermediate metallic surface substantially devoid of non-ionic residues; a second step of contacting the first intermediate metallic surface with a second composition comprising an acid under conditions sufficient to form a second intermediate metallic surface substantially devoid of non-ionic residues, oxides, hydroxides and the like; and rinsing the second intermediate metallic surface with deionized water.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: June 15, 2004
    Assignee: Air Liquide America, L.P.
    Inventors: Ashutosh Misra, Matthew L. Fisher
  • Patent number: 6747681
    Abstract: Smoother transitions between changing cursor images which are less stressful to the interactive user of a computer controlled display are provided by apparatus for changing the cursor image, including a frame buffer for storing the display screen image as a pixel array, a separate display buffer for storing the current cursor image as a pixel array, together with apparatus for storing an alternate cursor image as a pixel array during the display of the current cursor image, and means for replacing the current cursor image with the alternate cursor image. In raster scan apparatus for maintaining screen images in the frame buffer on said display screen, there are means for effecting the replacement of said cursor images during a vertical blanking period in said raster scanning.
    Type: Grant
    Filed: August 5, 1999
    Date of Patent: June 8, 2004
    Assignee: International Business Machines Corporation
    Inventors: Narendra Maganlal Desai, Neal Richard Marion, Ashutosh Misra, Raju Bala Showry Pudota, Seetharam Gundu Rao