Abstract: A microcontroller for a control unit, in particular for a vehicle control unit, includes a central processing unit (CPU), at least one interface-unspecific input module, at least one interface-unspecific output module, at least one routing unit and at least one arithmetic unit for processing interface-specific information. The microcontroller is configurable in such a way that the at least one interface-unspecific input module, the at least one interface-unspecific output module, the at least one routing unit and the at least one arithmetic unit for processing interface-specific information fulfill functions corresponding to one of multiple serial interfaces, in particular of SPI, UART, LIN, CAN, PSI5, FlexRay, SENT, IC2, MSC or Ethernet. In addition, the input module stores an entire input message frame of the input data and makes this available to the arithmetic unit or the central processing unit (CPU).

Abstract: A microcontroller for a control unit or a vehicle control unit, includes a central processing unit (CPU), at least one interface-unspecific input module, at least one interface-unspecific output module, at least one routing unit and at least one arithmetic unit for processing interface-specific information. The microcontroller is configurable so that the at least one interface-unspecific input module, the at least one interface-unspecific output module, the at least one routing unit and the at least one arithmetic unit for processing interface-specific information fulfill the functions corresponding to one of multiple serial interfaces, in particular of SPI, UART, LIN, CAN, PSI5, FlexRay, SENT or Ethernet. In addition, the arithmetic unit is configured to generate an entire output message frame from the second payload data as output data and to transmit the same to the interface-unspecific output module.

Abstract: A method for synthesizing a circuit layout, characterized by the following features: primary circuit functions are placed on the circuit layout; secondary circuit functions are placed on the circuit layout; at least one first mask is generated in such a way that the first mask reproduces the primary circuit functions and covers the secondary circuit functions when a semiconductor substrate is structured according to the circuit layout by way of the first mask; and the placement of the circuit functions takes place in such a way that at least one changed mask reproduces the primary circuit functions and the secondary circuit functions when the semiconductor substrate is structured according to the circuit layout by way of at least one second mask.

Abstract: A communication system and a method for operating a communication system, the communication system having a CAN bus and at least two devices connected with the aid of the CAN bus. Such a device has a CAN control unit, an asynchronous, serial communication (ASC) interface unit, and a switch. The CAN control unit is suitable for transmitting, in a first transmission mode, CAN data frames over the CAN bus with the aid of a first physical protocol. The asynchronous, serial communication interface unit or ASC interface unit is suitable for transmitting, in a second transmission mode, ASC data frames over the CAN bus with the aid of a second physical protocol. The switch is designed for switching over between the first transmission mode and the second transmission mode as a function of at least one agreement effective between the device and at least one other device.

Abstract: A direct memory access control device for at least one computing unit includes a terminal for connecting the direct memory access control device to a bus system that connects the computing unit to a working memory, and processing circuitry configured to read out, from a source module connected to the bus system, first data of at least one information block stored at least temporarily in the source module, ascertain a target address in the working memory for the at least one information block as a function of the first data and of configuration information, and transmit the at least one information block from the source module to the target address using a direct memory access by the source module to the working memory.

Abstract: A method and a device for testing a computer core in a processor having at least two computer cores is described. The computer cores are connected to each other via an internal connecting system, both computer cores contributing toward the operating sequence of a machine. In the method for testing a computer core, with which a high error detection rate may be achieved in a minimum outlay of time, a test is run in one computer core, while a program for executing the driving operation of the motor vehicle is being processed in the other computer core at the same time.

Abstract: A system of at least two microcontrollers, each of the at least two microcontrollers having a respective hardware interface that is set up for a terminal of a contact connection, and the at least two microcontrollers being functional both when they are coupled by a contact connection in data-transmitting fashion via the hardware interfaces as well as independently. An electronic component, a computing unit, and a method for producing such a system, are also described.

Abstract: A method for updating a control device having a first processor core and having a first flash memory associated with the first processor core, in which the first processor core works with a first block of the first flash memory, in which while it is working, a second block, electronically separate from the first block, of the first flash memory is reprogrammed with a predefined memory image; and in which after reprogramming, the first processor core is switched over from the first block of the first flash memory to the second block of the first flash memory.

Abstract: A method for operating a control device, in which in a first operating mode of the control device the first processor core is operated predominantly locally with the first flash memory, and the second processor core is operated predominantly locally with the second flash memory, in a second operating mode of the control device the first processor core and the second processor core are operated with the first flash memory, and in which in a third operating mode of the control device the first processor core and the second processor core are operated with the second flash memory.

Abstract: An integrated circuit, preferably for controlling vehicle functions, having an analog-digital converter for converting an analog signal into digital measurement values, a DSP unit, connected downstream from the analog-digital converter, for pre-processing the digital measurement values, a central computing unit, connected to the DSP unit so as to transmit data, for further processing of the digital measurement values, the DSP unit being set up to control the analog-digital converter during operation.

Abstract: A system of at least two microcontrollers on a common semiconductor substrate, each of the at least two microcontrollers respectively having one hardware interface, and the at least two microcontrollers being coupled in data-transmitting fashion via the hardware interfaces by a coupling device.

Abstract: A digital circuit configuration for generating a pulse-width modulated signal, particularly for regulating an analog electrical variable using pulse-width modulation, is described in which an actual value of the analog variable present at the input of an A/D converter is converted to a digital output variable, the digital output variable of the A/D converter being provided or supplied to a comparator unit, which compares the output variable to an upper threshold value and to a lower threshold value; at the output of the comparator unit, a signal being present which indicates whether the output variable of the A/D converter lies above the upper threshold value or below the lower threshold value; and it being particularly provided that the output of the A/D converter is connected to a digital timer, using which the pulse-width ratio of a generated pulse-width modulated signal is settable.

Abstract: A circuit arrangement for a data processing system is configured to process data in a plurality of modules. The circuit arrangement is configured such that each module is provided with at least one clock pulse, a time base and a base of at least one additional physical variable. The circuit arrangement also comprises a central routing unit to which the plurality of modules are coupled and via which the plurality of modules can periodically exchange data amongst themselves, based on the time base and/or the base of other physical variables. Each module is configured independently and parallel to other modules of the plurality of modules in order to process data. The circuit arrangement is employed in a corresponding method.

Abstract: A method for carrying out a refresh of a memory area of a non-volatile memory unit of an embedded system includes refreshing the memory area when a refresh-triggering criterion is satisfied, a check being performed at predefined time intervals to determine whether the refresh-triggering criterion is satisfied, the embedded system being automatically activated and the check being performed if the embedded system is deactivated following the expiration of any of the predefined time intervals.

Abstract: A method for performing a refresh of a first memory area of a non-volatile memory unit includes overwriting at least one additional memory area of the non-volatile memory unit with a memory content from the first memory area, adding a reference to the at least one additional memory area to a memory address area corresponding to the memory content and removing a reference to the first memory area from the memory address area corresponding to the memory content, overwriting the first memory area with the memory content from the at least one additional memory area, and subsequently replacing the reference in the memory address area with the reference to the first memory area.

Abstract: A microcontroller for use in a control device for an internal combustion engine includes: an analysis access via which internal data in the microcontroller can be accessed from outside the microcontroller; a clock generator which generates clock timing for data communication of the microcontroller with other units. The microcontroller is configured to change over from a first clock to a second clock when there is an access to the microcontroller via the analysis access.

Abstract: A method is provided for monitoring a control unit having a monolithically integrated processor arrangement including a processor unit and a security processor unit, the processor unit and the security processor unit respectively including one or multiple processor core(s) and a local memory and are designed monolithically, the processor unit carrying out different processes, the security processor unit monitoring whether the different processes carried out by the processor unit are carried out according to certain process criteria and the security processor unit carrying out a safety measure when one of the processes is not carried out according to the certain process criteria.

Abstract: A digital circuit configuration for generating a pulse-width modulated signal, particularly for regulating an analog electrical variable using pulse-width modulation, is described in which an actual value of the analog variable present at the input of an A/D converter is converted to a digital output variable, the digital output variable of the A/D converter being provided or supplied to a comparator unit, which compares the output variable to an upper threshold value and to a lower threshold value; at the output of the comparator unit, a signal being present which indicates whether the output variable of the A/D converter lies above the upper threshold value or below the lower threshold value; and it being particularly provided that the output of the A/D converter is connected to a digital timer, using which the pulse-width ratio of a generated pulse-width modulated signal is settable.

Abstract: A method for evaluating an analog signal of an inductive sensor that carries data on a rotational motion includes directly connecting the inductive sensor to an A-D converter via resistors, and reading in the analog signal by the A-D converter to emit digital data. The digital data is evaluated to determine zero crossings of the analog signal.

Abstract: A memory module has at least one secure and at least one insecure memory area, separate write/read electronic units for each of the memory areas and at least one shared analog circuit part such as a voltage supply circuit for supplying the write/read electronic units and/or the memory areas.