Abstract: A method for serially transmitting data between a first and a second station is provided, the first station unidirectionally transmitting at least two signals to the second station on two signal paths. In this method, a shift register is provided in each station, the two signal paths of the first station being routed in parallel into a shift register, and the data transmission to the second station being carried out by automatically clocking the shift register from a time base.

Abstract: A method for monitoring the functioning of a control unit for the activation of output stages, for example, in a motor vehicle, is provided. The control unit includes a main computing element having at least one microprocessor, and at least one auxiliary computing element having at least one microprocessor. The main computing element and the at least one auxiliary computing element may access a common memory element. The present system enables monitoring of the control unit that is as simple as possible but is nonetheless secure and reliable, by providing that during normal operation of the control unit, the content of a specifiable memory location of the memory element be queried by at least one of the auxiliary computing elements at presettable times, given a functioning main computing element, the content having previously been written with a presettable value by the same.

Abstract: A method for monitoring the operating readiness of memory elements which are assigned to an electronic unit, an engine control unit for example. Furthermore, an electronic unit for executing the method and a computer program, as well as a computer program product are described. In the method described, a supply voltage of the electronic unit is monitored to ensure error-free operation of the memory elements.

Abstract: In order to detect the exchange of a module, identified by a serial number, in a microprocessor system,

Abstract: A microprocessor system includes a plurality of modules, among them a microprocessor and at least one storage module for storing the code and/or data for the microprocessor. Stored, in a non-changeable manner, in at least one of the modules, referred to as exchange-protected module, is a serial number of this module. A control module is configured to receive a data value specified by the at least one serial number and to block, at least partially, the function of the microprocessor system if the received data value does not match an expected data value encoded in the control module.

Abstract: An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The diagnostic data are transmitted via a first transmission channel and the load control data and the pilot data are transmitted via a second transmission channel.

Abstract: An arrangement including a first semiconductor chip and a second semiconductor chip connected thereto, where the second semiconductor chip is additionally connected to electrical loads and drives these electrical loads on the basis of a timing which is prescribed to it by load control data, and where the first semiconductor chip transmits to the second semiconductor chip the aforementioned load control data and pilot data which control the second semiconductor chip, and where the second semiconductor chip transmits to the first semiconductor chip diagnostic data which represent states prevailing in the second semiconductor chip or events which occur. The first semiconductor chip transmits appropriate pilot data in order to prescribe to the second semiconductor chip what transmission rate is to be used by the second semiconductor chip to transmit the diagnostic data to the first semiconductor chip.

Abstract: A system for supplying power to a volatile semiconductor memory having a memory array, with the semiconductor memory being provided with a standby voltage that is present at a second connection of the semiconductor memory. To implement the power supply system as simply and with as few components as possible, the semiconductor memory is provided with a stabilization circuit for stabilizing the standby voltage that has a low impedance when the input voltage is elevated and a high impedance when the input voltage is too low to supply the semiconductor memory.

Abstract: A device having a processor and a memory element positioned outside the processor, as well as a device for linking a memory element to a processor, and a memory element, are described, the processor and the memory element being linked via address and/or data lines, the address and/or data lines each being implemented in a structure combining a differential structure, LVDS in particular, and a structure having transistors which switch to ground and voltage, SSTL in particular, which has corresponding transmitters and receivers.

Abstract: A memory element and a device having a processor and a memory element, the memory element being positioned outside of the processor and being connectible to a processor via address and/or data lines, the address and/or data lines are each configured in an LVDS structure having corresponding drivers and receivers, and the drivers and receivers each being integrated in the memory element or in the processor.

Abstract: A method and an apparatus for starting up a control unit for a motor vehicle from a reset state. In order to be able, after startup of the control unit, to continue an operation interrupted by the reset of the control unit at the point where it was interrupted, the following steps are performed: checking whether an operation to be monitored had been initiated prior to the reset of the control unit; continuing the operation to be monitored if the operation to be monitored had been initiated prior to the reset of the control unit; and initiating the operation to be monitored if the operation to be monitored had not been initiated prior to the reset of the control unit, provided the operation to be monitored is to be initiated.

Abstract: There is provided a register system of a microcomputer having a register that includes at least one register bit and having an additional storage arrangement allocated to the register and on which the data content of the register is able to be intermediately stored. To reduce the computing time for saving the data content of the register, while keeping the silicon surface required for the register system as small as possible, the additional storage arrangement includes at least one shift register having at least two shift register cells, the content of an arbitrary shift register cell being transferable into a register bit, and, conversely, the content of a register bit being transferable into an arbitrary shift register cell.

Abstract: A method is described for storing and processing/filtering signals, as well as a memory arrangement, a signal processing arrangement and, in particular, a digital filter arrangement having a plurality of filter modules for digital processing/filtering of input values, having a memory area and a signal processing module, which contains in particular at least one multiplier-accumulator which has at least one multiplier and at least one adder. The input values, coefficients, and output values of the arrangement can be stored in the memory area and called up again therefrom as needed. The input values are gated with the coefficients to form output values. In order to alleviate the load on a higher-level microprocessor by digital processing/filtering of the input values, it is proposed that the digital filter arrangement have a Direct Memory Access controller for coordinating data transmission of the filter coefficients, input values and output values between the multiplier-accumulator and the memory area.

Abstract: A method and a device having a processor module for controlling operating sequences, in particular in an engine control unit in a motor vehicle, peripheral elements being selected by a processor module having a predetermined number of select interfaces by select signal output over these select interfaces, and instructions being transmitted to the peripheral elements over at least one information interface of the processor module. Selection identifiers are assigned to the instructions and transmitted together with them. Thus, a selection of peripheral elements is made by a select signal and a selection identifier.

Abstract: A device and method for identifying the version of integrated circuits IC is described, an ID, which indicates the respective version of the integrated circuit IC, being written in the form of at least one individually settable binary signal in a register R and being readable from the register R. The integrated circuit IC is constructed from multiple mask levels M1 to M5, at least one possible conduction path L2 being introduced through all mask levels M1 to M5 of the integrated circuit for each settable binary signal BS. The binary signal is settable according to whether the at least one conduction path through all mask levels conducts or is interrupted, means being contained which write the binary signal, which is set via the at least one conduction path, into the register. This method and this device may also be used for controlling operating sequences by a control unit.

Abstract: A method of testing and/or monitoring the system frequency of a microcontroller, in which the working frequency of a voltage-regulated oscillator or VCO, which is in an operative connection with the microcontroller, is measured, and the system frequency being determined and/or checked on the basis of the measured working voltage.

Abstract: The invention concerns a method and an apparatus for starting up a control unit for a motor vehicle from a reset state.

Abstract: A method for monitoring the functioning of a control unit for the activation of output stages, for example, in a motor vehicle, is provided. The control unit includes a main computing element having at least one microprocessor, and at least one auxiliary computing element having at least one microprocessor. The main computing element and the at least one auxiliary computing element may access a common memory element. The present invention enables monitoring of the control unit that is as simple as possible but is nonetheless secure and reliable, by providing that during normal operation of the control unit, the content of a specifiable memory location of the memory element be queried by at least one of the auxiliary computing elements at presettable times, given a functioning main computing element, the content having previously been written with a presettable value by the same.

Abstract: A system for supplying power to a volatile semiconductor memory (1) having a memory array (3), with the semiconductor memory (1) being provided with a standby voltage (V_STBY) that is present at a second connection (7) of the semiconductor memory (1). To implement the power supply system as simply and with as few components as possible, the semiconductor memory (1) is provided with a stabilization circuit (10) for stabilizing the standby voltage (V_STBY) that has a low impedance when the input voltage (V_STBY) is elevated and a high impedance when the input voltage (V_STBY) is too low to supply the semiconductor memory (1, 1a).

Abstract: In a device and method for programming a control unit, the control unit is connectable to an external programming unit via a communications interface, an internal communications link connecting the communications interface to a monitoring unit, and the monitoring unit having a programming element and a communications element, a switching arrangement being provided for switching the communications link between the programming element and the communications element.