Patents by Inventor Bernard Aspar

Bernard Aspar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6593036
    Abstract: The invention concerns a structure for a lithographic reflection mask comprising a receive medium (12) on which is fixed a reflector (11) including at least one layer, the reflector (11) being fixed to the receive medium (12) in a reverse manner relative to a manufacturing medium (10) on which it has previously been manufactured and which is then
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: July 15, 2003
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Jean-Yves Robic, Bernard Aspar
  • Publication number: 20030077885
    Abstract: This invention relates to a substrate (1) weakened by the presence of a micro-cavities zone, the micro-cavities zone (4′) delimiting a thin layer (5) with one face (2) of the substrate (1), some or all of the gaseous species having been eliminated from the micro-cavities (4′).
    Type: Application
    Filed: November 22, 2002
    Publication date: April 24, 2003
    Inventors: Bernard Aspar, Chrystelle Lagahe, Olivier Rayssac, Bruno Ghyselen
  • Publication number: 20030052945
    Abstract: The invention relates to a structure comprising a sequence of elements (t) for sending or receiving a signal along an axis. Two successive elements (t) along the direction of the axis are offset with respect to each other along the direction perpendicular to the axis. The structure comprises at least two layers of material (K1, K2) deposited on a reception substrate (S1) using the layer transfer technique.
    Type: Application
    Filed: October 10, 2002
    Publication date: March 20, 2003
    Inventors: Francois Baleras, Gilles Poupon, Bernard Aspar
  • Publication number: 20030047289
    Abstract: A substrate holder is provided with two kinds of grooves (clearances) in the absorbing surface thereof. One kind of groove is made of a suitable depth so as to be able to quickly exhaust air and reduce pressure to thereby vacuum mount a substrate, and the other kind of groove is formed with a very small depth within such a range that there is no influence of dust being interposed between the holder and the substrate, in order to better the heat conduction between the substrate and the substrate holder. In addition, the area of the latter is made large as compared with the area of the former.
    Type: Application
    Filed: September 17, 2002
    Publication date: March 13, 2003
    Inventors: Claude Jaussaud, Michel Bruel, Bernard Aspar
  • Patent number: 6465327
    Abstract: The invention relates to a method for producing a thin membrane, comprising the following steps: implanting gas species, through one surface of a first substrate (10) and through one surface of a second substrate (20), which in said substrates are able to create microcavities (11, 21) delimiting, for each substrate, a thin layer (13, 23) lying between these microcavities and the implanted surface, the microcavities being able, after their implantation, to cause detachment of the thin layer from its substrate; assembly of the first substrate (10) onto the second substrate (20) such that their implanted surfaces face one another; detaching each thin layer (13, 23) from its substrate (10, 20), the thin layers remaining assembled together to form said thin membrane. The invention also concerns a thin membrane structure obtained with this method.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: October 15, 2002
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Michel Bruel, Claude Jaussaud, Chrystelle Lagahe
  • Patent number: 6429094
    Abstract: Process for providing separable structures comprising providing at least two structures wherein at least one structure contains a diffusable element contacting said structures under conditions providing molecular bonding of said structures along a bonding interface and heating said bonded structures under conditions causing diffusion of the diffusable element to the bonding interface where said diffusable element interacts with the bonding interface enabling the unbounding of said structures along the bonding interface. This process is useful in the manufacture of devices with integrated circuits.
    Type: Grant
    Filed: August 11, 1998
    Date of Patent: August 6, 2002
    Assignee: Commissariat A l'Energie Atomique
    Inventors: Christophe Maleville, Bernard Aspar
  • Publication number: 20020094668
    Abstract: A structure comprising a thin layer (2) that can be integral with a support (3), the thin layer being a layer of a semiconductor material made insulating by ion implantation except for at least one zone that permits a vertical electrical connection through the entire thickness of the thin layer (2). A method of manufacturing such a structure is also disclosed.
    Type: Application
    Filed: February 6, 2002
    Publication date: July 18, 2002
    Inventors: Bernard Aspar, Michel Bruel, Eric Jalaguier
  • Patent number: 6403450
    Abstract: The invention concerns a method for treating, a substrate comprising a semi-conducting layer (4) on at least one of its surfaces. Said method comprises a step for annealing the substrate and a step for forming, an oxide layer (6) at the semi-conducting layer (4) surface, carried out before the end of the annealing step, protecting the remainder of the semi-conducting layer (4).
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: June 11, 2002
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Christophe Maleville, Thierry Barge, Bernard Aspar, Hubert Moriceau, André-Jacques Auberton-Herve
  • Patent number: 6362077
    Abstract: A structure comprising a thin layer (2) that can be integral with a support (3), the thin layer being a layer of a semiconductor material made insulating by ion implantation except for at least one zone that permits a vertical electrical connection through the entire thickness of the thin layer (2). A method of manufacturing such a structure is also disclosed.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: March 26, 2002
    Assignee: Commissariat a l'Atomique
    Inventors: Bernard Aspar, Michel Bruel, Eric Jalaguier
  • Publication number: 20020022337
    Abstract: Treatment process for bonding two structures (200, 220) by molecular adhesion on a bonding interface (224), and unbonding of the two structures along the said bonding interface.
    Type: Application
    Filed: August 11, 1998
    Publication date: February 21, 2002
    Inventors: CHRISTOPHE MALEVILLE, BERNARD ASPAR
  • Patent number: 6335258
    Abstract: The present invention relates to a production method for a thin film on a support that includes an ionic implantation stage in order to demarcate the thin film in a substrate, the aim of the ionic implantation being to create a layer of micro-cavities in the substrate, a stage to bond the substrate to a support element using close contact and a heat treatment stage intended to bring the layer of micro-cavities to a temperature that is high enough to cause a split along said layer. At least one of said elements, substrate or support, is thinned before the heat treatment stage in order to maintain the close contact between the substrate and the support despite the stresses caused in the elements and resulting from the difference in their thermal dilation coefficients.
    Type: Grant
    Filed: June 18, 1999
    Date of Patent: January 1, 2002
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Michel Bruel, Thierry Barge
  • Patent number: 6316333
    Abstract: The invention relates to a process for obtaining a thin film from a substrate, the film being delimited in the substrate by ionic implantation and by heat treatment inducing a fracture line along which the film can be separated from the rest of the substrate. A particular area, for example composed of a gate oxide layer (15) and the channel area (19) of a MOS transistor (12) created in the substrate region (10) intended to form the tin film (20), this area may be protected by ionic implantation by masking using the transistor gate (16), which does not prevent the fracture from occurring provided that the width of the area does not exceed a limiting dimension determined for the material forming the substrate.
    Type: Grant
    Filed: July 14, 1999
    Date of Patent: November 13, 2001
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Michel Bruel, Bernard Aspar
  • Patent number: 6303468
    Abstract: The invention relates to a method of manufacturing a thin film of solid material comprising at least the following steps: a step of ionic implantation through one face of a substrate of said solid materials using ions capable of creating in the volume of the substrate and at a depth close to the mean depth of penetration of the ions, a layer of micro-cavities or micro-bubbles, this step being carried out at a particular temperature and for a particular length of time, an annealing step intended to bring the layer of micro-cavities or micro-bubbles to a particular temperature and for a particular length of time with the intention of obtaining cleavage of the substrate on both sides of the layer of micro-cavities or micro-bubbles. The annealing step is carried out to a thermal budget made in relation to the thermal budget of the ionic implantation step and possibly other thermal budgets inferred for other steps, in order to provide said cleavage of the substrate.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: October 16, 2001
    Assignee: Commissariat A l'Energie Atomique
    Inventors: Bernard Aspar, Michel Bruel
  • Publication number: 20010007789
    Abstract: The invention relates to a method of producing a thin layer of semiconductor material including:
    Type: Application
    Filed: February 6, 2001
    Publication date: July 12, 2001
    Inventors: Bernard Aspar, Michel Bruel, Thierry Poumeyrol
  • Patent number: 6225192
    Abstract: The invention relates to a method of producing a thin layer of semiconductor material including: a step of implanting ions through a flat face (2) of a semiconductor wafer in order to create a layer of microcavities, the ion dose being within a specific range in order to avoid the formation of blisters on the flat face, a thermal treatment step in order to achieve coalescence of the microcavities possibly, a step of creating at least one electronic component (5) in the thin layer (6), a separation step of separating the thin layer (6) from the rest (7) of the wafer.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: May 1, 2001
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Michel Bruel, Thierry Poumeyrol
  • Patent number: 6204079
    Abstract: A process for the selective transfer of elements from a transfer support to a reception support, the elements bonding through a first face to the transfer support according to a defined bonding energy, the elements each having a second face configured to contact with the reception support. Elements to be transferred are transferred by applying a bonding energy between them and the reception support that exceeds the bonding energy between their first face and the transfer support. Elements not to be transferred onto the transfer support are retained.
    Type: Grant
    Filed: July 14, 1999
    Date of Patent: March 20, 2001
    Assignee: Commissariat A l'Energie Atomique
    Inventors: Bernard Aspar, Hubert Moriceau, Olivier Rayssac
  • Patent number: 6197695
    Abstract: This invention relates to a process for the manufacture of one electronic structure comprising at least one active component and at least one passive component or element on a support substrate made of an insulating material. A characteristic process comprises the following steps: make the active component in a surface layer made of semiconducting material from an initial substrate comprising a wafer of semiconducting material supporting the said surface layer, make electrical insulation areas capable of insulating the passive component or element from the active component, make the passive component or element on and/or in the electrical insulation areas, prepare the surface of the initial substrate face with the said electronic structure to make this face compatible for bonding with another substrate by molecular bonding, perform the bonding, the other substrate being the said support substrate made of an insulating material, eliminate all or part of the wafer of semiconducting material.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: March 6, 2001
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Jean-Pierre Joly, Bernard Aspar, BĂ©atrice Biasse, Marc Zussy
  • Patent number: 6190998
    Abstract: A method for making a thin film of solid material, including bombarding one face of a substrate of the solid material with at least one of rare gas ions and hydrogen gas ions so as to create a layer of microcavities seperating the substrate into two regions at a depth neighboring the average ion penetration depth, and heating the layer of microcavities to a temperature sufficient to bring about a separation between the two regions of the substrate. The solid material includes one of a dielectric material, a conducting material, a semi-insulating material, and an unorganized semiconducting material.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: February 20, 2001
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Michel Bruel, Bernard Aspar
  • Patent number: 6110802
    Abstract: Process for producing a structure having a low dislocation density comprising an oxide layer buried in a semiconductor substrate. This process for producing an epitaxied structure with a low dislocation density has the structure incorporating an oxide layer (6) in a substrate (4) made from a semiconductor material and successively involves at least one implantation of oxygen ions in the substrate (4), at least one first conditioning heat treatment of the substrate, an epitaxy of a layer (14) of a semiconductor material on the substrate and a second heat treatment for eliminating dislocations (8) from the structure.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: August 29, 2000
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Jacques Margail, Catherine Pudda
  • Patent number: 6103597
    Abstract: A method of obtaining a thin film from a substrate made of semiconductor material, the thin film including at least one element on one face of the substrate made of a material different from the semiconductor material, and conferring to the thin film a heterogeneous structure.
    Type: Grant
    Filed: April 11, 1997
    Date of Patent: August 15, 2000
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Bernard Aspar, Beatrice Biasse, Michel Bruel