Patents by Inventor Bhanwar Singh

Bhanwar Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6594024
    Abstract: One aspect of the present invention relates to an in-line system for monitoring and optimizing an on-going CMP process in order to determine a CMP process endpoint comprising a wafer, wherein the wafer is subjected to the CMP process; a CMP process monitoring system for generating a signature related to wafer dimensions for the wafer subjected to the CMP process; and a signature library to which the generated signature is compared to determine a state of the wafer. Another aspect relates to an in-line method for monitoring and optimizing an on-going CMP process involving providing a wafer, wherein the wafer is subjected to a CMP process; generating a signature associated with the wafer; comparing the generated signature to a signature library to determine a state of the wafer; and using a closed-loop feedback control system for modifying the on-going CMP process according to the determined state of the wafer.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: July 15, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Ramkumar Subramanian, Khoi A. Phan, Bharath Rangarajan, Carmen Morales
  • Patent number: 6593210
    Abstract: One aspect of the present invention relates to a method of forming trench isolation regions within a semiconductor substrate, involving the steps of forming trenches in the semiconductor substrate; depositing a semi-conformal dielectric material over the substrate, wherein the semi-conformal dielectric material has valleys positioned over the trenches; forming an inorganic conformal film over the semi-conformal dielectric material; polishing the semiconductor substrate whereby a first portion of the inorganic conformal film is removed thereby exposing a portion of the semi-conformal dielectric material, and a second portion remains over the valleys of the semi-conformal dielectric material; removing the exposed portions of the semi-conformal dielectric material; and planarizing the substrate to provide the semiconductor substrate having trenches with a dielectric material therein.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: July 15, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Ursula Q. Quinto
  • Patent number: 6591658
    Abstract: The present invention provides systems, methods, and standards for calibrating nano-measuring devices. Calibration standards of the invention include carbon nanotubes and methods of the invention involve scanning carbon nanotubes using nano-scale measuring devices. The widths of the carbon nanotube calibration standards are known with a high degree of accuracy. The invention allows calibration of a wide variety of nano-scale measuring devices, taking into account many, and in some cases all, of the systematic errors that may affect a nano-scale measurement. The invention may be used to accurately calibrate line width, line height, and trench width measurements and may be used to precisely characterize both scanning probe microscope tips and electron microscope beams.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: July 15, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Sanjay K. Yedur, Bhanwar Singh, Bryan K. Choo, Michael K. Templeton, Ramkumar Subramanian
  • Patent number: 6593748
    Abstract: The present invention relates to a system for controlling a thin film formation process using a corona discharge measurement technique. The system includes a thin film formation system operative to form a thin film based on one or more process parameters, a corona discharge measurement system operable to measure one or more properties of the thin film, and a processor operatively coupled to the thin film formation system and the corona discharge measurement system, wherein the processor analyzes the data from the corona discharge measurement system and a set of target data and controls the one or more process parameters via the thin film formation system based on the analysis. The present invention also relates to a method for controlling a thin film formation using a corona discharge technique.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: July 15, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Arvind Halliyal, Bhanwar Singh, Ramkumar Subramanian
  • Patent number: 6589717
    Abstract: An exemplary method of selectively patterning a hard mask or reticle using a laser to cause deposition of hard mask material in locations forming the hard mask pattern. This method can include providing a vapor in a vapor chamber containing an integrated circuit substrate, and applying a laser to selected areas of the integrated circuit substrate to cause a reaction with the vapor and create a structure on the integrated circuit substrate.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: July 8, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kouros Ghandehari, Bruno LaFontaine, Bhanwar Singh
  • Patent number: 6589711
    Abstract: There is provided a method of making a dual inlaid via in a first layer. The first layer may be a polymer intermetal dielectric, such as HSQ, of a semiconductor device. The method includes forming a first opening, such as a via, in the first layer and forming a bilayer resist in the first opening. The bilayer resist includes an imaging layer above a bottom antireflective coating (BARC). The imaging layer is selectively exposed to radiation such that no radiation reaches the lower section of the BARC in the first opening through the upper section of the BARC. The bilayer resist is pattered, and a second opening, such as a trench, is formed in communication with the first opening using the patterned bilayer resist as a mask.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: July 8, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Christopher F. Lyons, Marina V. Plat, Bhanwar Singh
  • Patent number: 6589804
    Abstract: A system for regulating ON and/or ONO dielectric formation is provided. The system includes one or more light sources, each light source directing light to one or more oxide and/or nitride layers being deposited and/or formed on a wafer. Light reflected from the oxide and/or nitride layers is collected by a measuring system, which processes the collected light. The collected light is indicative of the thickness and/or uniformity of the respective oxide and/or nitride layers on the wafer. The measuring system provides thickness and/or uniformity related data to a processor that determines the thickness and/or uniformity of the respective oxide and/or nitride layers on the wafer. The system also includes a plurality of oxide/nitride formers; each oxide/nitride former corresponding to a respective portion of the wafer and providing for ON and/or ONO formation thereon.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: July 8, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Arvind Halliyal, Bhanwar Singh, Ramkumar Subramanian
  • Patent number: 6583871
    Abstract: A system adapted to provide in-situ detection of closed area defects and a method for the same is provided. The system comprises a light source for directing light on to a wafer having a grating pattern etched thereon; a light detector for collecting the light reflected from the wafer; a processor operatively coupled to the light detector for converting the collected light into data associated with the grating pattern and determining the presence of the closed area defect; and a controller operatively coupled to the processor for determining whether the wafer requires additional processing to repair the closed area defect.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: June 24, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Khoi A. Phan, Ramkumar Subramanian
  • Patent number: 6579733
    Abstract: The present invention provides systems and methods wherein scatterometry is used to control an implant processes, such as an angled implant process. According to the invention, data relating to resist dimensions is obtained by scatterometry prior to an the implant process. The data is used to determine whether a resist is suitable for an implant process and/or determine an appropriate condition, such as an angle of implant or implantation dose, for an implant process.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: June 17, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Ramkumar Subramanian
  • Patent number: 6579651
    Abstract: The present invention relates to a system and method of modifying mask layout data to improve the fidelity of mask manufacture. The system and method include determining the difference between the mask layout design and the mask features as written, and generating sizing corrections. The sizing corrections can be used to modify the mask layout data, and/or stored in a database.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: June 17, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Khoi A. Phan, Bhanwar Singh, Bharath Rangarajan
  • Patent number: 6572252
    Abstract: The present invention relates to illuminating an interior portion of a processing chamber in a semiconductor processing system. A fiber optic light source is operatively associated with the processing chamber to illuminate the interior of the chamber to facilitate viewing the interior of the chamber.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: June 3, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Khoi A. Phan, Bryan K. Choo, Ramkumar Subramanian
  • Patent number: 6573498
    Abstract: The present invention relates to a system and method for calibrating a scanning electron microscope (SEM). The method comprises measuring an electrical characteristic of a calibration standard reference sample feature and correlating the electrical measurement with an SEM measurement thereof. The correlation of the electrical and SEM measurements provides a critical dimension (CD) for the reference sample feature which can then be used to correlate SEM measurements of workpiece features. The system provides a reference sample having a measurable feature electrically connected to a probe. The probe provides an electrical measurement of the reference sample feature. The system further comprises a scanning electron microscope (SEM) adapted to provide an optical measurement of the reference sample feature. A processor is provided to correlate the optical and electrical measurements of the reference sample feature, whereby a reference feature CD is obtained.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: June 3, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Khoi Phan, Michael K. Templeton
  • Patent number: 6573497
    Abstract: The present invention relates to a system and method for calibrating a scanning electron microscope (SEM). The method comprises measuring an electrical characteristic of a calibration standard reference sample feature via a current induced by an electron beam (e-beam) and correlating the e-beam induced current measurement with an SEM measurement thereof. The correlation of the e-beam induced current and SEM measurements provides a critical dimension (CD) for the reference sample feature which can then be used to correlate SEM measurements of workpiece features. The system provides a reference sample having a measurable feature electrically connected to a probe. The probe provides an electrical measurement of the reference sample feature based on an e-beam induced current. The system further comprises a scanning electron microscope (SEM) adapted to provide an optical measurement of the reference sample feature and workpiece features.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: June 3, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bharath Rangarajan, Bhanwar Singh, Khoi Phan, Michael K. Templeton
  • Patent number: 6570157
    Abstract: The present invention relates to a system and method for calibrating a scanning electron microscope (SEM). The method comprises using a reference having multiple features of different dimensions and spatial interrelationships, wherein more than one feature dimension or spacing is measured using the SEM prior to measuring a workpiece. The dimensional and/or spatial measurements from the reference sample are correlated to obtain one or more calibration factors for the SEM. The calibration factor or factors may then be correlated with a workpiece SEM measurement to obtain a workpiece critical dimension (CD). A system is provided for calibrating a SEM including a reference with various measurable features of different dimensions and/or spacing. The system comprises an SEM to measure one or more reference sample feature dimensions and/or spacings and a processor or other device to correlate the measurement data to obtain one or more calibration factors.
    Type: Grant
    Filed: June 9, 2000
    Date of Patent: May 27, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Khoi Phan, Bharath Rangarajan
  • Patent number: 6566655
    Abstract: The present invention provides a system and method that facilitates measuring and imaging topographical features of a substrate, including lines and trenches having reentrant profiles. One aspect of the invention provides an electron microscope that simultaneously scans a substrate with two or more electron beams that are directed against the substrate with substantially differing angles of incidence. Secondary electrons resulting from the interaction of the substrate with the beams are detected by one or more secondary electron detectors. Each secondary electron detector may simultaneously receive secondary electrons resulting from the interaction of the substrate with two or more electron beams. In another of its aspects, the invention provides methods of analysis that permit the interpretation of such data to analyze critical dimensions and form images of the substrate. Critical dimensions that may be determined include feature heights and reentrant profile shapes.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: May 20, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh, Sanjay K. Yedur
  • Patent number: 6561706
    Abstract: A system for monitoring a latent image exposed in a photo resist during semiconductor manufacture is provided. The system includes one or more light sources, each light source directing light to the latent image and/or one or more gratings exposed on one or more portions of a wafer. Light reflected from the latent image and/or the gratings is collected by a signature system, which processes the collected light. Light passing through the latent image and/or gratings may similarly be collected by the signature system, which processes the collected light. The collected light is analyzed and can be employed to generate feedback information to control the exposure. The collect light is further analyzed and can be employed to generate feed forward information that can be employed to control post exposure processes including development and baking processes.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: May 13, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bhanwar Singh, Michael K. Templeton, Bharath Rangarajan, Ramkumar Subramanian
  • Patent number: 6562248
    Abstract: A system for monitoring and controlling aperture etching in a complimentary phase shift mask is provided. The system includes one or more light sources, each light source directing light to one or more apertures etched on a mask. Light reflected from the apertures is collected by a measuring system, which processes the collected light. Light passing through the apertures may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the depth and/or width of the openings on the mask. The measuring system provides depth and/or width related data to a processor that determines the acceptability of the aperture depth and/or width. The system also includes a plurality of etching devices associated with etching apertures in the mask. The processor selectively controls the etching devices so as to regulate aperture etching.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: May 13, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Bhanwar Singh, Michael K. Templeton
  • Patent number: 6562185
    Abstract: A system for characterizing a chemical mechanical polishing process is provided. The system includes a wafer that has a metal, polysilicon, and/or dielectric layer and/or substrate and a temperature sensor located in and/or on the metal, polysilicon and/or dielectric layer and/or substrate. The system also includes a temperature monitoring system that can read the wafer temperature from the temperature sensors and that can analyze the wafer temperature to characterize the chemical mechanical polishing process. Such characterization includes producing information concerning relationships between wafer temperature and polishing rate, polishing uniformity and introduction of defects during polishing. Such relationships are correlated with wafer temperature as related to parameters like polishing time, pressure, speed, slurry properties and wafer/metal layer properties.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: May 13, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Steven C. Avanzino, Bhanwar Singh, Bharath Rangarajan, Ramkumar Subramanian
  • Patent number: 6563578
    Abstract: A system and method are disclosed for providing in-situ monitoring of thin film thickness, such as by employing a non-destructive optical measurement technique. The monitored film thickness may be employed to help achieve a desired feature film thickness and uniformity across a surface of a substrate. By monitoring film thickness during semiconductor processing, for example, one or more process control parameters may be adjusted to help achieve a desired film thickness and/or uniformity thereof.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: May 13, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Arvind Halliyal, Khoi A. Phan, Bhanwar Singh
  • Patent number: 6559446
    Abstract: A system and method are disclosed for measuring and/or imaging a feature having a re-entrant cross-sectional profile. Beams are emitted onto the feature and substrate at different angles during corresponding measurement intervals. An feature data set of the feature is characterized for each measurement interval. The data associated with each measurement interval are aggregated to provide a cross-sectional representation of the having dimensions proportional to the feature. As a result, a more accurate feature profile may be determined, including a cross-sectional dimension of the re-entrant feature at the juncture between the feature and substrate.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: May 6, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bryan K. Choo, Bhanwar Singh