Patents by Inventor Bhyrav Mutnury

Bhyrav Mutnury has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11664626
    Abstract: A staggered press-fit fish-eye connector for an information handling system includes multiple ground press-fit connectors and multiple signal press-fit connectors. The ground press-fit connectors include first, second, and third ground press-fit connectors. The signal press-fit connectors include first, second, third and fourth signal press-fit connectors. The ground press-fit connectors are substantially longer than the signal press-fit connectors. The first and second signal press-fit connectors are located between the first and second ground press-fit connectors, and the third and fourth signal press-fit connectors are located between the second and third ground press-fit connectors.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: May 30, 2023
    Assignee: Dell Products L.P.
    Inventors: Sandburg Hu, Bhyrav Mutnury, Lynn Kong
  • Patent number: 11656264
    Abstract: A high-speed signal subsystem testing system includes a processing system having a transmitter and a receiver, a loop back subsystem coupled to the transmitter and receiver to provide a testing communication path between the transmitter and the receiver, and a communication path testing engine coupled to the transmitter and the receiver. The communication path testing engine generates test signal(s) and transmits the test signal(s) via the transmitter and through the testing communication path provided by the loop back subsystem and, in response, receives test signal result(s) via the receiver and through the testing communication path provided by the loop back subsystem, The communication path testing engine processes the test signal result(s) to generate a testing impedance profile for the testing communication path, and compares the testing impedance profile to an expected impedance profile to determine whether a testing communication path issue exists in the testing communication path.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: May 23, 2023
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Patent number: 11646135
    Abstract: A high performance differential cable comprises a bulk differential cable formed with a dielectric core having a central cavity and a plurality of wire guides on the outer perimeter. A pair of differential signal conductors (DSC) may be divided into two sets of wires. The smaller wires provide higher signal transmission speeds with lower losses. A paddle board at each end of the bulk differential cable comprises an interconnecting structure for combining signals from the two sets of wires into the two DSCs.
    Type: Grant
    Filed: October 28, 2021
    Date of Patent: May 9, 2023
    Assignee: Dell Products L.P.
    Inventors: Bhyrav Mutnury, Sandor Farkas
  • Publication number: 20230138739
    Abstract: A circuit board may include a first signal via electrically coupled to multiple layers of the circuit board, a second signal via electrically coupled to multiple layers of the circuit board, and a pair of ground vias configured to provide electrical shielding between the first signal via and the second signal via, the pair of ground vias comprising a first ground via electrically coupled to a ground or power plane of the circuit board and a second ground via electrically coupled to the ground or power plane of the circuit board. The first signal via, the first ground via, and the second ground via may be arranged such that they form an angle of approximately 50 degrees having a vertex at the first signal via, a first ray extending from the first signal via through the first ground via and a second ray extending from the first signal via through the second ground via.
    Type: Application
    Filed: November 1, 2021
    Publication date: May 4, 2023
    Applicant: Dell Products L.P.
    Inventors: James CHEN, Mallikarjun VASA, Bhyrav MUTNURY
  • Publication number: 20230134420
    Abstract: A high performance differential cable comprises a bulk differential cable formed with a dielectric core having a central cavity and a plurality of wire guides on the outer perimeter. A pair of differential signal conductors (DSC) may be divided into two sets of wires. The smaller wires provide higher signal transmission speeds with lower losses. A paddle board at each end of the bulk differential cable comprises an interconnecting structure for combining signals from the two sets of wires into the two DSCs.
    Type: Application
    Filed: October 28, 2021
    Publication date: May 4, 2023
    Inventors: Bhyrav Mutnury, Sandor Farkas
  • Publication number: 20230136471
    Abstract: A system for preventing crosstalk between adjacent channels comprises a crossover connector positioned along a length of one channel such that a portion of a positive trace for a first channel is positioned adjacent to a positive trace of a positive trace of an adjacent channel. The position of the crossover connector is based on preventing crosstalk and crossover connectors on adjacent channels may be staggered to further prevent crosstalk. A crossover connector may be based on capacitors or resistors to prevent crosstalk.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 4, 2023
    Inventors: Bhyrav Mutnury, Sandor Farkas
  • Publication number: 20230133833
    Abstract: A system for providing signal temperature immunity to a printed circuit board (PCB) comprises moating a set of reference planes, forming a trench between a heat source and a stripline trace and positioning a perforated section of a plane on a reference plane opposite the heat source. Moating the reference planes increases thermal resistance, the trench removes dielectric material and replaces it with air and the perforated section causes heat to travel in a non-linear path. Vias positioned at the ends of the PCB route heat along the outer surfaces of the PCB to transfer heat to the ambient environment.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 4, 2023
    Inventors: Bhyrav Mutnury, Sandor Farkas
  • Patent number: 11641710
    Abstract: A circuit board may include a first signal via electrically coupled to multiple layers of the circuit board, a second signal via electrically coupled to multiple layers of the circuit board, and a pair of ground vias configured to provide electrical shielding between the first signal via and the second signal via, the pair of ground vias comprising a first ground via electrically coupled to a ground or power plane of the circuit board and a second ground via electrically coupled to the ground or power plane of the circuit board. The first signal via, the first ground via, and the second ground via may be arranged such that they form an angle of approximately 50 degrees having a vertex at the first signal via, a first ray extending from the first signal via through the first ground via and a second ray extending from the first signal via through the second ground via.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: May 2, 2023
    Assignee: Dell Products L.P.
    Inventors: James Chen, Mallikarjun Vasa, Bhyrav Mutnury
  • Publication number: 20230125954
    Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may receive, by a first conductive element of multiple conductive elements of an electromagnetic coupler device, a first signal; receive, by a second conductive element of the multiple conductive elements, a second signal; electromagnetically couple, by the multiple conductive elements, at least a portion of the first signal with the second signal; electromagnetically couple, by the multiple conductive elements, at least a portion of the second signal with the first signal; provide, by the first conductive element, the first signal with the at least the portion of the second signal to a first transmission line; and provide, by the second conductive element, the second signal with the at least the portion of the first signal to a second transmission line.
    Type: Application
    Filed: October 22, 2021
    Publication date: April 27, 2023
    Inventors: Bhyrav Mutnury, Sandor Farkas
  • Patent number: 11637587
    Abstract: An information handling system includes a transmitter that transmits data over a channel to a receiver. The transmitter operates to transmit a test sequence including a repeating sequence of a number of logic 1's and the number of logic 0's. The receiver operates to detect noise injected onto the channel based upon an output from a data eye sampler in response to the test sequence.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: April 25, 2023
    Assignee: Dell Products L.P.
    Inventors: Arun Chada, ChunLin Liao, Bhyrav Mutnury
  • Publication number: 20230119282
    Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may measure at least one of a first height value and a first width value of a first eye diagram of a first signal; measure at least one of a second height value and a second width value of a second eye diagram of a second signal; determine at least one of a height difference value and a width difference value respectively between the at least one of the first height value and the first width value of the first eye diagram and the at least one of the second height value and the second width value of the second eye diagram; and determine that the at least one of the height difference value and the width difference value respectively meets or exceeds a height threshold value or a width threshold value.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Bhyrav Mutnury, Umesh Chandra
  • Patent number: 11602043
    Abstract: A system may include a circuit board comprising a plurality of electrically-conductive layers separated and supported by layers of insulating material laminated together, wherein the plurality of electrically-conductive layers comprises a ground plane and the layers of insulating material comprise a surface layer having one or more openings through which the ground plane is exposed through the one or more openings. The system may also include a plurality of electrically-conductive pads formed on a surface of the surface layer and a cable comprising a first signal conductor mechanically contacted to a first pad of the plurality of electrically-conductive pads and a first drain conductor mechanically contacted to the ground plane through the one or more openings.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: March 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20230059860
    Abstract: An information handing system includes a transmitter, a receiver, and a differential signal channel. The transmitter provides a differential signal on a pair of differential outputs. The receiver receives the differential signal on a pair of differential inputs. The differential signal channel carries the differential signal from the differential outputs to the differential inputs. The differential signal is provided on the differential signal channel as a voltage swing between a first positive voltage and a first negative voltage with reference to a ground plane of the information handling system.
    Type: Application
    Filed: August 18, 2021
    Publication date: February 23, 2023
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 11585864
    Abstract: A high-speed signal subsystem testing system tests a processor transmitter and receiver coupled to a connector via a transmitter trace and a receiver trace, respectively. A transmitter test circuit on a testing board coupled to the connector compares a transmitter voltage received from the transmitter via the transmitter trace and the connector to a common mode voltage range and, in response to the transmitter voltage being outside the common mode voltage range, provides a transmitter trace issue signal. A receiver test circuit on the testing board coupled to the connector transmits a first test voltage towards the receiver, compares a second test voltage detected at the receiver test circuit in response to transmitting the first test voltage towards the receiver to a reference test voltage and, in response to the second test voltage being above the reference test voltage, provides a receiver trace issue signal.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: February 21, 2023
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Publication number: 20230046702
    Abstract: An information handling system includes a memory subsystem and a basic/input out system (BIOS). The BIOS performs multiple trainings of the memory subsystem, and each of the trainings is performed at a different temperature. The BIOS stores multiple derating values in a derating table of the BIOS, and each of the derating values corresponds to a respective tap value at a respective temperature. During a subsequent power on self test of the information handling system, the BIOS performs a first training of the memory subsystem, and stores a first set of tap values. During a runtime of the information handling system, a memory controller determines whether a temperature of the information handling system has changed by a predetermined amount. In response to the temperature changing by the predetermined amount, the memory controller utilizes the derating values in the derating table to automatically update the tap values.
    Type: Application
    Filed: October 26, 2022
    Publication date: February 16, 2023
    Inventors: Doug S. Winterberg, Wan-Ju Kuo, Bhyrav Mutnury
  • Patent number: 11582864
    Abstract: A printed circuit board for an information handling system includes a trace, a routing component, and one or more intermediate components. The trace has a first impedance, and the routing component has a second impedance. The intermediate components have respective intermediate impedances. Each of the intermediate impedances has a corresponding value in a range between a value of the first impedance and a value of the second impedance. The one or more intermediate impedances reduce an impedance discontinuity between the trace and the routing component.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: February 14, 2023
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20230036814
    Abstract: A contact for a high-speed data communication interface includes a first portion configured to be coupled to a first component associated with the high-speed data communication interface, a second portion configured to be coupled to a mating contact of a second component associated with the high-speed data communication interface, and a third portion configured to provide a sliding surface when coupled to the mating contact. The sliding surface is coated with a ferromagnetic coating.
    Type: Application
    Filed: July 21, 2021
    Publication date: February 2, 2023
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20230032371
    Abstract: A paddle card includes a printed circuit board and a twin-axial cable. The PCB includes a first signal pad on a top surface of the PCB and a second signal pad on a bottom surface of the PCB. The second signal pad is directly below the first signal pad. The twin-axial cable includes a first signal conductor coupled to the first signal pad and a second signal conductor coupled to the second signal pad.
    Type: Application
    Filed: July 27, 2021
    Publication date: February 2, 2023
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20230033643
    Abstract: An information handling system includes a transmitter that transmits data over a channel to a receiver. The transmitter operates to transmit a test sequence including a repeating sequence of a number of logic 1's and the number of logic 0's. The receiver operates to detect noise injected onto the channel based upon an output from a data eye sampler in response to the test sequence.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Inventors: Arun Chada, ChunLin Liao, Bhyrav Mutnury
  • Publication number: 20230030359
    Abstract: A staggered press-fit fish-eye connector for an information handling system includes multiple ground press-fit connectors and multiple signal press-fit connectors. The ground press-fit connectors include first, second, and third ground press-fit connectors. The signal press-fit connectors include first, second, third and fourth signal press-fit connectors. The ground press-fit connectors are substantially longer than the signal press-fit connectors. The first and second signal press-fit connectors are located between the first and second ground press-fit connectors, and the third and fourth signal press-fit connectors are located between the second and third ground press-fit connectors.
    Type: Application
    Filed: July 29, 2021
    Publication date: February 2, 2023
    Inventors: Sandburg Hu, Bhyrav Mutnury, Lynn Kong