Patents by Inventor Bhyrav Mutnury

Bhyrav Mutnury has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220189658
    Abstract: An aperiodically overlapping spiral-wrapped cable shield system includes a cable having cable components such as a pair of conductors, at least one insulator surrounding the pair of conductors, and at least one drain wire. The cable also includes a cable shield that is spirally wrapped around the cable components with a varying wrap pitch that provides a plurality of overlapping cable shield portions with varying overlap areas. When signals are transmitted using the cable components in the cable, the varying overlap areas of the plurality of overlapping cable shield portions create a plurality of varying LC circuits that are configured to generate a resonance that does not exceed a signal integrity resonance threshold for a signals.
    Type: Application
    Filed: December 16, 2020
    Publication date: June 16, 2022
    Inventors: Sandor Farkas, Ching-Huei Chen, Bhyrav Mutnury
  • Patent number: 11348439
    Abstract: A corrosion monitoring/alerting system includes a chassis. A corrosion monitoring subsystem identifies a current humidity and a current temperature in the chassis, determines that the current humidity is above a corrosion-alert humidity and the current temperature is below a corrosion-alert temperature and, in response, generates a first corrosion alert signal. A corrosion alert subsystem identifies the first corrosion alert signal and, in response, transmits a first recommended corrosion remediation action communication. The corrosion monitoring subsystem may also transmit a test current through a test computing subsystem connection, determine that a test voltage generated in response to transmitting the test current through the test computing subsystem connection is below a corrosion-alert voltage and, response, generate a second corrosion alert signal.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: May 31, 2022
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav Mutnury
  • Publication number: 20220046790
    Abstract: An apparatus includes a first conductor trace arranged to electrically couple a first complementary signal to provide differential signaling. The first conductor trace includes a first plurality of split traces to conduct the first complementary signal, and a first plurality of tie bars to connect the first split traces.
    Type: Application
    Filed: August 4, 2020
    Publication date: February 10, 2022
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20210378094
    Abstract: A high-speed transmission circuit comprises, as part of a signal path, a connector pin disposed on a pad that comprises an unused pad region. The unused pad region is not considered part of the signal path but is part of a resonant sub-circuit. In various embodiments, by properly adjusting the dimensions of the pad region and other structures in the high-speed transmission circuit, resonant frequencies of the sub-circuit are shifted to a frequency range that is outside of the frequency range of interest in the signal path, thereby, reducing insertion loss and increasing signal integrity without compromising mechanical stability.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 2, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Umesh CHANDRA, Douglas WALLACE, Bhyrav MUTNURY
  • Publication number: 20210368623
    Abstract: A high-speed transmission circuit comprises a connector pin that serves as part of a signal path, has a first conductivity, and has a connector pin leg that is coupled to a pad that has a second conductivity lower than the first conductivity. The connector pin leg and at least a portion of the pad form a resonant sub-circuit coupled to the signal path. The second conductivity causes a reduction in insertion loss in the signal path by damping a current in the resonant sub-circuit.
    Type: Application
    Filed: May 22, 2020
    Publication date: November 25, 2021
    Applicant: DELL PRODUCTS L.P.
    Inventors: Umesh CHANDRA, Bhyrav MUTNURY
  • Patent number: 11158441
    Abstract: A high-speed cable drain wire system includes a cable shield housing conductor(s), an insulator subsystem that surrounds the conductor(s), and drain wire subsystem(s) that each have at least one drain wire strand, and with each drain wire strand including a plurality of drain wires. The plurality of drain wires in each drain wire strand may be positioned in a side-by-side orientation or a twisted orientation, and when the at least one drain wire strand included a the plurality of drain wire strands, the plurality of drain wire strands in each drain wire subsystem may be positioned in a braided orientation or a twisted orientation. In response to routing the cable, a bend may be produced in the drain wire subsystem(s), and the plurality of drain wires in each drain wire strand are configured to experience a stress that is less than a stress threshold in response to the bend.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: October 26, 2021
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20210321510
    Abstract: A method may include receiving a first and a second complementary signal to provide differential signaling. The method may further include providing a first conductor trace to transport the first complementary signal; providing a second conductor trace to transport the second complementary signal, the second conductor trace immediately adjacent to the first conductor trace; providing a third conductor trace to transport the first complementary signal, the third conductor trace immediately adjacent to the second conductor trace; and providing a fourth conductor trace to transport the second complementary signal, the fourth conductor trace immediately adjacent to the third conductor trace.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 14, 2021
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 10950369
    Abstract: An improved electrical cable design for high-speed, low loss signal transmission. The improved cable design may be a three-conductor cable having a center conductor, a middle conductor and an outer conductor, where each conductor is separated by a dielectric layer. The electrical cable provides an inverted cable design, in which signal transmission occurs within the middle conductor, the center conductor is used as a return or drain line to ground and the outer conductor is used as a shield. The middle conductor of the electrical cable provides a larger surface area for signal conductance than the center conductor, thereby transmitting signals with significantly less loss (e.g., at least 50% less loss).
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: March 16, 2021
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 10736216
    Abstract: A non-rectangular connection pad for coupling discrete components to connection pads reduces the capacitance in the connection pad area, and thus maintains a more uniform characteristic impedance along the length of the trace. The pad shape is changed to reduce the area of the pad. The reduced area reduces or eliminates change in characteristic impedance of the trace incorporating the connection pad and discrete component attached to the connection pad. An irregular pad shape may be used to decrease the soldering area of the discrete component, while still maintaining wettability of the solder. One example of such a non-rectangular connection pad is a C-shaped connection pad. Such connection pad shapes can be used on traces for high-speed circuits (e.g., PCIe, USB, SATA, and other traces carrying signals above 1 GHz).
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: August 4, 2020
    Assignee: Dell Products L.P.
    Inventors: Isaac Wang, Bhyrav Mutnury, Sandor Farkas, Wallace Ables
  • Patent number: 10700459
    Abstract: A circuit board flex cable system includes a flex cable extending from a circuit board. A data transmission stack extends through the flex cable and the circuit board, and includes a first ground layer extending along its length and including a first grounding element, and a second ground layer extending along its length, spaced part from the first ground layer, and including a second grounding element. A signal layer in the data transmission stack extends along the length of the data transmission stack, is located between the first ground layer and the second ground layer, and includes a signal element that transmits signals. A third grounding element in the signal layer of the data transmission stack is provided adjacent the signal element and extends along a length of the data transmission stack adjacent to a termination of the flex cable in the circuit board.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: June 30, 2020
    Assignee: Dell Products L.P.
    Inventors: Sandor Farkas, Bhyrav Mutnury
  • Patent number: 10430363
    Abstract: Systems and methods are provided that may be implemented in-situ and on-chip to capture a digital signal eye of a serial transmit signal produced by a transmitter circuit of integrated SerDes PHY transceiver circuitry. In one example, a serial transmit signal produced by a transmitter side circuit of an integrated SerDes PHY transceiver circuit may be looped back on chip to the receiver side circuit of the same SerDes PHY transceiver circuit such that an integrated digital eye monitor circuit of the SerDes receiver circuit may capture the digital eye of the serial transmit signal of the same SerDes PHY circuit. In another example, a digital eye monitor circuit may be integrated on the transmitter side of an integrated SerDes PHY transceiver circuit such that a serial transmit signal produced by the transmitter side circuit of may be captured on-chip.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: October 1, 2019
    Assignee: Dell Products L.P.
    Inventors: Doug Wallace, Bhyrav Mutnury, Vijendera Kumar
  • Patent number: 10325043
    Abstract: The time domain response of a simulated system is simulated by first receiving variables for the simulated system. A frequency domain simulation is performed over different frequencies using each of the variables to provide simulated frequency domain responses for the simulated system. A time domain simulation is performed over the different frequencies using a subset of simulated frequency domain responses to produce a plurality of simulated time domain responses for the simulated system. The subset of the simulated frequency domain responses is mapped to the plurality of simulated time domain responses to produce a frequency-domain-to-time-domain mapping. A plurality of mapped time domain responses is determined using the frequency-domain-to-time-domain mapping, where the plurality of simulated time domain responses and the plurality of mapped time domain responses provide time domain responses for each of the plurality of variables for the simulated system.
    Type: Grant
    Filed: March 25, 2015
    Date of Patent: June 18, 2019
    Assignee: Dell Products L.P.
    Inventors: Bhyrav Mutnury, JayaGowri Anand Burji, Nikita Ambasana
  • Patent number: 10296481
    Abstract: A board adapter system includes a first adapter board. A secondary first processor coupling is located on the first adapter board, and the first adapter board passes signals between a primary first processor coupling on a first board and a first processor coupled to the secondary first processor coupling when the first adapter board engages the primary first processor coupling. A first/third processor communication bus extends between the secondary first processor coupling and the second board connector on the first adapter board, and passes signals between the first processor and a third processor that is coupled to the second board connector. A first/fourth processor communication bus extends between the secondary first processor coupling and the second board connector, and passes signals between the first processor and a fourth processor that is coupled to the second board connector on the first adapter board.
    Type: Grant
    Filed: April 14, 2015
    Date of Patent: May 21, 2019
    Assignee: Dell Products L.P.
    Inventors: Kevin Warren Mundt, Sandor Farkas, Bhyrav Mutnury
  • Patent number: 9986651
    Abstract: Methods and mechanisms for mitigating attenuation in a printed circuit board connection may include selecting the relative permittivities of resin layers proximate to the connection to control connection frequency resonances such that the attenuation of signals in the connection due to frequency resonance is mitigated.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: May 29, 2018
    Assignee: DELL PRODUCTS, LP
    Inventors: Bhyrav Mutnury, Sanjay Kumar, Vijendera Kumar, Jaya Gowri Anand Burji, Mallikarjun Goud Vasa
  • Patent number: 9985360
    Abstract: An electrical connector may be used to connect and propagate signals between electrical systems, devices, and components. The electrical connector may comprise a male conductor component with one or more contacts positioned on a member. The electrical connector may comprise a female conductor component configured to be a receptacle for receiving a portion of the male conductor and having one or more moveable conduction arms which may be actuated to contact respective one or more contacts positioned on the member of the male conductor component.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: May 29, 2018
    Assignee: DELL PRODUCTS, LP
    Inventors: Raymond D. Heistand, II, Sandor Farkas, Bhyrav Mutnury
  • Patent number: 9769926
    Abstract: A circuit board includes a board base with a first surface and a second surface that is located opposite the first surface. A plurality of first coupling pads are located on the first surface of the board base. A plurality of second coupling pads are located on the second surface of the board base. The first coupling pads and the second coupling pads define a coupling pad footprint. A breakout via system is included in the board base. The breakout via system includes a plurality of primary signal vias that are located in the board base and outside of the coupling pad footprint, a plurality of first primary signal via connections that extend between the primary signal vias and the plurality of first coupling pads, and a plurality of second primary signal via connections that extend between the primary signal vias and the plurality of second coupling pads.
    Type: Grant
    Filed: April 23, 2015
    Date of Patent: September 19, 2017
    Assignee: Dell Products L.P.
    Inventors: Kevin Warren Mundt, Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20170170578
    Abstract: An electrical connector may be used to connect and propagate signals between electrical systems, devices, and components. The electrical connector may comprise a male conductor component with one or more contacts positioned on a member. The electrical connector may comprise a female conductor component configured to be a receptacle for receiving a portion of the male conductor and having one or more moveable conduction arms which may be actuated to contact respective one or more contacts positioned on the member of the male conductor component.
    Type: Application
    Filed: February 27, 2017
    Publication date: June 15, 2017
    Inventors: Raymond D. Heistand, II, Sandor Farkas, Bhyrav Mutnury
  • Publication number: 20170139866
    Abstract: Systems and methods are provided that may be implemented in-situ and on-chip to capture a digital signal eye of a serial transmit signal produced by a transmitter circuit of integrated SerDes PHY transceiver circuitry. In one example, a serial transmit signal produced by a transmitter side circuit of an integrated SerDes PHY transceiver circuit may be looped back on chip to the receiver side circuit of the same SerDes PHY transceiver circuit such that an integrated digital eye monitor circuit of the SerDes receiver circuit may capture the digital eye of the serial transmit signal of the same SerDes PHY circuit. In another example, a digital eye monitor circuit may be integrated on the transmitter side of an integrated SerDes PHY transceiver circuit such that a serial transmit signal produced by the transmitter side circuit of may be captured on-chip.
    Type: Application
    Filed: November 18, 2015
    Publication date: May 18, 2017
    Inventors: Doug Wallace, Bhyrav Mutnury, Vijendera Kumar
  • Publication number: 20170127534
    Abstract: Methods and mechanisms for mitigating attenuation in a printed circuit board connection may include selecting the relative permittivities of resin layers proximate to the connection to control connection frequency resonances such that the attenuation of signals in the connection due to frequency resonance is mitigated.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Inventors: Bhyrav Mutnury, Sanjay Kumar, Vijendera Kumar, JayaGowri Anand Burji, Vasa Mallikarjun Goud
  • Patent number: 9583845
    Abstract: An electrical connector may be used to connect and propagate signals between electrical systems, devices, and components. The electrical connector may comprise a male conductor component with one or more contacts positioned on a member. The electrical connector may comprise a female conductor component configured to be a receptacle for receiving a portion of the male conductor and having one or more moveable conduction arms which may be actuated to contact respective one or more contacts positioned on the member of the male conductor component.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: February 28, 2017
    Assignee: DELL PRODUCTS, LP
    Inventors: Raymond D. Heistand, II, Sandor Farkas, Bhyrav Mutnury