Patents by Inventor Brad Eaton

Brad Eaton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8940619
    Abstract: Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: January 27, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Saravjeet Singh, Todd Egan, Ajay Kumar, Seshadri Ramaswami
  • Patent number: 8932939
    Abstract: Methods and systems for forming water soluble masks by dry film lamination are described. Also described are methods of wafer dicing, including formation of a water soluble mask by dry film lamination. In one embodiment, a method involves moisturizing an inner area of a water soluble dry film. The method involves stretching the water soluble dry film over a surface of the semiconductor wafer, and attaching the moistened inner area of the stretched film to the surface of the semiconductor wafer. A method of wafer dicing may further involve patterning the water soluble dry film, exposing regions of the semiconductor wafer between the ICs, and etching the semiconductor wafer through gaps in the patterned water soluble dry film.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: January 13, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, James S. Papanu, Brad Eaton, Ajay Kumar
  • Publication number: 20150011073
    Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a hybrid plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch with a plasma based on a combination of NF3 and CF4. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.
    Type: Application
    Filed: June 2, 2014
    Publication date: January 8, 2015
    Inventors: Wei-Sheng Lei, Tong Liu, Madhava Rao Yalamanchili, Brad Eaton, Aparna Iyer, Ajay Kumar
  • Patent number: 8927393
    Abstract: Methods and systems for dicing a semiconductor wafer including a plurality of integrated circuits (ICs) are described. In one embodiment, a method involves adhering an adhesive tape to a thin water soluble dry film. The method involves applying the thin water soluble dry film adhered to the adhesive tape over a surface of the semiconductor wafer. The method involves removing the adhesive tape from the thin water soluble dry film. The thin water soluble dry film is patterned with a laser scribing process, exposing regions of the semiconductor wafer between the ICs. The method involves etching the semiconductor wafer through gaps in the patterned thin water soluble dry film, and removing the thin water soluble dry film.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: January 6, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, James S. Papanu, Prabhat Kumar, Brad Eaton, Ajay Kumar
  • Publication number: 20140377937
    Abstract: Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.
    Type: Application
    Filed: September 5, 2014
    Publication date: December 25, 2014
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Todd Egan, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20140367041
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width.
    Type: Application
    Filed: September 3, 2014
    Publication date: December 18, 2014
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
  • Patent number: 8912075
    Abstract: Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of reducing edge warping in a supported semiconductor wafer involves adhering a backside of a semiconductor wafer to an inner portion of a carrier tape of a substrate carrier comprising a tape frame mounted above the carrier tape. The method also involves adhering an adhesive tape to a front side of the semiconductor wafer and to at least a portion of the substrate carrier. The adhesive tape includes an opening exposing an inner region of the front side of the semiconductor wafer.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: December 16, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Ajay Kumar
  • Patent number: 8912078
    Abstract: Approaches for hybrid laser scribe and plasma etch dicing process for a wafer having backside solder bumps are described. For example, a method of dicing a semiconductor wafer having integrated circuits on a front side thereof and corresponding arrays of metal bumps on a backside thereof involves applying a dicing tape to the backside of the semiconductor wafer, the dicing tape covering the arrays of metal bumps. The method also involves, subsequently, forming a mask on the front side of the semiconductor wafer, the mask covering the integrated circuits. The method also involves forming scribe lines on the front side of the semiconductor wafer with a laser scribing process, the scribe lines formed in the mask and between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, the mask protecting the integrated circuits during the plasma etching.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: December 16, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, James S. Papanu, Aparna Iyer, Brad Eaton, Ajay Kumar
  • Patent number: 8912077
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The semiconductor wafer is supported by a substrate carrier. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits while supported by the substrate carrier.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: December 16, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Saravjeet Singh, Brad Eaton, Ajay Kumar, Wei-Sheng Lei, James M. Holden, Madhava Rao Yalamanchili, Todd J. Egan
  • Publication number: 20140363952
    Abstract: Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs.
    Type: Application
    Filed: August 22, 2014
    Publication date: December 11, 2014
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar
  • Publication number: 20140346641
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: July 22, 2013
    Publication date: November 27, 2014
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 8883614
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, approaches for wafer dicing with wide kerf by using a laser scribing and plasma etching hybrid approach are described. For example, a method of dicing a semiconductor wafer including a plurality of integrated circuits separated by dicing streets involves forming a mask above the semiconductor wafer, the mask having a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide a patterned mask having a pair of parallel gaps for each dicing street, exposing regions of the semiconductor wafer between the integrated circuits. Each gap of each pair of parallel gaps is separated by a distance. The method also involves etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: November 11, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Apama Iyer, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 8859397
    Abstract: Methods of using a hybrid mask composed of a first water soluble film layer and a second water-soluble layer for wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a hybrid mask above the semiconductor wafer. The hybrid mask is composed of a first water-soluble layer disposed on the integrated circuits, and a second water-soluble layer disposed on the first water-soluble layer. The method also involves patterning the hybrid mask with a laser scribing process to provide a patterned hybrid mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The method also involves etching the semiconductor wafer through the gaps in the patterned hybrid mask to singulate the integrated circuits.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: October 14, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Todd Egan, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 8853056
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask and a portion of the semiconductor wafer are patterned with a laser scribing process to provide a patterned mask and to form trenches partially into but not through the semiconductor wafer between the integrated circuits. Each of the trenches has a width. The semiconductor wafer is plasma etched through the trenches to form corresponding trench extensions and to singulate the integrated circuits. Each of the corresponding trench extensions has the width.
    Type: Grant
    Filed: January 3, 2014
    Date of Patent: October 7, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
  • Patent number: 8846498
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a multi-step laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: September 30, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar
  • Patent number: 8845854
    Abstract: Front side laser scribing and plasma etch are performed followed by back side grind to singulate integrated circuit chips (ICs). A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to advance a front of an etched trench partially through the semiconductor wafer thickness. The front side mask is removed, a backside grind tape applied to the front side, and a back side grind performed to reach the etched trench, thereby singulating the ICs.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: September 30, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar
  • Publication number: 20140273401
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask comprising a laser energy absorbing material layer soluble in water over the semiconductor substrate. The laser energy absorbing material layer may be UV curable, and either remain uncured or be cured prior to removal with a water rinse. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate may then be plasma etched through the gaps in the patterned mask to singulate the IC with the laser energy absorbing mask protecting the ICs for during the plasma etch. The soluble mask is then dissolved subsequent to singulation.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 18, 2014
    Inventors: Wei-Sheng LEI, Brad EATON, Aparna IYER, Saravjeet SINGH, Madhava Rao YALAMANCHILI, Ajay KUMAR
  • Publication number: 20140213042
    Abstract: Methods of dicing substrates having a plurality of ICs. A method includes forming a mask, patterning the mask with a femtosecond laser scribing process to provide a patterned mask with gaps, and ablating through an entire thickness of a semiconductor substrate to singulate the IC. Following laser-based singulation, a plasma etch is performed to remove a layer of semiconductor sidewall damaged by the laser scribe process. In the exemplary embodiment, a femtosecond laser is utilized and a 1-3 ?m thick damage layer is removed with the plasma etch. Following the plasma etch, the mask is removed, rendering the singulated die suitable for assembly/packaging.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 31, 2014
    Inventors: Wei-Sheng LEI, Aparna IYER, Brad EATON, Madhava Rao YALAMANCHILI, Ajay KUMAR
  • Publication number: 20140213041
    Abstract: Laser and plasma etch wafer dicing where a mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a film frame by an adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The laser scribing exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is plasma etched through the gaps in the patterned mask while the film frame is maintained at an acceptably low temperature with a chamber shield ring configured to sit beyond the wafer edge and cover the frame. The shield ring may be raised and lowered, for example, on lifter pins to facilitate transfer of the wafer on frame.
    Type: Application
    Filed: January 17, 2014
    Publication date: July 31, 2014
    Inventors: Wei-Sheng LEI, Saravjeet SINGH, Jivko DINEV, Aparna IYER, Brad EATON, Ajay KUMAR
  • Publication number: 20140174659
    Abstract: Methods of dicing substrates having a plurality of ICs are disclosed. A method includes forming a mask comprising a water soluble material layer over the semiconductor substrate. The mask is patterned with a femtosecond laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the substrate between the ICs. The substrate is then etched through the gaps in the patterned mask to singulate the IC and the water soluble material layer is washed off.
    Type: Application
    Filed: February 25, 2014
    Publication date: June 26, 2014
    Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar