Patents by Inventor Brad Eaton

Brad Eaton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9130057
    Abstract: A method and system of hybrid dicing using a blade and laser are described. In one embodiment, a method involves focusing a laser beam inside the substrate in regions between the integrated circuits, inducing defects inside the substrate in the regions. The method also involves forming a groove on a surface of the substrate with a blade saw in the regions. The method further involves singulating the integrated circuits at the regions with the induced defects and the groove. In one embodiment, a system includes a laser module configured to focus a laser beam inside the substrate in regions between the integrated circuits, inducing defects inside the substrate in the regions. A blade grooving module is configured to form a groove in a surface of the substrate with a blade saw in the regions.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: September 8, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Prabhat Kumar, Wei-Sheng Lei, James Papanu, Brad Eaton, Ajay Kumar
  • Patent number: 9129904
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask is composed of a layer covering and protecting the integrated circuits. The mask is patterned with a pulse train laser scribing process using multiple-pulse bursts to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: September 8, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
  • Patent number: 9130030
    Abstract: Baking methods and tools for improved wafer coating are described. In one embodiment, a method of dicing a semiconductor wafer including integrated circuits involves coating a surface of the semiconductor wafer to form a mask covering the integrated circuits. The method involves baking the mask with radiation from one or more light sources. The method involves patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the substrate between the ICs. The method may also involves singulating the ICs, such as with a plasma etching operation.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: September 8, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Jungrae Park, Wei-Sheng Lei, James S. Papanu, Brad Eaton, Ajay Kumar
  • Patent number: 9126285
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. A method includes forming a mask above the semiconductor wafer. The mask covers and protects the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to form singulated integrated circuits. The patterned mask is then separated from the singulated integrated circuits.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: September 8, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Saravjeet Singh, Madhava Rao Yalamanchili, Brad Eaton, Ajay Kumar
  • Publication number: 20150243559
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a temporally-controlled laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The temporally-controlled laser scribing process involves scribing with a laser beam having a profile comprising a leading femto-second portion and a trailing lower-intensity, higher fluence portion. The method also involves plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Application
    Filed: April 29, 2014
    Publication date: August 27, 2015
    Inventors: Jungrae Park, Wei-Sheng Lei, James S. Papanu, Brad Eaton, Ajay Kumar
  • Patent number: 9112050
    Abstract: Methods of and apparatuses for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves introducing a substrate supported by a substrate carrier into a plasma etch chamber. The substrate has a patterned mask thereon covering integrated circuits and exposing streets of the substrate. The substrate carrier has a backside. The method also involves supporting at least a portion of the backside of the substrate carrier on a chuck of the plasma etch chamber. The method also involves cooling substantially all of the backside of the substrate carrier, the cooling involving cooling at least a first portion of the backside of the substrate carrier by the chuck. The method also involves plasma etching the substrate through the streets to singulate the integrated circuits while performing the cooling substantially all of the backside of the substrate carrier.
    Type: Grant
    Filed: May 13, 2014
    Date of Patent: August 18, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Prabhat Kumar, Brad Eaton, Ajay Kumar
  • Patent number: 9105710
    Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: August 11, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Aparna Iyer, Madhava Rao Yalamanchili, Ajay Kumar, Jungrae Park
  • Publication number: 20150221505
    Abstract: Improved wafer coating processes, apparatuses, and systems are described. In one embodiment, an improved spin-coating process and system is used to form a mask for dicing a semiconductor wafer with a laser plasma dicing process. In one embodiment, a spin-coating apparatus for forming a film over a semiconductor wafer includes a rotatable stage configured to support the semiconductor wafer. The rotatable stage has a downward sloping region positioned beyond a perimeter of the semiconductor wafer. The apparatus includes a nozzle positioned above the rotatable stage and configured to dispense a liquid over the semiconductor wafer. The apparatus also includes a motor configured to rotate the rotatable stage.
    Type: Application
    Filed: March 13, 2015
    Publication date: August 6, 2015
    Inventors: Jungrae Park, Wei-Sheng Lei, Prabhat Kumar, James S. Papanu, Brad Eaton, Ajay Kumar
  • Publication number: 20150214111
    Abstract: Methods and systems for dicing a semiconductor wafer including a plurality of integrated circuits (ICs) are described. In one embodiment, a method involves adhering an adhesive tape to a thin water soluble dry film. The method involves applying the thin water soluble dry film adhered to the adhesive tape over a surface of the semiconductor wafer. The method involves removing the adhesive tape from the thin water soluble dry film. The thin water soluble dry film is patterned with a laser scribing process, exposing regions of the semiconductor wafer between the ICs. The method involves etching the semiconductor wafer through gaps in the patterned thin water soluble dry film, and removing the thin water soluble dry film.
    Type: Application
    Filed: January 6, 2015
    Publication date: July 30, 2015
    Inventors: Wei-Sheng Lei, James S. Papanu, Prabhat Kumar, Brad Eaton, Ajay Kumar
  • Publication number: 20150214109
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask is exposed to a plasma treatment process to increase an etch resistance of the mask. The mask is patterned with a laser scribing process to provide gaps in the mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to exposing the mask to the plasma treatment process, the semiconductor wafer is plasma etched through the gaps in the mask to singulate the integrated circuits.
    Type: Application
    Filed: January 29, 2014
    Publication date: July 30, 2015
    Inventors: Wei-Sheng Lei, Brad Eaton, Ajay Kumar, James S. Papanu, Jungrae Park
  • Patent number: 9093518
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a wafer involves providing a semiconductor wafer having integrated circuits on a front side thereof, and having a wafer-level underfill material layer disposed on the integrated circuits. The method also involves laser irradiating the semiconductor wafer from a backside of the semiconductor wafer to generate defects along dicing streets of the semiconductor wafer, the dicing streets oriented between the integrated circuits. The method also involves, subsequent to the laser irradiating, mechanically singulating the integrated circuits along the dicing streets.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: July 28, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, James S. Papanu, Brad Eaton, Ajay Kumar
  • Publication number: 20150200119
    Abstract: In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation. The laser scribe process may be used to cleanly remove a mask layer, organic and inorganic dielectric layers, and device layers. The laser etch process may then be terminated upon exposure of, or partial etch of, the wafer or substrate. In embodiments, a multi-plasma etching approach is employed to dice the wafers where an isotropic etch is employed to improve the die sidewall following an anisotropic etch. The isotropic etch removes anisotropic etch byproducts, roughness, and/or scalloping from the anisotropically etched die sidewalls after die singulation.
    Type: Application
    Filed: March 27, 2015
    Publication date: July 16, 2015
    Inventors: Brad EATON, Saravjeet SINGH, Wei-Sheng LEI, Madhava Rao YALAMANCHILI, Tong LIU, Ajay KUMAR
  • Patent number: 9076860
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The method also involves patterning the mask with a laser scribing process to provide gaps in the mask, the gaps exposing regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the gaps in the mask to singulate the integrated circuits. The method also involves, subsequent to plasma etching the semiconductor wafer, removing etch residue from sidewalls of the singulated integrated circuits.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: July 7, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Prabhat Kumar, James S. Papanu, Ajay Kumar, Brad Eaton
  • Publication number: 20150162243
    Abstract: Methods of using a screen-print mask for hybrid wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits separated by streets involves screen-printing a patterned mask above the semiconductor wafer, the patterned mask covering the integrated circuits and exposing the streets of the semiconductor wafer. The method also involves laser ablating the streets with a laser scribing process to expose regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the exposed regions of the semiconductor wafer to singulate the integrated circuits. The patterned mask protects the integrated circuits during the plasma etching.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 11, 2015
    Inventors: Prabhat Kumar, Brad Eaton, Wei-Sheng Lei, James S. Papanu, Ajay Kumar
  • Publication number: 20150162244
    Abstract: Methods of and carriers for dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a carrier for supporting a wafer or substrate in an etch process includes a frame having a perimeter surrounding an inner opening. The carrier also includes a tape coupled to the frame and disposed below the inner opening of the frame, the tape comprising an etch stop layer disposed above a support layer.
    Type: Application
    Filed: November 11, 2014
    Publication date: June 11, 2015
    Inventors: James M. Holden, Brad Eaton, Aparna Iyer, Ajay Kumar
  • Patent number: 9054176
    Abstract: Methods of dicing substrates by both laser scribing and plasma etching are disclosed. A method includes laser ablating material layers, the ablating leading with a first irradiance and following with a second irradiance, lower than the first. Multiple passes of a beam adjusted to have different fluence level or multiple laser beams having various fluence levels may be utilized to ablate mask and IC layers to expose a substrate with the first fluence level and then clean off redeposited materials from the trench bottom with the second fluence level. A laser scribe apparatus employing a beam splitter may provide first and second beams of different fluence from a single laser.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: June 9, 2015
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Saravjeet Singh, Ajay Kumar, James M. Holden
  • Patent number: 9048309
    Abstract: Uniform masking for wafer dicing using laser and plasma etch is described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits having bumps or pillars includes uniformly spinning on a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: June 2, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 9041198
    Abstract: Maskless hybrid laser scribing and plasma etching wafer dicing processes are described. In an example, a method of dicing a semiconductor wafer having a front surface with a plurality of integrated circuits thereon and having a passivation layer disposed between and covering metal pillar/solder bump pairs of the integrated circuits involves laser scribing, without the use of a mask layer, the passivation layer to provide scribe lines exposing the semiconductor wafer. The method also involves plasma etching the semiconductor wafer through the scribe lines to singulate the integrated circuits, wherein the passivation layer protects the integrated circuits during at least a portion of the plasma etching. The method also involves thinning the passivation layer to partially expose the metal pillar/solder bump pairs of the integrated circuits.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: May 26, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, James S. Papanu, Ajay Kumar
  • Publication number: 20150122419
    Abstract: Laser and plasma etch wafer dicing using UV-curable adhesive films. A mask is formed covering ICs formed on the wafer, as well as any bumps providing an interface to the ICs. The semiconductor wafer is coupled to a carrier substrate by a double-sided UV-curable adhesive film. The mask is patterned by laser scribing to provide a patterned mask with gaps. The patterning exposes regions of the semiconductor wafer, below thin film layers from which the ICs are formed. The semiconductor wafer is then etched through the gaps in the patterned mask to singulate the ICs. The UV-curable adhesive film is partially cured by UV irradiation through the carrier. The singulated ICs are then detached from the partially cured adhesive film still attached to the carrier substrate, for example individually by a pick and place machine. The UV-curable adhesive film may then be further cured for the film's complete removal from the carrier substrate.
    Type: Application
    Filed: January 12, 2015
    Publication date: May 7, 2015
    Inventors: Mohammad Kamruzzaman Chowdhury, Wei-Sheng Lei, Todd Egan, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar
  • Patent number: 9018079
    Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask including a layer covering and protecting the integrated circuits. The mask is patterned with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. Subsequent to patterning the mask, the exposed regions of the semiconductor wafer are cleaned with a plasma process reactive to the exposed regions of the semiconductor wafer. Subsequent to cleaning the exposed regions of the semiconductor wafer, the semiconductor wafer is plasma etched through the gaps in the patterned mask to singulate the integrated circuits.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: April 28, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Wei-Sheng Lei, Brad Eaton, Madhava Rao Yalamanchili, Ajay Kumar