Patents by Inventor Bruce A. Block

Bruce A. Block has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110075962
    Abstract: A metal-semiconductor-metal (MSM) device couples light from an optical mode in a waveguide to a surface plasmon polarition (SPP) mode on an electrode surface of the MSM device. Once in an SPP mode, the absorption of light in the semiconductor can take place in a very small area. This may allow for a shrinking of the active detector area and allow for low capacitance, very short transit distance for the electrical carriers and allow for very low voltage devices and/or very high frequency.
    Type: Application
    Filed: September 30, 2009
    Publication date: March 31, 2011
    Inventor: Bruce A. Block
  • Patent number: 7893481
    Abstract: An improvement in the method of fabricating on chip decoupling capacitors which help prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. The inclusion of a hybrid metal/metal nitride top electrode/barrier provides for a low cost and higher performance option to strapping decoupling capacitors.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: February 22, 2011
    Assignee: Intel Corporation
    Inventors: Richard Scott List, Bruce A. Block, Ruitao Zhang
  • Publication number: 20100304514
    Abstract: In an embodiment, light from a single mode light source may be deflected into a low index contrast (LIC) waveguide in an opto-electronic integrated circuit (OEIC) (or “opto-electronic chip”) by a 45 degree mirror. The mirror may be formed by polishing an edge of the die at a 45 degree angle and coating the polished edge with a metal layer. Light coupled into the LIC waveguide may then be transferred from the LIC waveguide to a high index contrast (HIC) waveguide by evanescent coupling.
    Type: Application
    Filed: July 13, 2010
    Publication date: December 2, 2010
    Inventors: Bruce A. Block, Paul Davids
  • Patent number: 7843036
    Abstract: An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
    Type: Grant
    Filed: August 12, 2008
    Date of Patent: November 30, 2010
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Richard Scott List
  • Publication number: 20100260453
    Abstract: The waveguide in the ring and the bus waveguide in the immediate vicinity of the ring are made wider than the optimal single mode size. The bus waveguide has adiabatic tapers which serve to connect single mode portions in the bus waveguide to the wider portion of the bus waveguide to expand the mode from the narrower waveguide to the wider waveguide. Since the light is now spread out over a larger area in the wider waveguides, the scattering loss from the sidewalls is reduced and the loss is lower. This lower loss gives rise to a higher Q in the ring since the Q of the ring is directly proportional to the round trip loss.
    Type: Application
    Filed: April 8, 2009
    Publication date: October 14, 2010
    Inventor: Bruce A. Block
  • Patent number: 7801397
    Abstract: In an embodiment, light from a single mode light source may be deflected into a low index contrast (LIC) waveguide in an opto-electronic integrated circuit (OEIC) (or “opto-electronic chip”) by a 45 degree mirror. The mirror may be formed by polishing an edge of the die at a 45 degree angle and coating the polished edge with a metal layer. Light coupled into the LIC waveguide may then be transferred from the LIC waveguide to a high index contrast (HIC) waveguide by evanescent coupling.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: September 21, 2010
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Paul Davids
  • Patent number: 7692258
    Abstract: A photosensitive device for enabling high speed detection of electromagnetic radiation. The device includes recessed electrodes for providing a generally homogeneous electric field in an active region. Carriers generated in the active region are detected using the recessed electrodes.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: April 6, 2010
    Assignee: Intel Corporation
    Inventors: Miriam R. Reshotko, Shaofeng Yu, Bruce A. Block
  • Publication number: 20090324164
    Abstract: Embodiments of the present invention describe a waveguide-based photodetector device and its methods of fabrication. The waveguide photodetector device comprises a substrate having a cladding structure formed thereon. A waveguide element for receiving optical signals is disposed within the cladding structure. A portion of the waveguide element is encapsulated by a photodetector element that detects the optical signal received by the waveguide element and generates an electrical signal based on the optical signal. Encapsulating the waveguide element in the photodetector element improves coupling efficiency and enables a waveguide photodetector device with higher speeds and higher responsivity.
    Type: Application
    Filed: June 30, 2008
    Publication date: December 31, 2009
    Inventors: Miriam R. Reshotko, Bruce A. Block
  • Patent number: 7547639
    Abstract: A method of protecting a sensitive layer from harsh chemistries. The method includes forming a first sensitive layer, forming a second layer upon the first layer, then forming a third layer over the second layer. The third layer is utilized as a mask during patterning of the second layer. During patterning, however, the second layer is only partially etched, thus leaving a buffer layer overlying the first layer. The third layer is completely removed while the buffer layer protects the first layer from the harsh chemicals that are utilized to remove the third layer. Then, the buffer layer is carefully removed down to the surface of the first layer.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: June 16, 2009
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Bruce A. Block, Uday Shah
  • Patent number: 7489836
    Abstract: A microchip includes optical layers with integrated waveguides and modulators. A continuous wave light beam coupled to incoming waveguide(s) is modulated and transmitted off-chip by outgoing waveguides coupled to optical interconnects.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: February 10, 2009
    Assignee: Intel Corporation
    Inventors: Brandon C. Barnett, Bruce A. Block
  • Publication number: 20080296731
    Abstract: An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
    Type: Application
    Filed: August 12, 2008
    Publication date: December 4, 2008
    Inventors: Bruce A. Block, Richard Scott List
  • Patent number: 7416954
    Abstract: An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: August 26, 2008
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Richard Scott List
  • Publication number: 20080138009
    Abstract: In an embodiment, light from a single mode light source may be deflected into a low index contrast (LIC) waveguide in an opto-electronic integrated circuit (OEIC) (or “opto-electronic chip”) by a 45 degree mirror. The mirror may be formed by polishing an edge of the die at a 45 degree angle and coating the polished edge with a metal layer. Light coupled into the LIC waveguide may then be transferred from the LIC waveguide to a high index contrast (HIC) waveguide by evanescent coupling.
    Type: Application
    Filed: February 14, 2008
    Publication date: June 12, 2008
    Inventors: Bruce A. Block, Paul Davids
  • Patent number: 7343058
    Abstract: In an embodiment, light from a single mode light source may be deflected into a low index contrast (LIC) waveguide in an opto-electronic integrated circuit (OEIC) (or “opto-electronic chip”) by a 45 degree mirror. The mirror may be formed by polishing an edge of the die at a 45 degree angle and coating the polished edge with a metal layer. Light coupled into the LIC waveguide may then be transferred from the LIC waveguide to a high index contrast (HIC) waveguide by evanescent coupling.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: March 11, 2008
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Paul Davids
  • Publication number: 20070252187
    Abstract: An improvement in the method of fabricating on chip decoupling capacitors which help prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. The inclusion of a hybrid metal/metal nitride top electrode/barrier provides for a low cost and higher performance option to strapping decoupling capacitors.
    Type: Application
    Filed: June 26, 2007
    Publication date: November 1, 2007
    Inventors: Richard List, Bruce Block, Ruitao Zhang
  • Patent number: 7283689
    Abstract: According to embodiments of the present invention, an optical waveguide includes a high dielectric constant core material relative to the cladding material. The cladding material has an index of refraction that is adjustable in response to an electrical stimulus.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: October 16, 2007
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Paul Davids
  • Publication number: 20070235877
    Abstract: A semiconductor device is described with a photodetector embedded within and a method of manufacturing the same. The photodetector may be formed above the conductive layers within the device and may detect transmitted light from the top side of the device. The process of manufacturing the device may include a damascene or a subtractive etch process.
    Type: Application
    Filed: March 31, 2006
    Publication date: October 11, 2007
    Inventors: Miriam Reshotko, Bruce Block, David Kencke
  • Patent number: 7262140
    Abstract: A semiconductor based structure containing substantially smoothed waveguides having a rounded surface is disclosed, as well as methods of fabricating such a structure. The substantially smoothed waveguides may be formed of waveguide materials such as amorphous silicon or stoichiometric silicon nitride. The substantially smoothed waveguides are formed with an isotropic wet etch combined with sonic energy.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: August 28, 2007
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Bruce A. Block
  • Patent number: 7256089
    Abstract: An improvement in the method of fabricating on chip decoupling capacitors which help prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. The inclusion of a hybrid metal/metal nitride top electrode/barrier provides for a low cost and higher performance option to strapping decoupling capacitors.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: August 14, 2007
    Assignee: Intel Corporation
    Inventors: Richard Scott List, Bruce A. Block, Ruitao Zhang
  • Patent number: 7251389
    Abstract: An apparatus and method for embedding a laser source on a semiconductor substrate and an optical interconnect to couple the laser source to internal components of the semiconductor substrate. An on-die waveguide is integrated on the semiconductor substrate. A package waveguide is disposed on the semiconductor substrate and evanescently coupled to the on-die waveguide. The laser source is embedded within the packaged waveguide to provide an optical signal to the on-die waveguide via the package waveguide.
    Type: Grant
    Filed: September 26, 2005
    Date of Patent: July 31, 2007
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Bruce A. Block, Dongming He