Patents by Inventor Bruce A. Block

Bruce A. Block has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070081760
    Abstract: An apparatus and method for embedding a laser source on a semiconductor substrate and an optical interconnect to couple the laser source to internal components of the semiconductor substrate. An on-die waveguide is integrated on the semiconductor substrate. A package waveguide is disposed on the semiconductor substrate and evanescently coupled to the on-die waveguide. The laser source is embedded within the packaged waveguide to provide an optical signal to the on-die waveguide via the package waveguide.
    Type: Application
    Filed: September 26, 2005
    Publication date: April 12, 2007
    Inventors: Daoqiang Lu, Bruce Block, Dongming He
  • Publication number: 20060263924
    Abstract: A photosensitive device for enabling high speed detection of electromagnetic radiation. The device includes recessed electrodes for providing a generally homogeneous electric field in an active region. Carriers generated in the active region are detected using the recessed electrodes.
    Type: Application
    Filed: July 31, 2006
    Publication date: November 23, 2006
    Inventors: Miriam Reshotko, Shaofeng Yu, Bruce Block
  • Patent number: 7138678
    Abstract: An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: November 21, 2006
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Richard Scott List
  • Patent number: 7120350
    Abstract: An apparatus having a waveguide with a first tapered surface and a photodetector with a second surface shaped to mate with the first tapered surface.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: October 10, 2006
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Paul Davids
  • Publication number: 20060188827
    Abstract: A method of protecting a sensitive layer from harsh chemistries. The method includes forming a first sensitive layer, forming a second layer upon the first layer, then forming a third layer over the second layer. The third layer is utilized as a mask during patterning of the second layer. During patterning, however, the second layer is only partially etched, thus leaving a buffer layer overlying the first layer. The third layer is completely removed while the buffer layer protects the first layer from the harsh chemicals that are utilized to remove the third layer. Then, the buffer layer is carefully removed down to the surface of the first layer.
    Type: Application
    Filed: March 6, 2006
    Publication date: August 24, 2006
    Inventors: Justin Brask, Bruce Block, Uday Shah
  • Patent number: 7084471
    Abstract: A photosensitive device for enabling high speed detection of electromagnetic radiation. The device includes recessed electrodes for providing a generally homogeneous electric field in an active region. Carriers generated in the active region are detected using the recessed electrodes.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: August 1, 2006
    Assignee: Intel Corporation
    Inventors: Miriam R. Reshotko, Shaofeng Yu, Bruce A. Block
  • Patent number: 7078160
    Abstract: A method of protecting a sensitive layer from harsh chemistries. The method includes forming a first sensitive layer, forming a second layer upon the first layer, then forming a third layer over the second layer. The third layer is utilized as a mask during patterning of the second layer. During patterning, however, the second layer is only partially etched, thus leaving a buffer layer overlying the first layer. The third layer is completely removed while the buffer layer protects the first layer from the harsh chemicals that are utilized to remove the third layer. Then, the buffer layer is carefully removed down to the surface of the first layer.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: July 18, 2006
    Assignee: Intel Corporation
    Inventors: Justin K. Brask, Bruce A. Block, Uday Shah
  • Publication number: 20060138592
    Abstract: On-chip decoupling capacitor structures, and methods of fabricating such decoupling capacitors are disclosed. On-chip decoupling capacitors help to reduce or prevent L di/dt voltage droop on the power grid for high surge current conditions. The inclusion of one or more decoupling capacitors on a chip, in close proximity to the power grid conductors reduces parasitic inductance and thereby provides improved decoupling performance with respect to high frequency noise. In one embodiment of the present invention, a capacitor stack structure is inserted between metal interconnect layers. Such a capacitor stack may consist of a bottom electrode/barrier; a thin dielectric material having a high dielectric constant; and a top electrode/barrier. In an alternative embodiment, the bottom electrode and/or bottom metal interconnect layer have three dimensional texture to increase the surface area of the capacitor.
    Type: Application
    Filed: December 23, 2005
    Publication date: June 29, 2006
    Inventors: Bruce Block, Richard List, Ruitao Zhang
  • Publication number: 20060093967
    Abstract: An integrated waveguide and photodetector which are evanescently coupled, and methods of making such integrated waveguide and photodetector.
    Type: Application
    Filed: December 15, 2005
    Publication date: May 4, 2006
    Inventor: Bruce Block
  • Patent number: 7033882
    Abstract: On-chip decoupling capacitor structures, and methods of fabricating such decoupling capacitors are disclosed. On-chip decoupling capacitors help to reduce or prevent L di/dt voltage droop on the power grid for high surge current conditions. The inclusion of one or more decoupling capacitors on a chip, in close proximity to the power grid conductors reduces parasitic inductance and thereby provides improved decoupling performance with respect to high frequency noise. In one embodiment of the present invention, a capacitor stack structure is inserted between metal interconnect layers. Such a capacitor stack may consist of a bottom electrode/barrier; a thin dielectric material having a high dielectric constant; and a top electrode/barrier. In an alternative embodiment, the bottom electrode and/or bottom metal interconnect layer have three dimensional texture to increase the surface area of the capacitor.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: April 25, 2006
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Richard Scott List, Ruitao Zhang
  • Patent number: 7031563
    Abstract: A microchip may include an optical clocking system. The optical clocking system may include a ring resonator which multiplies the frequency of light pulses from a light source for use as optical clocking signals and distribution waveguides to distribute the optical clocking signals to different regions of the microchip.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: April 18, 2006
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Brandon C. Barnett, Paul Davids
  • Patent number: 6993212
    Abstract: Optical waveguide devices having adjustable waveguide cladding wherein the waveguide cladding is adjustable by using an external control or stimulus to change an optical characteristic of the waveguide cladding, e.g., the refractive index of the cladding. Such waveguide devices may be designed to have certain features that are suitable for monolithically integrated opto-electronic devices and systems.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: January 31, 2006
    Assignee: Intel Corporation
    Inventors: Bruce A. Block, Brandon C. Barnett, Paul Davids
  • Patent number: 6991892
    Abstract: An integrated waveguide and photodetector which are evanescently coupled, and methods of making such integrated waveguide and photodetector.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: January 31, 2006
    Assignee: Intel Corporation
    Inventor: Bruce A. Block
  • Publication number: 20060007969
    Abstract: A pulse laser generates a pulse train. A modulator receives the pulse train and a data signal. The modulator encodes the data signal onto the pulse train by selectively passing pulses.
    Type: Application
    Filed: March 31, 2004
    Publication date: January 12, 2006
    Inventors: Brandon Barnett, Bruce Block
  • Publication number: 20050259380
    Abstract: An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
    Type: Application
    Filed: January 27, 2004
    Publication date: November 24, 2005
    Inventors: Bruce Block, Richard List
  • Publication number: 20050202312
    Abstract: A photosensitive device for enabling high speed detection of electromagnetic radiation. The device includes recessed electrodes for providing a generally homogeneous electric field in an active region. Carriers generated in the active region are detected using the recessed electrodes.
    Type: Application
    Filed: May 4, 2005
    Publication date: September 15, 2005
    Inventors: Miriam Reshotko, Shaofeng Yu, Bruce Block
  • Publication number: 20050123244
    Abstract: Waveguide couplers to efficiently couple light from one waveguide to another with different cross sections, including but not limited to waveguides in compact integrated packages fabricated on substrates.
    Type: Application
    Filed: December 3, 2003
    Publication date: June 9, 2005
    Inventors: Bruce Block, Brandon Barnett, Paul Davids
  • Patent number: 6903432
    Abstract: A photosensitive device for enabling high speed detection of electromagnetic radiation. The device includes recessed electrodes for providing a generally homogeneous electric field in an active region. Carriers generated in the active region are detected using the recessed electrodes.
    Type: Grant
    Filed: February 13, 2003
    Date of Patent: June 7, 2005
    Assignee: Intel Corporation
    Inventors: Miriam R. Reshotko, Shaofeng Yu, Bruce A. Block
  • Publication number: 20050111806
    Abstract: A semiconductor based structure containing substantially smoothed waveguides having a rounded surface is disclosed, as well as methods of fabricating such a structure. The substantially smoothed waveguides may be formed of waveguide materials such as amorphous silicon or stoichiometric silicon nitride. The substantially smoothed waveguides are formed with an isotropic wet etch combined with sonic energy.
    Type: Application
    Filed: November 24, 2003
    Publication date: May 26, 2005
    Inventors: Justin Brask, Bruce Block
  • Patent number: 6888716
    Abstract: A method of fabricating an on-chip decoupling capacitor which helps prevent L di/dt voltage droop on the power grid for high surge current conditions is disclosed. Inclusion of the decoupling capacitor on die directly between the power grid greatly reduces the inductance L, and provides decoupling to reduce the highest possible frequency noise. This invention specifically describes the process flow in which the decoupling capacitor is located between the top layer metallization and the standard bump contacts which have either multiple openings or bar geometries to provide both power grid and top decoupling capacitor electrode contacts.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: May 3, 2005
    Assignee: Intel Corporation
    Inventors: Richard Scott List, Bruce A. Block, Mark T. Bohr