Abstract: The present disclosure discloses a substrate heat-treating apparatus including a process chamber in which a flat substrate to be heat treated is placed, the process chamber comprising a beam transmitting plate placed below the flat substrate and an infrared transmitting plate placed above the flat substrate; a beam irradiating module for irradiating a VCSEL beam having a single wavelength to a lower surface of the flat substrate through the beam transmitting plate; and an temperature measuring module configured to measure the laser beam reflected from the lower surface or an upper surface the flat substrate, thereby measuring the temperature of the flat substrate.

Abstract: The present disclosure discloses a substrate heat-treating apparatus including a process chamber in which a flat substrate to be heat treated is placed, the process chamber comprising a beam transmitting plate placed below the flat substrate and an infrared transmitting plate placed above the flat substrate; a beam irradiating module for irradiating a VCSEL beam having a single wavelength to a lower surface of the flat substrate through the beam transmitting plate; and an emissivity measuring configured to measure the laser beam reflected from the lower surface or an upper surface the flat substrate, thereby measuring the emissivity of the flat substrate.

Abstract: Provided is an analog front-end receiver including: a first equalizer including a first block switch configured to receive a first differential signal through a first node, and configured to block the first differential signal in a first operation mode; a second equalizer including a second block switch configured to receive a second differential signal through a second node, and configured to block the second differential signal in the first operation mode; a terminating resistor provided between the first node and the second node, and configured to receive the first differential signal via the first node, and receive the second differential signal via the second node; and a low pass filter configured to receive a third differential signal converted by the terminating resistor from the first differential signal, and configured to receive a fourth differential signal converted by the terminating resistor from the second differential signal.

Abstract: A multilayer ceramic electronic component includes a body including a dielectric layer, first and second internal electrodes, a stacked portion including first and second surfaces opposing each other in a stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and opposing each other, and a coating layer disposed on the first to sixth surfaces of the stacked portion and having first and second connection portions; and first and second external electrodes connected to the first and second internal electrodes, respectively, and arranged on the third and fourth surfaces of the body, wherein the first and second internal electrodes are respectively connected to the first and second external electrodes through the first and second connection portions.

Abstract: An analog front-end receiver including a termination resistor configured to receive first and second differential signals from different data lines, the second differential signal being differential with respect to the first differential signal, an active equalizer configured to receive a first input differential signal through a first input node and a second input differential signal through a second input node, the first and second input differential signals both having an input common mode voltage, the first and second input differential signals being based on the first and second differential signal, respectively, and output first and output differential signals to first and second output nodes, respectfully, the second output differential signal being differential with respect to the first output differential signal, and an input common mode voltage generator configured to adjust the input common mode voltage to be equal to an output common mode voltage of the first output differential signal.

Abstract: The storage device includes: a memory device including a plurality of user blocks and a system block; a buffer memory for storing a physical-to-logical table, and a memory controller for controlling the memory device to update map data stored in the system block, based on the physical-to-logical table, and to store the updated map data in the system block, after logical addresses of the physical-to-logical table are all allocated.

Abstract: An operating method of a memory system includes determining that a map management operation is triggered, based on physical-to-logical (P2L) entries generated after a previous map management operation is completed, wherein the P2L entries respectively correspond to physical addresses of a memory region of a storage medium; generating a pre-update table corresponding to the memory region based on the P2L entries regardless of whether a write operation of the storage medium is completed; updating L2P entries based on the P2L entries after the write operation is completed; and generating, a new original update table by merging the pre-update table and an original update table corresponding to the memory region when the original update table is present in the storage medium and generating, after the L2P entries are updated, the pre-update table as the new original update table when the original update table is not present in the storage medium.

Abstract: A memory system includes a nonvolatile memory device; a random access memory configured to store, in response to an unmap request received from a host device, a flag information indicating that an unmap address as a target of the unmap request is unmapped; and a control unit configured to flush the flag information to the nonvolatile memory device, wherein the control unit flushes the flag information to the nonvolatile memory device when a first condition is satisfied.

Abstract: An operating method of a memory system includes determining that a map management operation is triggered, based on physical-to-logical (P2L) entries generated after a previous map management operation is completed, wherein the P2L entries respectively correspond to physical addresses of a memory region of a storage medium; generating a pre-update table corresponding to the memory region based on the P2L entries regardless of whether a write operation of the storage medium is completed; updating L2P entries based on the P2L entries after the write operation is completed; and generating, a new original update table by merging the pre-update table and an original update table corresponding to the memory region when the original update table is present in the storage medium and generating, after the L2P entries are updated, the pre-update table as the new original update table when the original update table is not present in the storage medium.

Abstract: An analog front-end receiver including a termination resistor configured to receive first and second differential signals from different data lines, the second differential signal being differential with respect to the first differential signal, an active equalizer configured to receive a first input differential signal through a first input node and a second input differential signal through a second input node, the first and second input differential signals both having an input common mode voltage, the first and second input differential signals being based on the first and second differential signal, respectively, and output first and output differential signals to first and second output nodes, respectfully, the second output differential signal being differential with respect to the first output differential signal, and an input common mode voltage generator configured to adjust the input common mode voltage to be equal to an output common mode voltage of the first output differential signal.

Abstract: The storage device includes: a memory device including a plurality of user blocks and a system block; a buffer memory for storing a physical-to-logical table, and a memory controller for controlling the memory device to update map data stored in the system block, based on the physical-to-logical table, and to store the updated map data in the system block, after logical addresses of the physical-to-logical table are all allocated.

Abstract: Provided is an analog front-end receiver including: a first equalizer including a first block switch configured to receive a first differential signal through a first node, and configured to block the first differential signal in a first operation mode; a second equalizer including a second block switch configured to receive a second differential signal through a second node, and configured to block the second differential signal in the first operation mode; a terminating resistor provided between the first node and the second node, and configured to receive the first differential signal via the first node, and receive the second differential signal via the second node; and a low pass filter configured to receive a third differential signal converted by the terminating resistor from the first differential signal, and configured to receive a fourth differential signal converted by the terminating resistor from the second differential signal.

Abstract: A controller may include a memory configured to store a map update list in which information of map segments whose mapping information is to be updated is registered The controller may also include an unmap module. The unmap module may, in response to receiving an unmap command, generate a list information bitmap indicating map segments which are already registered in the map update list, check, using the generate list information bitmap, whether one or more unmap target map segments corresponding to the unmap command overlap the map segments registered in the map update list, using the generate list information bitmap, and selectively register the one or more unmap target map segments into the map update list according to the check result.

Abstract: A multilayer capacitor includes a body, a plurality of internal electrodes, and external electrodes. The corners of the cover portions of the body include curved surfaces, a length of each of internal electrodes disposed in the cover portions among the plurality of internal electrodes is smaller than a length of an internal electrode disposed in a central portion, and when a distance from a surface of the body to a closest internal electrode among the plurality of internal electrodes is defined as a margin, a portion of the margin region, located directly above or below the internal electrodes disposed in the cover portions in the stacking direction, includes at least two layers including different densities of dielectric layers.

Abstract: A multilayer ceramic electronic component includes a body including a dielectric layer, first and second internal electrodes, a stacked portion including first and second surfaces opposing each other in a stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and opposing each other, and a coating layer disposed on the first to sixth surfaces of the stacked portion and having first and second connection portions; and first and second external electrodes connected to the first and second internal electrodes, respectively, and arranged on the third and fourth surfaces of the body, wherein the first and second internal electrodes are respectively connected to the first and second external electrodes through the first and second connection portions.

Abstract: A multilayer capacitor includes a body including a stacked structure formed of a plurality of dielectric layers, and a plurality of internal electrodes, and external electrodes, wherein the body is divided into a central portion, and cover portions, the body has first to sixth surfaces, in the body, the cover portion forms corner edges having a curved surface, and if a radius of curvature of each of the corner edges at which the third and fourth surfaces meet the fifth and sixth surfaces refers to R1, and a radius of curvature of each of the corner edges at which the third and fourth surfaces meet the first and second surfaces refers to R2, a relationship of R1>R2 is satisfied, and a width of an internal electrode disposed in the cover portion is narrower than a width of an internal electrode disposed in the central portion.

Abstract: A data storage device includes a memory array including a plurality of memory cells; and a controller in communication with the memory array and configured to: store, in a map update buffer, one or more map segments including one or more logical address to be unmapped; determine, among logical address to physical address (L2P) entries of the one or more map segments stored in the map update buffer, L2P entries having the same memory block number; and selectively perform a first unmap operation or a second unmap operation according to whether all the L2P entries stored in the map update buffer have the same memory block number.

Abstract: A multilayer ceramic electronic component includes a body including a dielectric layer, first and second internal electrodes, a stacked portion including first and second surfaces opposing each other in a stacking direction of the first and second internal electrodes, third and fourth surfaces connected to the first and second surfaces and opposing each other, and fifth and sixth surfaces connected to the first and second surfaces, connected to the third and fourth surfaces, and opposing each other, and a coating layer disposed on the first to sixth surfaces of the stacked portion and having first and second connection portions; and first and second external electrodes connected to the first and second internal electrodes, respectively, and arranged on the third and fourth surfaces of the body, wherein the first and second internal electrodes are respectively connected to the first and second external electrodes through the first and second connection portions.

Abstract: A data storage device includes a nonvolatile memory device including an address mapping table; a memory including a sequential map table in which sequential map entries for consecutive logical block addresses among logical block addresses are stored, the logical block addresses being received with write requests from a host device; and a processor configured to read one or more map segments, including logical block addresses of which mapping information is to be updated, from the address mapping table when a map update operation is triggered, store the read one or more map segments in the memory, sequentially change physical block addresses mapped to the respective logical block addresses to be updated, using a first sequential map entry including the logical block addresses to be updated which are stored in the sequential map table, and store the changed physical block addresses in the memory.

Abstract: A multilayer capacitor includes a body, a plurality of internal electrodes and external electrodes disposed on external surfaces of the body and electrically connected to the internal electrodes, wherein in the body, corners of cover portions include curved surfaces, and 10 ?m?R?T/4 in which R is a radius of curvature of the curved surface corners and T is a thickness of the body, and when a distance from a surface of the body to an internal electrode closest to the surface of the body among the plurality of internal electrodes is a margin, a margin (?) of each of the corners formed as the curved surfaces in the cover portions is greater than or equal to a margin (Wg) of the body in a width direction.