Abstract: A controller includes: a first buffer suitable for buffering data read from a memory device; a second buffer suitable for buffering data to be written into the memory device; a processor suitable for, in response to a read command, controlling the memory device to read data therefrom and the first buffer to buffer the read data; and a buffer management unit suitable for, in response to the read command, providing the buffered data of the first buffer when the second buffer does not currently buffer data to be read.

Abstract: A data storage apparatus includes a nonvolatile memory device including block groups, a random access memory including a sequential map table that stores a sequential map entry for consecutive sequential write logical addresses, among write addresses received from a host apparatus, greater than or equal to a predetermined threshold number, and a processor configured to determine whether or not first sequential write logical addresses are present among logical addresses corresponding to physical addresses for a first region of a first block group when a write operation for the first region of the first block group in response to a write request received from the host apparatus is completed, generate a first sequential map entry for the first sequential write logical addresses when the first sequential write logical addresses are present, and store the first sequential map entry in the sequential map table.

Abstract: A memory system includes a plurality of memory devices, each including a plurality of memory blocks; and a controller configured to evaluate performance grades of the plurality of memory blocks, form super blocks spanning the plurality of memory devices by selecting memory blocks, among the plurality of memory blocks, to be included in each of the super blocks based on the performance grades, and write-access an opened super block, among the super blocks.

Abstract: An operating method for a data storage device may include: reading data from a first memory region of a storage medium; storing the read data in a data buffer; and writing the data stored in the data buffer to a second memory region of the storage medium, based on a read count for the first memory region.

Abstract: A memory system includes a nonvolatile memory device; a random access memory configured to store, in response to an unmap request received from a host device, a flag information indicating that an unmap address as a target of the unmap request is unmapped; and a control unit configured to flush the flag information to the nonvolatile memory device, wherein the control unit flushes the flag information to the nonvolatile memory device when a first condition is satisfied.

Abstract: A data storage device includes: a non-volatile memory device, a random access memory and a processor. The non-volatile memory device stores a plurality of L2P entries related to a plurality of logical addresses. The random access memory stores a sequential flag table including sequential flags for a plurality of sequential segments. Each of the sequential flags are flags representing whether physical addresses corresponding to the logical addresses of the sequential segments are sequential or not. The processor identifies a sequential flag of a sequential segment related to read logical address information based on the sequential flag table. The processor reads at least one of the L2P entries, which are correspond to the read logical address information based on the sequential flag and loads the read L2P entry into the random access memory.

Abstract: Provided herein may be a memory system and a method of operating the memory system. The memory system may include: a semiconductor memory device to which an address mapping table including a plurality of map segments is stored; and a controller configured to load and store, during a read operation, one or more map segments selected from among the plurality of map segments. The controller may include: a compression engine configured to compress the one or more map segments and generate one or more compressed map segments and metadata corresponding thereto; a map data loading buffer configured to store the one or more compressed map segments and the metadata; and a processor configured to store the one or more compressed map segments to a random access memory (RAM) using the metadata.

Abstract: A data storage device may include a non-volatile memory device storing an address mapping table including a plurality of map segments and a controller including a random-access memory. The controller loads a compressed or non-compressed first map segment into the random-access memory based on meta-information of the first map segment in response to a read request received from a host device. The meta-information is stored in a map segment meta-information table stored in the random-access memory and the meta-information represents whether the map segments are compressible or not.

Abstract: Provided herein may be a memory system and a method of operating the memory system. The method may include: receiving an unmap command corresponding to logical addresses; setting a state of at least one unmap bit corresponding to the logical addresses among a plurality of unmap bits included in an unmap filter to an unmapped state in response to the unmap command; and setting a state of logical-to-physical address mapping information about a logical address, among the logical addresses, that does not correspond to the at least one unmap bit to an unmapped state.

Abstract: A memory system includes: a memory device including a plurality of memory blocks each including a plurality of pages suitable for storing data; and a controller suitable for receiving a plurality of commands from a host, performing a plurality of command executions on the plurality of memory blocks in response to the plurality of commands, checking parameters of the plurality of memory blocks according to the plurality of command executions performed on the plurality of memory blocks, selecting first memory blocks among the plurality of memory blocks according to the parameters, and copying data stored in the first memory blocks to second memory blocks among the plurality of memory blocks.

Abstract: A controller includes: a processor suitable for controlling a memory device to read map data stored in a memory and read out a physical address corresponding to data requested by a host to be read; a counter suitable for obtaining reliability information on the map data stored in the memory; a determining unit suitable for activating a pre-pumping mode when reliability of the map data is poor; a deciding unit suitable for determining a first target die of a pre-pumping operation for reading the data in the activated pre-pumping mode; and a pumping unit suitable for controlling the memory device to perform the pre-pumping operation on the first target die during a background operation for reading out the physical address.

Abstract: A method of a read reclaim operation of a memory controller, the method comprising: updating, during each read operation for a read operation unit among one or more read operation units included in each of a plurality of memory blocks, a first index for a corresponding one among the plurality of memory blocks and a second index for the read operation unit; detecting a warming block, the first index of which is over a first threshold among the plurality of memory blocks; detecting a read-hot-spot, the updated second index of which is over a second threshold among the read operation units included in the warming block; and performing the read reclaim operation on the read-hot-spot.

Abstract: A method for operating a data storage device which uses a nonvolatile memory device including a buffer memory block which temporarily stores data, as a storage medium, includes receiving an unmap request which requests that an unmap address be erased, from a host device; storing the unmap address and flag information indicating that the unmap address is unmapped, in a first empty page of the buffer memory block; and mapping the unmap address and flagging flag information indicating that the unmap address is unmapped, in a physical-to-logical (P2L) map corresponding to the first empty page of the buffer memory block.

Abstract: A controller includes: a first buffer suitable for buffering data read from a memory device; a second buffer suitable for buffering data to be written into the memory device; a processor suitable for, in response to a read command, controlling the memory device to read data therefrom and the first buffer to buffer the read data; and a buffer management unit suitable for, in response to the read command, providing the buffered data of the first buffer when the second buffer does not currently buffer data to be read.

Abstract: An operating method for a data storage device may include: reading data from a first memory region of a storage medium; storing the read data in a data buffer; and writing the data stored in the data buffer to a second memory region of the storage medium, based on a read count for the first memory region.

Abstract: A memory system may include: a memory device including a plurality of memory blocks configured in a plurality of super memory blocks; and a controller suitable for detecting two or more bad super memory blocks each including at least one bad block among the super memory blocks, selecting at least one victim super memory block among the bad super memory blocks, and replacing the at least one bad block in each remaining bad super memory block with at least one normal block of the victim super memory block.

Abstract: A controller includes a memory suitable for storing valid data of first data in a first data region and storing second data in a second data region, wherein the first data includes the valid data and dummy data; a translation unit suitable for performing a first translation operation of changing the first data to the valid data by eliminating the dummy data from the first data, performing a second translation operation of changing the valid data to the first data by adding the dummy data to the valid data, and exchanging the valid data with the memory; and a processor suitable for exchanging the first data with the translation unit, and exchanging the second data with the memory.

Abstract: A data storage device includes a controller configured to control data to be written in a first page; and a nonvolatile memory device configured to perform a write operation for writing the data, according to whether the first page is written or not, wherein the nonvolatile memory device provides a state information including an overwrite information meaning whether the write operation has caused an overwrite, to the controller.

Abstract: A memory system may include a memory device including 0th to N-1th memory blocks, wherein N is a positive integer; and a controller having a first list and a second list, wherein the first list includes 0th to N-1th erase count values respectively for the 0th to N-1th memory blocks, wherein the second list includes 0th to N-1th difference values respectively for the 0th to N-1th memory blocks, wherein each of the 0th to N-1th difference values is a difference between an average value of the 0th to N-1th erase count values and each of the 0th to N-1th erase count values, wherein the controller selects a source block and a target block among the 0th to N-1th memory blocks depending on the 0th to N-1th erase count values included in the first list and the 0th to N-1th difference values included in the second list to perform a wear leveling between the source block and the target block.

Abstract: A data storage device includes a controller configured to control data to be written in a first page; and a nonvolatile memory device configured to perform a write operation for writing the data, according to whether the first page is written or not, wherein the nonvolatile memory device provides a state information including an overwrite information meaning whether the write operation has caused an overwrite, to the controller.