Abstract: A battery rack includes: a housing; a module unit provided in the housing, including a plurality of battery cells, and having at least one vent hole; and a cooling unit provided to face the vent hole in the housing, and including a cooling line in which a coolant is provided, wherein the cooling line is provided so that at least a portion of an outer periphery thereof is melted by heat generated from the module unit to supply the coolant toward the vent hole.

Abstract: An energy storage system includes: stacked battery modules; and a rack accommodating the battery modules. The rack includes a sidewall disposed on one side of the battery modules, and the sidewall includes a fire-resistant member opposing the battery modules.

Abstract: A battery module is proposed. The battery module includes a plurality of battery sub-modules, and a front cover part configured to cover an outermost stacking surface of the plurality of stacked battery sub-modules. The front cover part includes a front plate including a contact terminal electrically connected to an outside, a bus bar electrically connecting the plurality of battery sub-modules to each other, and a disconnection induction bus bar coupled to an inside end of the contact terminal to press and contact the bus bar, and a switching slider configured to slide between the bus bar and the disconnection induction bus bar.

Abstract: An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Abstract: A battery module includes a battery sub-module including a cell support member, at least one battery cell accommodated in the cell support member, and a case provided to partially surround the at least one battery cell, and a first barrier disposed on a first side of the battery sub-module, wherein the at least one battery cell is enclosed and sealed by the cell support member and the case, and the first barrier includes a first protrusion configured to press a part of the case inwardly of the battery sub-module

Abstract: A battery module includes a housing; a first battery cell and a second battery cell accommodated inside the housing; a first conductive member electrically connecting the first battery cell and the second battery cell, partially embedded in the housing to be fixed to the housing, and not exposed to the outside of the housing, and a second conductive member electrically connected to the first conductive member and partially exposed to the outside of the housing.

Abstract: An image sensor is provided. An image sensor includes: a substrate including an active pixel sensor region, an optical black sensor region, and a boundary region provided between the active pixel sensor region and the optical black sensor region; a photoelectric conversion element provided inside the substrate on the boundary region; a passivation layer provided on the substrate; a grid trench formed on the boundary region of the substrate and extending from an upper surface of the passivation layer toward an inside of the passivation layer; grid patterns, each of the grid patterns being provided on the passivation layer on each of the active pixel sensor region and the boundary region of the substrate, at least a part of a grid pattern being provided inside the grid trench; and a color filter provided between the grid patterns.

Abstract: A semiconductor device including: a first substrate including a first surface and a second surface; a first inter-wiring insulating film on the first substrate; a first wiring in the first inter-wiring insulating film; a landing via in the first inter-wiring insulating film, and spaced apart from the first wiring; a second substrate including a third surface and a fourth surface; a second inter-wiring insulating film on the second substrate; a second wiring in the second inter-wiring insulating film; and a through via structure penetrating the second substrate and the second inter-wiring insulating film, and electrically connecting the second wiring to the landing via, wherein with respect to the second surface of the first substrate, a top surface of the landing via is higher than a bottom surface of the first wiring, and a bottom surface of the landing via is lower than the bottom surface of the first wiring.

Abstract: An image sensor including: a substrate which includes a first surface and a second surface opposite each other; a plurality of pixels, each pixel including a photoelectric conversion layer in the substrate; a pixel separation pattern disposed in the substrate and separating the pixels; a surface insulating layer disposed on the first surface of the substrate; conductor contacts disposed in the surface insulating layer; and a grid pattern disposed on the surface insulating layer, wherein the pixel separation pattern includes a first portion and a second portion arranged in a direction parallel to the first surface of the substrate, and the conductor contacts are interposed between the first portion of the pixel separation pattern and the grid pattern and are not interposed between the second portion of the pixel separation pattern and the grid pattern.

Abstract: Provided herein are compositions for treating a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage in a subject, pharmaceutical compositions comprising the compositions and pharmaceutically acceptable excipients, and nutraceutical compositions comprising the compositions and nutraceutically acceptable excipients. Provided also herein are methods of treating a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage in a subject in need thereof, methods of reducing, alleviating, or delaying a sign or a symptom of a disorder characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage in a subject in need thereof, and methods of regulating inflammation, antioxidant enzymes, and apoptosis in a subject having a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage.

Abstract: An image sensor includes a first region and a second region surrounding the first region. A substrate includes a first surface and a second surface that is opposite to the first surface. A photoelectric conversion element is disposed on the substrate. A passivation layer is disposed on the first surface of the substrate. A microlens is disposed on the passivation layer in the first region and is not disposed on the passivation layer in the second region. A pattern structure is disposed on an upper surface of the passivation layer in the second region. The pattern structure includes a metal and has at least one lateral side wall having a sloped profile.

Abstract: Provided herein are compositions for treating a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage in a subject, pharmaceutical compositions comprising the compositions and pharmaceutically acceptable excipients, and pharmaceutical formulations comprising the compositions. Provided also herein are methods of treating a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage in a subject, and methods of regulating inflammation, antioxidant enzymes, and apoptosis in a subject having a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage.

Abstract: The present invention relates to pressure generation apparatus and method for superconducting power equipment and, more particularly, to pressure generation apparatus and method for superconducting power equipment, wherein a pressure system separately arranged to apply pressure to liquid nitrogen in the superconducting power equipment is disposed inside a pressure vessel.

Abstract: A substrate includes a plurality of pixels arranged in a two-dimensional array structure and has a front side and a back side opposite to the front side. An interconnection is arranged on the front side of the substrate. An insulating layer, a color filter, and a micro-lens are arranged on the back side of the substrate. A pixel separation structure is disposed in the substrate. The pixel separation structure includes a conductive layer having a grid structure in a planar view of the image sensor and surrounds each of the plurality of pixels. A back side contact is vertically overlapped with and electrically connected to a grid point portion of the grid structure of the conductive layer of the pixel separation structure.

Abstract: Provided herein are compositions for treating a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage in a subject, pharmaceutical compositions comprising the compositions and pharmaceutically acceptable excipients, and pharmaceutical formulations comprising the compositions. Provided also herein are methods of treating a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage in a subject, and methods of regulating inflammation, antioxidant enzymes, and apoptosis in a subject having a disorder or a disease associated with or characterized by neuro-inflammation, neuro-apoptosis, or neuro-oxidative damage.

Abstract: A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.

Abstract: A fluorescence lifetime measurement apparatus according to an embodiment of the present invention includes an illumination light generation unit that generates illumination light, a fluorescence photon detection unit that collects fluorescence photons generated by illuminating a sample including fluorescent molecules with the illumination light, a conversion unit that converts the collected fluorescence photons into a first clock signal and converts illumination light that does not pass through the sample into a second clock signal, a first module that analyzes a fluorescence lifetime of the collected fluorescence photons from the conversion unit, a control unit that designates a range of interest (ROI) of the sample from the first module, and a second module that analyzes a fluorescence lifetime of fluorescence photons corresponding to the ROI.

Abstract: A substrate includes a plurality of pixels arranged in a two-dimensional array structure and has a front side and a back side opposite to the front side. An interconnection is arranged on the front side of the substrate. An insulating layer, a color filter, and a micro-lens are arranged on the back side of the substrate. A pixel separation structure is disposed in the substrate. The pixel separation structure includes a conductive layer having a grid structure in a planar view of the image sensor and surrounds each of the plurality of pixels. A back side contact is vertically overlapped with and electrically connected to a grid point portion of the grid structure of the conductive layer of the pixel separation structure.

Abstract: An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.

Abstract: A substrate includes a plurality of pixels arranged in a two-dimensional array structure and has a front side and a back side opposite to the front side. An interconnection is arranged on the front side of the substrate. An insulating layer, a color filter, and a micro-lens are arranged on the back side of the substrate. A pixel separation structure is disposed in the substrate. The pixel separation structure includes a conductive layer having a grid structure in a planar view of the image sensor and surrounds each of the plurality of pixels. A back side contact is vertically overlapped with and electrically connected to a grid point portion of the grid structure of the conductive layer of the pixel separation structure.