Patents by Inventor Ce Zhao

Ce Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10734456
    Abstract: A display panel, a method for manufacturing the display panel, and a display apparatus are provided. The display panel includes a base substrate; a thin film transistor; an OLED structure formed on the thin film transistor including a first and second electrodes arranged opposite to each other and an organic light emitting layer arranged between the first and second electrodes; a light shielding layer arranged between the first electrode and the organic light emitting layer. The light shielding layer includes a first and a second light shielding layers. The first light shielding layer includes a first light shielding portion and a first opening portion corresponding to a pixel area. The second light shielding layer includes a second light shielding portion and a second opening portion corresponding to a pixel area. The second light shielding portion includes a first and second parts.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: August 4, 2020
    Assignees: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongchao Huang, Dongfang Wang, Jun Cheng, Min He, Bin Zhou, Ce Zhao
  • Publication number: 20200209921
    Abstract: A flexible display panel and a film-like structure are provided according to the present disclosure. The flexible display panel includes a flexible display structure and a film-like structure arranged on at least one side of the flexible display structure. The film-like structure includes: a first flexible layer, a second flexible layer, a filler sealed between the first flexible layer and the second flexible layer, and a heater configured to heat the filler. A hardness of the filler varies with a temperature of the filler.
    Type: Application
    Filed: August 3, 2017
    Publication date: July 2, 2020
    Applicants: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yuankui DING, Guangcai YUAN, Ce ZHAO
  • Patent number: 10680053
    Abstract: A fabrication method for fabricating a thin-film transistor includes: forming a light shielding layer on a substrate; forming a buffer layer covering the light shielding layer, and forming a semiconductor material layer stacked on a surface of the buffer layer away from the substrate; forming a through hole penetrating through the buffer layer and the semiconductor material layer; patterning the semiconductor material layer to form an active layer covering a partial region of the buffer layer; forming a gate insulator layer on a surface of the active layer away from the substrate and a gate stacked on a surface of the gate insulator layer away from the substrate; forming a source and a drain on the surface of the buffer layer away from the substrate; and forming a dielectric layer covering the gate, the source, the drain, and the buffer layer, and being recessed into the through hole to form a groove.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: June 9, 2020
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yingbin Hu, Liangchen Yan, Ce Zhao, Yuankui Ding, Yang Zhang, Yongchao Huang, Luke Ding, Jun Liu
  • Publication number: 20200168744
    Abstract: A method for manufacturing a thin film transistor includes forming a light shielding layer and a buffer layer covering the light shielding layer on a substrate. The method includes forming an active layer including a peripheral region and a channel region. The method includes forming a gate insulating layer covering the channel region and forming a contact hole exposing the light shielding layer. The method includes forming a source region and a drain region disposed on both sides of the channel region. The method includes forming an electrode layer including a gate electrode, a source electrode and a drain electrode spaced apart one another. The method includes forming a dielectric layer covering the gate electrode, the source electrode, the drain electrode and the buffer layer.
    Type: Application
    Filed: May 13, 2019
    Publication date: May 28, 2020
    Inventors: Yingbin Hu, Ce Zhao, Yuankui Ding, Jun Wang, Jun Liu, Guangyao Li, Yongchao Huang, Wei Li, Liangchen Yan
  • Publication number: 20200168687
    Abstract: A fabrication method for fabricating a thin-film transistor includes: forming a light shielding layer on a substrate; forming a buffer layer covering the light shielding layer, and forming a semiconductor material layer stacked on a surface of the buffer layer away from the substrate; forming a through hole penetrating through the buffer layer and the semiconductor material layer; patterning the semiconductor material layer to form an active layer covering a partial region of the buffer layer; forming a gate insulator layer on a surface of the active layer away from the substrate and a gate stacked on a surface of the gate insulator layer away from the substrate; forming a source and a drain on the surface of the buffer layer away from the substrate; and forming a dielectric layer covering the gate, the source, the drain, and the buffer layer, and being recessed into the through hole to form a groove.
    Type: Application
    Filed: June 14, 2019
    Publication date: May 28, 2020
    Inventors: Yingbin HU, Liangchen YAN, Ce ZHAO, Yuankui DING, Yang ZHANG, Yongchao HUANG, Luke DING, Jun LIU
  • Publication number: 20200161196
    Abstract: The present disclosure provides a method for determining a width-to-length ratio of a channel region of a thin film transistor (TFT). The method includes: S1, setting an initial width-to-length ratio of the channel region; S2, manufacturing a TFT by using a mask plate according to the initial width-to-length ratio; S3, testing the TFT manufactured according to the initial width-to-length ratio; S4, determining whether or not the test result satisfies a predetermined condition, performing S5 if the test result satisfies the predetermined condition, and performing S6 if the test result does not satisfy the predetermined condition; S5, determining the initial width-to-length ratio as the width-to-length ratio of the channel region of the TFT; S6, changing the value of the initial width-to-length ratio, adjusting a position of the mask plate according to the changed initial width-to-length ratio, and performing S2 to S4 again.
    Type: Application
    Filed: June 26, 2019
    Publication date: May 21, 2020
    Inventors: Yingbin HU, Ce ZHAO, Yuankui DING, Wei SONG, Jun WANG, Yang ZHANG, Wei LI, Liangchen YAN
  • Publication number: 20200152458
    Abstract: A metal oxide film and a manufacturing method thereof, a thin film transistor and an array substrate are provided. The manufacturing method of the metal oxide film includes: forming a metal oxide film on a base substrate; and suppling a negative ion to the metal oxide film for a preset time period by performing a anodization method, to convert a portion of metal ions in the metal oxide film into a metal oxide.
    Type: Application
    Filed: June 17, 2019
    Publication date: May 14, 2020
    Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Wei Song, Ce Zhao, Heekyu Kim, Ning Liu, Yuankui Ding, Wei Li, Yingbin Hu
  • Patent number: 10615192
    Abstract: A method of manufacturing an array substrate assembly, an array substrate assembly manufactured by the method, and a display panel including the array substrate assembly are disclosed. The method includes: providing a substrate, the substrate having a first region as a preset semiconductor-removed region, and a second region as a remaining region; forming, in the first region of the substrate, a semiconductor removing layer corrodible by a corrosive solution; and forming a semiconductor layer on the substrate formed with the semiconductor removing layer, so that the semiconductor layer covers the semiconductor removing layer.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: April 7, 2020
    Assignees: BOE TECHNOLOGY GROUP CO, LTD., HEFEI, XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Yuankui Ding, Guangcai Yuan, Ce Zhao, Bin Zhou, Jun Cheng, Zhaofan Liu, Yingbin Hu, Yongchao Huang
  • Publication number: 20200091199
    Abstract: A thin film transistor and a method of fabricating the same, an array substrate and a method of fabricating the same, and a display device are provided, the method of fabricating a thin film transistor includes: forming an active layer on a base substrate; forming a metal layer on the active layer; and processing the metal layer to form a source electrode, a drain electrode, and a metal oxide layer, the metal oxide layer covering the source electrode, the drain electrode, and the active layer, the source electrode and the drain electrode being spaced apart and insulated from each other by the metal oxide layer.
    Type: Application
    Filed: April 26, 2019
    Publication date: March 19, 2020
    Inventors: Wei Song, Ce Zhao, Bin Zhou, Dongfang Wang, Yuankui Ding, Jun Liu, Yingbin Hu, Wei Li
  • Patent number: 10581029
    Abstract: The present disclosure provides a method for manufacturing an organic electroluminescence device, including steps of: adjusting a grating period of a periodic grating structure in such a manner that a wavelength of an emergent light beam caused by SP-coupling is within a predetermined range of a light-emission peak of the organic electroluminescence device; and forming the periodic grating structure in the organic electroluminescence device in accordance with the obtained grating period by adjustment.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: March 3, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jun Wang, Ce Zhao, Dongfang Wang, Bin Zhou
  • Publication number: 20200066901
    Abstract: The disclosure relates to a thin film transistor structure, an array substrate, and a method for manufacturing a thin film transistor structure. The thin-film transistor structure includes a base substrate, a thin film transistor on the base substrate. Wherein the thin film transistor includes an active layer and a source/drain electrode on a side, facing towards the base substrate, of the active layer. Wherein the source/drain electrode has a protrusion protruding from an edge portion of the active layer in a direction parallel to a surface of the base substrate.
    Type: Application
    Filed: June 4, 2019
    Publication date: February 27, 2020
    Inventors: Luke DING, Zhanfeng CAO, Jingang FANG, Liangchen YAN, Ce ZHAO, Dongfang WANG
  • Publication number: 20200067012
    Abstract: A display back plate, a fabricating method for the same, and a display device are provided. The display back plate includes a substrate, a transparent heat conduction layer disposed on the substrate, and an array structure layer disposed on the heat conduction layer. The array structure layer includes a light shielding layer, a first thin film transistor, and a second thin film transistor, where the light shielding layer is disposed between the transparent heat conduction layer and the first thin film transistor.
    Type: Application
    Filed: May 10, 2019
    Publication date: February 27, 2020
    Inventors: Tongshang SU, Dongfang WANG, Qinghe WANG, Ce ZHAO, Bin ZHOU, Liangchen YAN
  • Publication number: 20200056033
    Abstract: The present disclosure provides a pixel defining layer and a preparation material thereof, and a display substrate and a preparation method thereof, and relates to the field of display technologies. The preparation material of the pixel defining layer comprises the following components in mass percentages: 5%-30% of a lyophobic film-forming polymer, 0.5%-1% of lyophilic magnetic nanoparticles, 0.5%-2% of a photoinitiator, 0.1%-1% of a reactive monomer, 0.1%-1% of an additive and the balance of a solvent.
    Type: Application
    Filed: June 26, 2019
    Publication date: February 20, 2020
    Inventors: Wei Li, Jingjing Xia, Bin Zhou, Dongfang Wang, Ce Zhao, Yingbin Hu, Wei Song
  • Patent number: 10559601
    Abstract: The present disclosure relates to an array substrate and a method for manufacturing the same. The array substrate includes a thin film transistor and comprises at least a first region and a second region. A thickness of an active layer of the thin film transistor in the first region is different from that of an active layer of the thin film transistor in the second region. A ratio of the overlapped area between the source electrode or the drain electrode and the active layer of the thin film transistor to the thickness of the active layer is kept uniform over the first region and the second region.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: February 11, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Tongshang Su, Jun Cheng, Ce Zhao, Bin Zhou, Dongfang Wang, Guangcai Yuan
  • Publication number: 20200035767
    Abstract: The present disclosure relates to the display technology, and provides an OLED display substrate, a method for manufacturing the OLED display substrate and a display device. The method includes: forming pixel definition layer transition patterns with metal; and oxidizing the pixel definition layer transition patterns to form an insulative pixel definition layer.
    Type: Application
    Filed: June 10, 2019
    Publication date: January 30, 2020
    Inventors: Wei Song, Liangchen Yan, Ce Zhao, Dongfang Wang, Bin Zhou, Yuankui Ding, Jun Liu, Yingbin Hu, Wei Li
  • Publication number: 20200035836
    Abstract: Provided is a thin film transistor, including: a conductive light shielding layer; a metal oxide layer arranged on the light shielding layer; a buffer layer, an active layer, a gate insulating layer, a gate electrode, and an interlayer insulating layer arranged in sequence on the metal oxide layer, the interlayer insulating layer and the buffer layer comprising a first via hole and a second via hole for exposing the active layer, and a third via hole for exposing the metal oxide layer, in which a portion of the metal oxide layer exposed through the third via hole is a conductive portion, and other portions are insulative; and a source electrode and a drain electrode arranged on the interlayer insulating layer, in which the source electrode is connected to the active layer through the first via hole, and the drain electrode is connected to the active layer through the second via hole and connected to the conductive portion through the third via hole.
    Type: Application
    Filed: April 24, 2019
    Publication date: January 30, 2020
    Applicants: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yingbin Hu, Ce Zhao, Yuankui Ding, Wei Li, Wei Song, Luke Ding, Jun Liu, Liangchen Yan
  • Publication number: 20200035721
    Abstract: There are provided a thin-film transistor and a production method thereof, an array substrate, and a display panel. The method comprises forming an active layer, a gate insulating layer, and a gate electrode on a substrate, wherein conductor conversion treatment is performed on both sides of the homogeneous active material layer to obtain an active layer, and the active layer comprises conductor regions located at both sides and a non-conductor region located at the center, wherein a projection of the gate electrode on the substrate is within a projection of the non-conductor region on the substrate, and the distances from the projection of the gate electrode to projections of the two conductor regions on the substrate are each between 0 micrometer and 1 micrometer.
    Type: Application
    Filed: May 29, 2018
    Publication date: January 30, 2020
    Inventors: Tongshang Su, Guangcai Yuan, Dongfang Wang, Ce Zhao, Bin Zhou, Jun Liu, Jifeng Shao, Qinghe Wang, Yang Zhang
  • Publication number: 20200035716
    Abstract: The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.
    Type: Application
    Filed: April 28, 2019
    Publication date: January 30, 2020
    Inventors: Bin ZHOU, Binbin CAO, Liangchen YAN, Dongfang WANG, Ce ZHAO, Luke DING, Jun LIU
  • Publication number: 20200013867
    Abstract: The present disclosure provides a thin film transistor, including a base substrate, an active layer and a source/drain, and a conductive layer. The active layer and an outer edge of the conductive layer are formed in the same etching process. The present disclosure further provides a method for manufacturing a thin film transistor, including forming an active material layer and a conductive material layer, forming a photoresist on the conductive material layer, exposing and developing the photoresist by means of a halftone mask, removing segments of the active material layer and the conductive material layer corresponding to a photoresist completely-removed region by a same etching process, partially removing the photoresist in a photoresist completely-retained region and completely removing the photoresist in a photoresist partially-retained region, and removing a segment of the conductive material layer corresponding to the photoresist partially-retained region.
    Type: Application
    Filed: April 29, 2019
    Publication date: January 9, 2020
    Inventors: Tongshang SU, Dongfang Wang, Ce Zhao, Bin Zhou, Liangchen Yan
  • Publication number: 20190386144
    Abstract: A thin film transistor (TFT), a manufacturing method, an array substrate, a display panel, and a device is disclosed. The TFT includes a hydrogen-containing buffer layer located on a substrate; an oxide semiconductor layer located on the buffer layer, wherein the oxide semiconductor layer includes a conductor region and a semiconductor region; a source or drain located on the conductor region, and electrically connected to the conductor region; and a gate structure located on the semiconductor region.
    Type: Application
    Filed: August 29, 2019
    Publication date: December 19, 2019
    Inventors: Yuankui DING, Ce ZHAO, Guangcai YUAN, Yingbin HU, Leilei CHENG, Jun CHENG, Bin ZHOU