Patents by Inventor Chan Hwang

Chan Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10818549
    Abstract: A semiconductor device includes active regions, a gate electrode, respective drain regions, respective source regions, a drain contact structure, a source contact structure, and a gate contact structure. The active regions extend linearly in parallel on a substrate. The gate electrode crosses the active regions. The drain regions are on and/or in the active regions on a first side of the gate electrode. The respective source regions are on and/or in the active regions on a second side of the gate electrode. The drain contact structure is on multiple drain regions. The source contact structure is on multiple source regions. The gate contact structure is on the gate electrode between the drain and source contact structures. The gate contact structure includes a gate plug and an upper gate plug directly on the gate plug. A center of the gate contact structure overlies only one of the active regions.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: October 27, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Chan Gwak, Hwi Chan Jun, Heon Jong Shin, So Ra You, Sang Hyun Lee, In Chan Hwang
  • Patent number: 10763256
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Grant
    Filed: April 3, 2020
    Date of Patent: September 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Publication number: 20200274011
    Abstract: Provided is a solar cell including: a crystalline silicon semiconductor substrate having a specific radius of curvature; a plurality of microwire structures that extend from a first surface of the crystalline silicon semiconductor substrate in a vertical direction and are arranged spaced apart from each other; a first layer positioned on the first surface of the crystalline silicon semiconductor substrate and forming a P-N junction with the crystalline silicon semiconductor substrate; a first electrode part positioned on the first layer and connected to the first layer; a second layer positioned on a second surface of the crystalline silicon semiconductor substrate which is opposite the first surface; and a second electrode part positioned on the second layer and connected with the second layer.
    Type: Application
    Filed: October 24, 2018
    Publication date: August 27, 2020
    Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
    Inventors: Kwan Yong Seo, In Chan Hwang, Han Don Um
  • Patent number: 10732126
    Abstract: A method of inspecting defects on a transparent substrate may include: selecting a gradient of an illumination optical system so that light incident on the transparent substrate has a first angle; selecting a gradient of a detection optical system so that an optical axis of the detection optical system located over the transparent substrate has a second angle, which is equal to or less than the first angle; adjusting a position of at least one of the illumination optical system, the transparent substrate, and the detection optical system so that a field-of-view of the detection optical system covers a first region where the light meets a first surface of the transparent substrate and does not cover a second region where light meets a second surface of the transparent substrate, the second surface being opposite to the first surface; illuminating the transparent substrate; and detecting light scattered from the transparent substrate.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: August 4, 2020
    Assignee: Corning Incorporated
    Inventors: Chong Pyung An, Uta-Barbara Goers, En Hong, Sung-chan Hwang, Ji Hwa Jung, Tae-ho Keem, Philip Robert LeBlanc, Hyeong-cheol Lee, Michal Mlejnek, Johannes Moll, Rajeshkannan Palanisamy, Sung-jong Pyo, Amanda Kathryn Thomas, Correy Robert Ustanik
  • Patent number: 10735237
    Abstract: A method and apparatus for generating a preamble symbol in an Orthogonal Frequency Division Multiplexing (OFDM) system by generating a first main body sequence in a time domain by performing an inverse fast Fourier transform (IFFT) on a preset sequence in a frequency domain, generating a first postfix by copying samples in a preset section in the first main body sequence, generating a first prefix by copying samples in at least a portion of a section remaining by excluding the preset section from the first main body sequence, and generating a plurality of symbols, based on a combination of the first main body sequence, the first prefix, and the first postfix.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min-ho Kim, Jung-hyun Park, Nam-hyun Kim, Joon-young Lee, Jin-joo Chung, Doo-chan Hwang
  • Publication number: 20200235096
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Application
    Filed: April 3, 2020
    Publication date: July 23, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-chan JUN, Heon-jong SHIN, In-chan HWANG, Jae-ran JANG
  • Publication number: 20200209733
    Abstract: A method for fabricating a phase shift mask includes preparing a transmissive substrate on which a first mask region and a second mask region surrounding the first mask region are defined. In the first mask region, main patterns are formed having a first pitch in a first direction and a second direction perpendicular to the first direction. Each of the main patterns has a first area. In at least one row, assist patterns are formed at the first pitch to surround the main patterns. Each of the assist patterns has a second area less than the first area. In the second mask region, dummy patterns are formed in a plurality of rows. The dummy patterns surround the assist patterns at the first pitch. Each of the dummy patterns has a third area greater than the first area.
    Type: Application
    Filed: March 11, 2020
    Publication date: July 2, 2020
    Inventors: Jae-hee KIM, Chan HWANG
  • Patent number: 10677739
    Abstract: A method of inspecting defects of a transparent substrate may include: illuminating a transparent substrate; calculating an incidence angle range of light so that a first region where the light meets a first surface of the transparent substrate and a second region where light meets a second surface being opposite the first surface of the transparent substrate do not overlap each other; adjusting an incidence angle according to the incidence angle range; adjusting a position of a first detector so that a first field-of-view of the first detector covers the first region and does not cover the second region; adjusting a position of a second detector so that a second field-of-view of the second detector covers the second region and does not cover the first region; and obtaining a first image of the first region and a second image of the second region from the first and second detector, respectively.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: June 9, 2020
    Assignee: Corning Incorporated
    Inventors: Uta-Barbara Goers, En Hong, Sung-chan Hwang, Ji Hwa Jung, Tae-ho Keem, Philip Robert LeBlanc, Rajeshkannan Palanisamy, Sung-jong Pyo, Correy Robert Ustanik
  • Patent number: 10681098
    Abstract: A transmitting apparatus is provided. The transmitting apparatus includes: an L1 signaling generator configured to generate L1 signaling including first information and second information; a frame generator configured to generate a frame including a payload including a plurality of sub frames; and a signal processor configured to insert a preamble including the L1 signaling in the frame and transmit the frame. The first information includes information required for decoding a first sub frame among the plurality of sub frames. Therefore, a processing delay in a receiving apparatus is reduced.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: June 9, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-hyun Park, Min-ho Kim, Sung-woo Park, Sung-kyu Jung, Chang-hoon Choi, Doo-chan Hwang
  • Publication number: 20200177964
    Abstract: A device may receive a request associated with adjusting the media output level of a sink device that is configured to output media content. The device may identify a source gain of a source device that is configured to provide the media content to the sink device, and a sink gain of the sink device. The device may identify a sink adjustment value for changing the sink gain based on the request for adjusting the media output level of the sink device, the source gain, and the sink gain. The device may transmit, to the sink device, a control signal to permit the sink gain to be changed based on the sink adjustment value. The media output level of the sink device is based on the source gain and the sink gain.
    Type: Application
    Filed: February 12, 2020
    Publication date: June 4, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-seok KANG, Doo Hyun KIM, Sang Kwon NA, Ki Won YOO, Chul Woo LEE, Jin Joo CHUNG, Doo Chan HWANG
  • Patent number: 10665588
    Abstract: An integrated circuit device is provided as follows. A fin-type active region extends on a substrate in a first horizontal direction. A gate line extends on the fin-type active region in a second horizontal direction intersecting the first horizontal direction. A source/drain region is disposed in the fin-type active region at one side of the gate line. An insulating cover extends parallel to the substrate, with the gate line and the source/drain region arranged between the insulating cover and the substrate. A source/drain contact that vertically extends through the insulating cover has a first sidewall covered with the insulating cover and an end connected to the source/drain region. A fin isolation insulating unit vertically extends through the insulating cover into the fin-type active region. The source/drain region is arranged between the fin isolation insulating unit and the gate line.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: May 26, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwi-chan Jun, Heon-jong Shin, In-chan Hwang, Jae-ran Jang
  • Publication number: 20200152638
    Abstract: A method of forming a micro-pattern including forming a mold layer and a supporting material layer on a substrate, patterning the mold layer and the supporting material layer to form recess patterns, forming conductor patterns in the recess patterns, removing a portion of an upper portion of the supporting material layer for causing upper portions of the conductor patterns to protrude, forming a block copolymer layer on the supporting material layer, processing the block copolymer layer to phase-separate the block copolymer layer into a plurality of block parts, selectively removing some of the phase-separated plurality of block parts, and removing the supporting material layer to expose the mold layer at a position corresponding to each of the removed block parts may be provided.
    Type: Application
    Filed: January 17, 2020
    Publication date: May 14, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Soon-mok HA, Jae-hee KIM, Chan HWANG, Jong-hyuk KIM
  • Patent number: 10644006
    Abstract: A method of forming a micro-pattern including forming a mold layer and a supporting material layer on a substrate, patterning the mold layer and the supporting material layer to form recess patterns, forming conductor patterns in the recess patterns, removing a portion of an upper portion of the supporting material layer for causing upper portions of the conductor patterns to protrude, forming a block copolymer layer on the supporting material layer, processing the block copolymer layer to phase-separate the block copolymer layer into a plurality of block parts, selectively removing some of the phase-separated plurality of block parts, and removing the supporting material layer to expose the mold layer at a position corresponding to each of the removed block parts may be provided.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: May 5, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soon-mok Ha, Jae-hee Kim, Chan Hwang, Jong-hyuk Kim
  • Publication number: 20200126858
    Abstract: A semiconductor device includes active regions, a gate electrode, respective drain regions, respective source regions, a drain contact structure, a source contact structure, and a gate contact structure. The active regions extend linearly in parallel on a substrate. The gate electrode crosses the active regions. The drain regions are on and/or in the active regions on a first side of the gate electrode. The respective source regions are on and/or in the active regions on a second side of the gate electrode. The drain contact structure is on multiple drain regions. The source contact structure is on multiple source regions. The gate contact structure is on the gate electrode between the drain and source contact structures. The gate contact structure includes a gate plug and an upper gate plug directly on the gate plug. A center of the gate contact structure overlies only one of the active regions.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 23, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Chan GWAK, Hwi Chan JUN, Heon Jong SHIN, So Ra YOU, Sang Hyun LEE, In Chan HWANG
  • Publication number: 20200122878
    Abstract: A foldable includes side members formed as a transverse central portion of the board, and folded respectively to form side surfaces of the box; an upper member formed to extend in an upper direction of the side members, and divided by a cutting line along a folding direction to form an upper surface of the box; and a lower member formed to extend in a lower direction of the side members, and divided by a cutting line along a folding direction to form a lower surface of the box.
    Type: Application
    Filed: April 17, 2018
    Publication date: April 23, 2020
    Applicant: WINGBOX Co.,Ltd
    Inventor: Kyu Chan HWANG
  • Patent number: 10620528
    Abstract: A method for fabricating a phase shift mask includes preparing a transmissive substrate on which a first mask region and a second mask region surrounding the first mask region are defined. In the first mask region, main patterns are formed having a first pitch in a first direction and a second direction perpendicular to the first direction. Each of the main patterns has a first area. In at least one row, assist patterns are formed at the first pitch to surround the main patterns. Each of the assist patterns has a second area less than the first area. In the second mask region, dummy patterns are formed in a plurality of rows. The dummy patterns surround the assist patterns at the first pitch. Each of the dummy patterns has a third area greater than the first area.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: April 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Jae-hee Kim, Chan Hwang
  • Patent number: 10602230
    Abstract: A device may receive a request associated with adjusting the media output level of a sink device that is configured to output media content. The device may identify a source gain of a source device that is configured to provide the media content to the sink device, and a sink gain of the sink device. The device may identify a sink adjustment value for changing the sink gain based on the request for adjusting the media output level of the sink device, the source gain, and the sink gain. The device may transmit, to the sink device, a control signal to permit the sink gain to be changed based on the sink adjustment value. The media output level of the sink device is based on the source gain and the sink gain.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: March 24, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo Seok Kang, Doo Hyun Kim, Sang Kwon Na, Ki Won Yoo, Chul Woo Lee, Jin Joo Chung, Doo Chan Hwang
  • Patent number: 10600789
    Abstract: A method of forming a micro-pattern including forming a mold layer and a supporting material layer on a substrate, patterning the mold layer and the supporting material layer to form recess patterns, forming conductor patterns in the recess patterns, removing a portion of an upper portion of the supporting material layer for causing upper portions of the conductor patterns to protrude, forming a block copolymer layer on the supporting material layer, processing the block copolymer layer to phase-separate the block copolymer layer into a plurality of block parts, selectively removing some of the phase-separated plurality of block parts, and removing the supporting material layer to expose the mold layer at a position corresponding to each of the removed block parts may be provided.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soon-mok Ha, Jae-hee Kim, Chan Hwang, Jong-hyuk Kim
  • Patent number: 10566252
    Abstract: A method of correcting an overlay includes: forming a first pattern on a first substrate; forming a second pattern on the first pattern; obtaining a first overlay error profile of the second pattern and obtaining a first overlay correction profile from the first overlay error profile; forming a third pattern on the second pattern; obtaining a second overlay error profile of the third pattern and obtaining a second overlay correction profile from the second overlay error profile; and forming the second pattern on a second substrate, wherein the forming of the second pattern on the second substrate includes: determining whether the second overlay correction profile has a non-correctable model parameter; and when the second overlay correction profile has the non-correctable model, obtaining a preliminary correction profile to correct a position of the second pattern to be formed on the second substrate.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: February 18, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seungyoon Lee, Chan Hwang
  • Patent number: 10553484
    Abstract: A semiconductor device includes a plurality of active regions spaced apart from each other and extending linearly in parallel on a substrate. A gate electrode crosses the plurality of active regions, and respective drain regions are on and/or in respective ones of the active regions on a first side of the gate electrode and respective source regions are on and/or in respective ones of the active regions on a second side of the gate electrode. A drain plug is disposed on the drain regions and a source plug is disposed on the source regions. A gate plug is disposed on the gate electrode between the drain plug and the source plug such that a straight line passing through a center of the drain plug and a center of the source plug intersects the gate plug.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: February 4, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Chan Gwak, Hwi Chan Jun, Heon Jong Shin, So Ra You, Sang Hyun Lee, In Chan Hwang