Patents by Inventor Chan-Long Shieh

Chan-Long Shieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8193594
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: June 5, 2012
    Assignee: CBRITE Inc.
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
  • Patent number: 8187929
    Abstract: A method of fabricating a thin film transistor for an active matrix display using reduced masking operations includes patterning a gate on a substrate. A gate dielectric is formed over the gate and a semiconducting metal oxide is deposited on the gate dielectric. A channel protection layer is patterned on the semiconducting metal oxide overlying the gate to define a channel area and to expose the remaining semiconducting metal oxide. A source/drain metal layer is deposited on the structure and etched through to the channel protection layer above the gate to separate the source/drain metal layer into source and drain terminals and the source/drain metal layer and the semiconducting metal oxide are etched through at the periphery to isolate the transistor. A nonconductive spacer is patterned on the transistor and portions of the surrounding source/drain metal layer.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: May 29, 2012
    Assignee: CBRITE, Inc.
    Inventors: Chan-Long Shieh, Fatt Foong, Gang Yu
  • Publication number: 20120104381
    Abstract: A metal oxide semiconductor device including an active layer of metal oxide, a layer of gate dielectric, and a layer of low trap density material. The layer of low trap density material is sandwiched between the active layer of metal oxide and the layer of gate dielectric. The layer of low trap density material has a major surface parallel and in contact with a major surface of the active layer of metal oxide to form a low trap density interface with the active layer of metal oxide. A second layer of low trap density material can optionally be placed in contact with the opposed major surface of the active layer of metal oxide so that a low trap density interface is formed with both surfaces of the active layer of metal oxide.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 3, 2012
    Inventors: Chan-Long Shieh, Gang Yu, Fatt Foong
  • Patent number: 8129720
    Abstract: A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: March 6, 2012
    Inventors: Chan-Long Shieh, Gang Yu
  • Publication number: 20110309389
    Abstract: A full-color AM OLED includes a transparent substrate, a color filter positioned on an upper surface of the substrate, and a metal oxide thin film transistor backpanel positioned in overlying relationship on the color filter and defining an array of pixels. An array of OLEDs is formed on the backpanel and positioned to emit light downwardly through the backpanel, the color filter, and the substrate in a full-color display. Light emitted by each OLED includes a first emission band with wavelengths extending across the range of two of the primary colors and a second emission band with wavelengths extending across the range of the remaining primary color. The color filter includes for each pixel, two zones separating the first emission band into two separate primary colors and a third zone passing the second emission band.
    Type: Application
    Filed: June 28, 2011
    Publication date: December 22, 2011
    Inventors: Gang Yu, Chan-Long Shieh
  • Publication number: 20110227065
    Abstract: A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
    Type: Application
    Filed: May 26, 2011
    Publication date: September 22, 2011
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 7977868
    Abstract: A full-color active matrix organic light emitting display including a transparent substrate, a color filter positioned on an upper surface of the substrate, a spacer layer formed on the upper surface of the color filter, a metal oxide thin film transistor backpanel formed on the spacer layer and defining an array of pixels, and an array of single color, organic light emitting devices formed on the backpanel and positioned to emit light downwardly through the backpanel, the spacer layer, the color filter, and the substrate in a full-color display.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: July 12, 2011
    Assignee: Cbrite Inc.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 7977151
    Abstract: A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: July 12, 2011
    Assignee: Cbrite Inc.
    Inventors: Chan-Long Shieh, Gang Yu
  • Publication number: 20110147761
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotating element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Application
    Filed: January 27, 2011
    Publication date: June 23, 2011
    Applicant: CBRITE INC.
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
  • Publication number: 20110104841
    Abstract: A method of fabricating a thin film transistor for an active matrix display using reduced masking operations includes patterning a gate on a substrate. A gate dielectric is formed over the gate and a semiconducting metal oxide is deposited on the gate dielectric. A channel protection layer is patterned on the semiconducting metal oxide overlying the gate to define a channel area and to expose the remaining semiconducting metal oxide. A source/drain metal layer is deposited on the structure and etched through to the channel protection layer above the gate to separate the source/drain metal layer into source and drain terminals and the source/drain metal layer and the semiconducting metal oxide are etched through at the periphery to isolate the transistor. A nonconductive spacer is patterned on the transistor and portions of the surrounding source/drain metal layer.
    Type: Application
    Filed: November 4, 2009
    Publication date: May 5, 2011
    Inventors: Chan-Long Shieh, Fatt Foong, Gang Yu
  • Publication number: 20110062431
    Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of amorphous metal oxide semiconductor material, an interface of the amorphous metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of amorphous metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red radiation to improve the mobility and operating stability of the amorphous metal oxide semiconductor material while retaining at least the amorphous metal oxide semiconductor material adjacent the gate metal layer amorphous.
    Type: Application
    Filed: September 1, 2010
    Publication date: March 17, 2011
    Inventors: Chan-Long Shieh, Hsing-Chung Lee
  • Patent number: 7898042
    Abstract: Two-terminal switching devices characterized by high on/off current ratios and by high breakdown voltage are provided. These devices can be employed as switches in the driving circuits of active matrix displays, e.g., in electrophoretic, rotataing element and liquid crystal displays. The switching devices include two electrodes, and a layer of a broad band semiconducting material residing between the electrodes. According to one example, the cathode comprises a metal having a low work function, the anode comprises an organic material having a p+ or p++ type of conductivity, and the broad band semiconductor comprises a metal oxide. The work function difference between the cathode and the anode material is preferably at least about 0.6 eV. The on/off current ratios of at least 10,000 over a voltage range of about 15 V can be achieved. The devices can be formed, if desired, on flexible polymeric substrates having low melting points.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: March 1, 2011
    Assignee: Cbrite Inc.
    Inventors: Gang Yu, Chan-Long Shieh, Hsing-Chung Lee
  • Publication number: 20110037054
    Abstract: An active matrix organic light emitting display includes a plurality of pixels with each pixel including at least one organic light emitting diode circuit. Each diode circuit producing a predetermined amount of light lm in response to power W applied to the circuit and including n organic light emitting diodes cascaded in series so as to increase voltage dropped across the cascaded diodes by the factor of n, where n is an integer greater than one. Each diode of the n organic light emitting diodes produces approximately 1/n of the predetermined amount of light lm so as to reduce current flowing in the diodes by 1/n. The organic light emitting diode circuit of each pixel includes a thin film transistor current driver with the cascaded diodes connected in the source/drain circuit so the current driver provides the current flowing in the diodes.
    Type: Application
    Filed: August 17, 2009
    Publication date: February 17, 2011
    Inventors: Chan-Long Shieh, Gang Yu
  • Publication number: 20100267197
    Abstract: A method of fabricating metal oxide TFTs on transparent substrates includes the steps of positioning an opaque gate metal area on the front surface of the substrate, depositing transparent gate dielectric and transparent metal oxide semiconductor layers overlying the gate metal and a surrounding area, depositing transparent passivation material on the semiconductor material, depositing photoresist on the passivation material, exposing and developing the photoresist to remove exposed portions, etching the passivation material to leave a passivation area defining a channel area, depositing transparent conductive material over the passivation area, depositing photoresist over the conductive material, exposing and developing the photoresist to remove unexposed portions, and etching the conductive material to leave source and drain areas on opposed sides of the channel area.
    Type: Application
    Filed: April 21, 2009
    Publication date: October 21, 2010
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 7812346
    Abstract: A fabrication method is used in conjunction with a semiconductor device having a metal oxide active layer less than 100 nm thick and the upper major surface and the lower major surface have material in abutting engagement to form underlying interfaces and overlying interfaces. The method of fabrication includes controlling interfacial interactions in the underlying interfaces and the overlying interfaces to adjust the carrier density in the adjacent metal oxide by selecting a metal oxide for the metal oxide active layer and by selecting a specific material for the material in abutting engagement. The method also includes one or both steps of controlling interactions in underlying interfaces by surface treatment of an underlying material forming a component of the underlying interface and controlling interactions in overlying interfaces by surface treatment of the metal oxide film performed prior to deposition of material on the metal oxide layer.
    Type: Grant
    Filed: July 16, 2008
    Date of Patent: October 12, 2010
    Assignee: Cbrite, Inc.
    Inventors: Chan-Long Shieh, Gang Yu
  • Patent number: 7772589
    Abstract: A high performance thin film transistor includes a flexible substrate, a layer of metal oxide semiconductor material deposited on the flexible substrate, and a layer of self-assembled organic gate dielectric material deposited on the metal oxide semiconductor material. The metal oxide semiconductor material has high carrier mobility and is transparent. An interface is formed between the layer of metal oxide semiconductor material and the layer of organic gate dielectric material that is substantially free of reactions and Fermi level pinning. The polymer materials are not polar and do not give rise to gap state formation and interface scattering.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: August 10, 2010
    Assignee: Cbrite Inc.
    Inventors: Chan-Long Shieh, Gang Yu, Hsing-Chung Lee
  • Publication number: 20100059742
    Abstract: A thin film semiconductor device has a semiconductor layer including a mixture of an amorphous semiconductor ionic metal oxide and an amorphous insulating covalent metal oxide. A pair of terminals is positioned in communication with the semiconductor layer and define a conductive channel, and a gate terminal is positioned in communication with the conductive channel and further positioned to control conduction of the channel. The invention further includes a method of depositing the mixture including using nitrogen during the deposition process to control the carrier concentration in the resulting semiconductor layer.
    Type: Application
    Filed: September 8, 2008
    Publication date: March 11, 2010
    Inventors: Chan-Long Shieh, Gang Yu
  • Publication number: 20100019656
    Abstract: A full-color active matrix organic light emitting display including a transparent substrate, a color filter positioned on an upper surface of the substrate, a spacer layer formed on the upper surface of the color filter, a metal oxide thin film transistor backpanel formed on the spacer layer and defining an array of pixels, and an array of single color, organic light emitting devices formed on the backpanel and positioned to emit light downwardly through the backpanel, the spacer layer, the color filter, and the substrate in a full-color display.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 28, 2010
    Inventors: Gang Yu, Chan-Long Shieh
  • Publication number: 20100012932
    Abstract: A fabrication method is used in conjunction with a semiconductor device having a metal oxide active layer less than 100 nm thick and the upper major surface and the lower major surface have material in abutting engagement to form underlying interfaces and overlying interfaces. The method of fabrication includes controlling interfacial interactions in the underlying interfaces and the overlying interfaces to adjust the carrier density in the adjacent metal oxide by selecting a metal oxide for the metal oxide active layer and by selecting a specific material for the material in abutting engagement. The method also includes one or both steps of controlling interactions in underlying interfaces by surface treatment of an underlying material forming a component of the underlying interface and controlling interactions in overlying interfaces by surface treatment of the metal oxide film performed prior to deposition of material on the metal oxide layer.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 21, 2010
    Inventors: Chan-Long Shieh, Gang Yu
  • Publication number: 20090289301
    Abstract: A method of annealing a metal oxide on a temperature sensitive substrate formation includes the steps of providing a temperature sensitive substrate formation and forming a spacer layer on a surface of the temperature sensitive substrate formation. A metal oxide semiconductor device is formed on the spacer layer, the device includes at least a layer of metal oxide semiconductor material, an interface of the metal oxide layer with a dielectric layer, and a gate metal layer adjacent the layer of metal oxide semiconductor material and the interface. The method then includes the step of at least partially annealing the layer of metal oxide semiconductor material by heating the adjacent gate metal layer with pulses of infra red or visible light radiation.
    Type: Application
    Filed: May 21, 2008
    Publication date: November 26, 2009
    Inventors: Chan-Long Shieh, Hsing-Chung Lee