Abstract: Provided are a phase change memory device and a method of forming the same. According to the phase change memory, a first plug electrode and a second plug electrode are spaced apart from each other in a mold insulating layer. A phase change pattern is disposed on the mold insulating layer. The phase change pattern contacts a top of the first plug electrode and a first potion of a top of the second plug electrode. An interconnection is electrically connected to a second portion of the top of the second plug electrode.

Abstract: A test carrier includes an insert body, a first latch assembly including one or more first latches pivotally attached to the insert body, and a second latch assembly including one or more second latches pivotally attached to the insert body. The second latch assembly is configured to engage with an external connection terminal array of an electronic component during testing thereof. A method of testing a semiconductor device and a system for testing a semiconductor device are also provided.

Abstract: The present invention relates to an apparatus for manufacturing compacted irons and an apparatus for manufacturing molten irons using the same. The apparatus for manufacturing compacted irons according to the present invention includes a charging hopper into which reduced materials containing fine reduced irons are charged, screw feeders installed inside the charging hopper to make an acute angle with a vertical direction and discharging the reduced materials containing fine reduced irons which enter into the charging hopper, and a couple of rolls separated from each other to form a gap between the rolls. The couple of rolls compact the reduced materials containing fine reduced irons discharged from the charging hopper by the screw feeders and manufacture compacted irons. Each screw feeders is arranged side by side along an axis direction of the couple of rolls and an extension of the center axis of each screw feeder passes through the gap.

Abstract: In a semiconductor memory device and a method of manufacturing the same, an insulating layer is formed on a substrate having a logic region on which a first pad is provided and a cell region on which a second pad and a lower electrode are subsequently provided. The insulating layer is etched to be a first insulating layer pattern having a first opening exposing the first pad. A first plug is formed in the first opening. The first insulating layer pattern where the first plug is formed is etched to be a second insulating layer pattern having a second opening exposing the lower electrode. A second plug including a phase-changeable material is formed in the second opening. A conductive wire and an upper electrode are formed on the first plug and the second plug, respectively.

Abstract: A test carrier includes an insert body, a first latch assembly including one or more first latches pivotally attached to the insert body, and a second latch assembly including one or more second latches pivotally attached to the insert body. The second latch assembly is configured to engage with an external connection terminal array of an electronic component during testing thereof. A method of testing a semiconductor device and a system for testing a semiconductor device are also provided.

Abstract: In a program method for a multi-level phase change memory device, multi-level data to be programmed in a selected memory cell is received, and a program signal is applied to the selected memory cell according to the received multi-level data. Herein, a rising time of the program signal is set to be longer than a falling time of the program signal.

Abstract: A phase change memory device and method of manufacturing the same is provided. A first electrode having a first surface is provided on a substrate. A second electrode having a second surface at a different level from the first surface is on the substrate. The second electrode may be spaced apart from the first electrode. A third electrode may be formed corresponding to the first electrode. A fourth electrode may be formed corresponding to the second electrode. A first phase change pattern may be interposed between the first surface and the third electrode. A second phase change pattern may be interposed between the second surface and the fourth electrode.

Abstract: Provided is a phase-change memory device including a phase-change material pattern of which strips are shared by neighboring cells. The phase-change memory device includes a plurality of bottom electrodes arranged in a matrix array. The phase-change material pattern is formed on the bottom electrodes, and the strips of the phase-change material pattern are electrically connected to the bottom electrodes. Each strip of the phase-change material pattern is connected to at least two diagonally neighboring bottom electrodes of the bottom electrodes.

Abstract: A method for cutting a liquid crystal display panel includes forming a first scribe line along attached first and second mother substrates to form a first region having a plurality of first-sized LCD panels and a first edge of the first region and to form a second region having a plurality of second-sized LCD panels and a first edge of the second region, separating the plurality of first-sized LCD panels formed at the first region into individual first-sized LCD panels, and separating the plurality of second-sized LCD panels formed at the second region into individual second-sized LCD panels.

Abstract: Provided are a phase change memory device and a method of forming the same. According to the phase change memory, a first plug electrode and a second plug electrode are spaced apart from each other in a mold insulating layer. A phase change pattern is disposed on the mold insulating layer. The phase change pattern contacts a top of the first plug electrode and a first potion of a top of the second plug electrode. An interconnection is electrically connected to a second portion of the top of the second plug electrode.

Abstract: An organic electroluminescent display in which a black matrix with a concentration gradient of a transparent material and a metallic material is formed on the same surface as a pixel electrode. The black matrix and a pixel electrode of the organic electroluminescent display are formed using only one masking operation. The black matrix has a concentration gradient of a continuous gradient structure in which constituents of the transparent material are continuously decreased while constituents of the metallic material are continuously increased as a thickness of the black matrix is increased, a step gradient structure in which the constituents of the transparent material are gradually decreased while the constituents of the metallic material are gradually increased as the thickness of the black matrix is increased, or a multi-gradient structure in which the continuous gradient structure and/or the step gradient structure are repeated.

Abstract: A flat panel display with a black matrix and a fabrication method of the same. The flat panel display has an insulating substrate at the upper part of which a pixel electrode is equipped; an opaque conductive film formed on the front surface of the insulating substrate except at the pixel electrode; an insulating film equipped with a contact hole exposing a portion of the opaque conductive film; and a thin film transistor equipped with a gate electrode, and conductive patterns for source/drain electrodes connected to the opaque conductive film through the contact hole.

Abstract: In a semiconductor memory device and a method of manufacturing the same, an insulating layer is formed on a substrate having a logic region on which a first pad is provided and a cell region on which a second pad and a lower electrode are subsequently provided. The insulating layer is etched to be a first insulating layer pattern having a first opening exposing the first pad. A first plug is formed in the first opening. The first insulating layer pattern where the first plug is formed is etched to be a second insulating layer pattern having a second opening exposing the lower electrode. A second plug including a phase-changeable material is formed in the second opening. A conductive wire and an upper electrode are formed on the first plug and the second plug, respectively.

Abstract: The present invention relates to an apparatus for manufacturing compacted irons and an apparatus for manufacturing molten irons using the same. The apparatus for manufacturing compacted irons according to the present invention includes a charging hopper into which reduced materials containing fine reduced irons are charged, screw feeders installed inside the charging hopper to make an acute angle with a vertical direction and discharging the reduced materials containing fine reduced irons which enter into the charging hopper, and a couple of rolls separated from each other to form a gap between the rolls. The couple of rolls compact the reduced materials containing fine reduced irons discharged from the charging hopper by the screw feeders and manufacture compacted irons. Each screw feeders is arranged side by side along an axis direction of the couple of rolls and an extension of the center axis of each screw feeder passes through the gap.

Abstract: A flat panel display has an insulating substrate at the upper part of which a pixel electrode is equipped; an opaque conductive film formed on the front surface of the insulating substrate except at the pixel electrode; an insulating film equipped with a contact hole exposing a portion of the opaque conductive film; and a thin film transistor equipped with a gate electrode, and conductive patterns for source/drain electrodes connected to the opaque conductive film through the contact hole.

Abstract: A flat panel display device which is capable of preventing in-line shorts by forming as a face plate a common power line impressing an equal power supply to all pixels. The flat panel display includes a power supply layer formed on an insulation substrate and connected with source/drain electrodes through contact holes; and an insulating layer formed with a contact hole to insulate the power supply layer and a thin film transistor, wherein the thin film transistor is formed over the insulating layer and includes the source/drain electrodes.

Abstract: A method for cleaning a socket used to test semiconductor packages using laser beam is provided. The method may include irradiating laser beam onto a socket have a plurality of contact pins to remove contaminated materials on the contact pins.

Abstract: A flat panel display device which is capable of preventing in-line shorts by forming as a face plate a common power line impressing an equal power supply to all pixels. The flat panel display includes a power supply layer formed on an insulation substrate and connected with source/drain electrodes through contact holes; and an insulating layer formed with a contact hole to insulate the power supply layer and a thin film transistor, wherein the thin film transistor is formed over the insulating layer and includes the source/drain electrodes.

Abstract: A method of fabricating a flat panel display comprises forming a first electrode, forming at least one organic electroluminescent layer on the first electrode, forming an second electrode, wherein the first electrode comprises a first component of a transparent material and a second component of a metallic material, and the forming of the first electrode comprises depositing the first and second components so as to have a gradual concentration gradient in which the first component is decreased while the second component is increased at a part in contact with the exposed electrode, according to a thickness of the first electrode. The first electrode functions as a pixel electrode and a black matrix of the flat panel display.

Abstract: Disclosed herein is a method of manufacturing a semiconductor device, and more specifically, to a method of manufacturing a semiconductor device having a capacitor and a resistor in which a thin film resistor and a capacitor are formed at the same time, a thin film resistor is formed on a metal wiring, and the two thin film resistors are then serially connected. Accordingly, resistance per unit area in substrate can be increased, a device characteristic can be improved and a process unit price can be lowered.