Patents by Inventor Chandra Mohan

Chandra Mohan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940885
    Abstract: A request to restore an instance of an object that is stored in a storage associated with a cluster of nodes to a target destination is received. Data of the object is divided into a plurality of data portions. Corresponding data portions of the plurality of data portions are assigned to each node of a plurality of nodes of the cluster. It is determined that a first node of the cluster of nodes does not currently store in a storage associated with the first node at least a part of a corresponding data portion of the object assigned to the first node. At least the part of the corresponding data portion of the object assigned to the first node is received at the first node from a second node of the cluster of nodes. At least the part of the corresponding data portion of the object received from the second node is provided from the first node to the target destination.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: March 26, 2024
    Assignee: Cohesity, Inc.
    Inventors: Prashant Gothi, Dominic Tu Ping Cheah, Sai Madan Mohan Reddy Patlolla, Abhijit Chakankar, Suman Chandra Tokuri, Prajakta Ayachit
  • Patent number: 11894282
    Abstract: Disclosed herein are vented lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A vent may extend between the interior surface and the exterior surface of the lid, and the vent may at least partially overlap the die.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: February 6, 2024
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Sergio Antonio Chan Arguedas, Peng Li, Chandra Mohan Jha, Aravindha R. Antoniswamy, Cheng Xu, Junnan Zhao, Ying Wang
  • Publication number: 20240035949
    Abstract: Devices, systems, and methods for filter life prediction for an aspirating smoke detector are described herein. In some examples, one or more embodiments include a computing device comprising a memory and a processor to execute instructions stored in the memory to log operational data of the aspirating smoke detector for a first time period to generate an initial data set, fit a machine learning model to the initial data set, and determine, based on the machine learning model, a remaining useful life of the filter.
    Type: Application
    Filed: August 1, 2022
    Publication date: February 1, 2024
    Inventors: Navneet Kumar, Aakash Dharmarajan, Aman Rai, Deepika Sandeep, Ananda Vel Murugan Chandra Mohan, Hisao M. Chang
  • Patent number: 11854932
    Abstract: Embodiments disclosed herein include electronic packages and thermal solutions for such electronic packages. In an embodiment, an electronic package comprises, a package substrate with a first surface, a second surface opposite from the first surface, and a sidewall surface connecting the first surface to the second surface. In an embodiment, the electronic package further comprises a heat spreader, where a first portion of the heat spreader is attached to the first surface of the package substrate and a second portion of the heat spreader is attached to the second surface of the package substrate. In an embodiment, a third portion of the heat spreader adjacent to the sidewall surface of the package substrate connects the first portion of the heat spreader to the second portion of the heat spreader.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: December 26, 2023
    Assignee: Intel Corporation
    Inventors: Feras Eid, Chandra Mohan Jha, Je-Young Chang
  • Publication number: 20230400466
    Abstract: Non-invasive methods of risk stratification and treatment of bladder cancer in a subject are based on evaluating D-dimer in a urine sample of the subject, and assay systems thereof for evaluation of D-dimer in the urine sample.
    Type: Application
    Filed: May 25, 2023
    Publication date: December 14, 2023
    Inventors: Chandra Mohan, Kamala Vanarsa
  • Patent number: 11837519
    Abstract: Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises an interposer, a first die attached to the interposer, and a second die attached to the interposer. In an embodiment, the electronic package further comprises a heatsink thermally coupled to the first die and the second die. In an embodiment, the heatsink has a first surface facing away from the first die and the second die and a second surface facing the first die and the second die. In an embodiment, the heatsink comprises a thermal break between the first die and the second die.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: December 5, 2023
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Chia-Pin Chiu, Chandra Mohan Jha
  • Patent number: 11837867
    Abstract: The present invention provides a high voltage direct current (HVDC) transmission system (300, 600) comprising: a first station (102) comprising series-connected first and second HVDC converters (110, 130); a second station (104) comprising series-connected third and fourth HVDC converters (150, 170), wherein a neutral node (164) coupling the third HVDC converter (150) to the fourth HVDC converter (170) is coupled to earth; a first transmission line (200) connecting a positive node (114) of the first HVDC converter (110) to a corresponding positive node (154) of the third HVDC converter (150), wherein a first pole (240) of the system (300, 600) comprises the first HVDC converter (110), the third HVDC converter (150) and the first transmission line (200); a second transmission line (210) connecting a negative node (138) of the second HVDC converter (130) to a corresponding negative node (178) of the fourth HVDC converter (170), wherein a second pole (250) of the system (300, 600) comprises the second HVDC conve
    Type: Grant
    Filed: April 11, 2019
    Date of Patent: December 5, 2023
    Assignee: General Electric Technology GmbH
    Inventors: Chandra Mohan Sonnathi, Radnya Anant Mukhedkar, Jordann Raymond Martial Brionne, Damien Pierre Gilbert Fonteyne
  • Publication number: 20230385469
    Abstract: The present solution, approach or method, including an end-to-end automated data pipeline for data ingestion, storage, analysis, deployment, and a machine learning model maintenance. The present solution, approach or method, which computes a baseline using machine learning methods, may help in the following ways. Accurate real time estimation may help evaluate the deviation in the actual energy consumption, effectively identifying underlying root causes for an increase in actual consumption, as compared to the estimated energy. Triangulating the time of day and place of high energy consumption results in quicker resolution. Accurately quantifying energy savings may be helpful. Forecasting energy consumption in the future, may enable planning for future energy needs. Energy saving calculations may be done by comparing actual consumption versus baseline predicted consumption based for a specific baseline period.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Ananda Vel Murugan Chandra Mohan, Banuprakash Balakrishna, Chhavi Chawla, Deepika Sandeep, Rohil Pal, Surjayan Ghosh, Swaroop Reddy Konala
  • Publication number: 20230343738
    Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A plurality of solder thermal interface material (STIM) thermal interconnects may be coupled with the die and an integrated heat spreader (IHS) may be coupled with the plurality of STIM thermal interconnects. A thermal underfill material may be positioned between the IHS and the die such that the thermal underfill material at least partially surrounds the plurality of STIM thermal interconnects. Other embodiments may be described or claimed.
    Type: Application
    Filed: July 3, 2023
    Publication date: October 26, 2023
    Applicant: Intel Corporation
    Inventors: Debendra Mallik, Sergio Antonio Chan Arguedas, Jimin Yao, Chandra Mohan Jha
  • Patent number: 11780609
    Abstract: Methods and systems are provided for predictive maintenance of a vehicle component. One method involves mapping a current instance of a component of a vehicle to one of plurality of degradation groups of prior lifecycles for other instances of the component based on a relationship between performance measurement data for the current instance and historical performance measurement data associated with that respective degradation group, obtaining contextual data associated with operation of the vehicle, and determining a maintenance recommendation for the current instance of the component based on the contextual data using a predictive maintenance model associated with the mapped degradation group.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: October 10, 2023
    Assignee: HONEYWELL INTERNATIONAL INC.
    Inventors: Megan L. Hawley, Timothy Griffith, Cavene Robinson, Ananda Vel Murugan Chandra Mohan, Dinkar Mylaraswamy
  • Patent number: 11777401
    Abstract: A converter including a first terminal and a second terminal, the first terminal configured for connection to a first network, the second terminal configured for connection to a second network; at least one switching module arranged to interconnect the first terminal and the second terminal, the switching module including at least one module switching element and at least one energy storage device, the module switching element and the energy storage device arranged to be combinable to selectively provide a voltage source, the switching module switchable to control a transfer of power between the first and second networks; the switching module including a discharge circuit, the discharge circuit including a discharge switching element and a discharge resistor, the discharge switching element switchable to switch the corresponding discharge resistor into and out of the corresponding switching module; and a controller configured to selectively control the switching of the discharge switching element.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: October 3, 2023
    Assignee: General Electric Technology GmbH
    Inventors: Chandra Mohan Sonnathi, Radnya Anant Mukhedkar, Rajaseker Reddy Ginnareddy
  • Publication number: 20230308470
    Abstract: In one embodiment, a method includes receiving, by a network component, application performance data. The application performance data is associated with one or more applications. The method also includes determining to transform, by the network component, the application performance data into application security data, generating, by the network component, a baseline for the application security data, and detecting, by the network component, an anomaly in the baseline. The method further includes determining, by the network component, a potential security threat based on the anomaly.
    Type: Application
    Filed: March 25, 2022
    Publication date: September 28, 2023
    Inventors: Ashutosh Kulshreshtha, Walter T. Hulick, JR., Chandra Mohan Babu Nadiminti
  • Patent number: 11770005
    Abstract: This application relates to methods and apparatus for handling a fault associated with a voltage source converter (VSC) for exchanging electrical power between an AC system (101, 102) and a DC system (106-1, 106-2). The VSC (104) is connected to the AC system via an interface apparatus, comprising a transformer (107) with a set of primary windings (202) for coupling to a plurality of AC phases (A, B, C) of the AC system. In embodiments of the disclosure the set of primary windings having a neutral point (N) and the interface apparatus includes a fault module (301) having an energy storage element (302) connected in parallel with a resistive element (303) between the neutral point of the set of primary windings and a reference voltage, such as ground.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: September 26, 2023
    Assignee: General Electric Technology GmbH
    Inventors: Radnya Anant Mukhedkar, Chandra Mohan Sonnathi
  • Publication number: 20230288410
    Abstract: Provided herein are vertical flow assay devices for detecting presence or an amount of cytokines in a sample. Also provided herein are immunoassay methods for detecting presence or an amount of cytokines in a sample, using the vertical flow assay devices.
    Type: Application
    Filed: March 14, 2023
    Publication date: September 14, 2023
    Inventors: Chandra Mohan, Rongwei Lei
  • Patent number: 11756860
    Abstract: Embodiments disclosed herein include semiconductor dies and methods of forming such dies. In an embodiment, the semiconductor die comprises a semiconductor substrate, an active device layer in the semiconductor substrate, where the active device layer comprises one or more transistors, an interconnect layer over a first surface of the active device layer, a first bonding layer over a surface of the semiconductor substrate, a second bonding layer secured to the first bonding layer, and a heat spreader attached to the second bonding layer.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventors: Shrenik Kothari, Chandra Mohan Jha, Weihua Tang, Robert Sankman, Xavier Brun, Pooya Tadayon
  • Patent number: 11756856
    Abstract: Embodiments include a microelectronic device package structure having a first die on the substrate. One or more additional dice are on the first die, and a thermal electric cooler (TEC) is on the first die adjacent at least one of the one or more additional dice. A dummy die is on the TEC, wherein the dummy die is thermally coupled to the first die.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: September 12, 2023
    Assignee: Intel Corporation
    Inventors: Krishna Vasanth Valavala, Ravindranath Mahajan, Chandra Mohan Jha, Kelly Lofgreen, Weihua Tang
  • Patent number: 11735552
    Abstract: Embodiments may relate to a microelectronic package that includes a die coupled with a package substrate. A plurality of solder thermal interface material (STIM) thermal interconnects may be coupled with the die and an integrated heat spreader (IHS) may be coupled with the plurality of STIM thermal interconnects. A thermal underfill material may be positioned between the IHS and the die such that the thermal underfill material at least partially surrounds the plurality of STIM thermal interconnects. Other embodiments may be described or claimed.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: August 22, 2023
    Assignee: Intel Corporation
    Inventors: Debendra Mallik, Sergio Antonio Chan Arguedas, Jimin Yao, Chandra Mohan Jha
  • Publication number: 20230252162
    Abstract: A computing system for identifying and scoring problems associated with call stacks. The computing system identifies call stacks associated with an application and determines a problem occurs in the application. The computer system compares a call stack of a first set of applications with a call stack of a second set of applications, wherein the call stack of the first set of applications includes the problem and the call stack of the second set of applications does not include the problem. The computer system generates a score indicating a likelihood that a particular call stack caused the problem based on whether the particular call stack is included in the call stack of the first set of applications, the call stack of the second set of applications, or both. The computing system generates a notification comprising the score indicating the likelihood that the particular call stack caused the problem.
    Type: Application
    Filed: June 8, 2022
    Publication date: August 10, 2023
    Inventors: Ashutosh Kulshreshtha, Walter T. Hulick, JR., Chandra Mohan Babu Nadiminti
  • Patent number: 11705417
    Abstract: Embodiments include semiconductor packages and methods to form the semiconductor packages. A semiconductor package includes a plurality of first dies on a substrate, an interface layer over the first dies, a backside metallization (BSM) layer directly on the interface layer, where the BSM layer includes first, second, and third conductive layer, and a heat spreader over the BSM layer. The first conductive layer includes a titanium material. The second conductive layer includes a nickel-vanadium material. The third conductive layer includes a gold material, a silver material, or a copper material. The copper material may include copper bumps. The semiconductor package may include a plurality of second dies on a package substrate. The substrate may be on the package substrate. The second dies may have top surfaces substantially coplanar to top surface of the first dies. The BSM and interface layers may be respectively over the first and second dies.
    Type: Grant
    Filed: October 8, 2019
    Date of Patent: July 18, 2023
    Assignee: Intel Corporation
    Inventors: Chandra Mohan Jha, Prasad Ramanathan, Xavier F. Brun, Jimmin Yao, Mark Allen
  • Patent number: 11694942
    Abstract: An integrated circuit (IC) package comprising an IC die, the IC die having a first surface and an opposing second surface. The IC die comprises a semiconductor material. The first surface comprises an active layer. A thermoelectric cooler (TEC) comprising a thermoelectric material is embedded within the IC die between the first surface and the second surface and adjacent to the active layer. The TEC has an annular shape that is substantially parallel to the first and second surfaces of the IC die. The thermoelectric material is confined between an outer sidewall along an outer perimeter of the TEC and an inner sidewall along an inner perimeter of the TEC. The outer and inner sidewalls are substantially orthogonal to the first and second surfaces of the IC die.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: July 4, 2023
    Assignee: Intel Corporation
    Inventors: Kelly Lofgreen, Chandra Mohan Jha, Krishna Vasanth Valavala