Patents by Inventor Chandra Mohan

Chandra Mohan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200194330
    Abstract: Integrated circuit IC package with one or more IC dies including solder features that are thermally coupled to the IC. The thermally coupled solder features (e.g., bumps) may be electrically insulated from solder features electrically coupled to the IC, but interconnected with each other by one or more metallization layers within a plane of the IC package. An in-plane interconnected network of thermal solder features may improve lateral heat transfer, for example spreading heat from one or more hotspots on the IC die. An under-bump metallization (UBM) may interconnect two or more thermal solder features. A through-substrate via (TSV) metallization may interconnect two or more thermal solder features. A stack of IC dies may include thermal solder features interconnected by metallization within one or more planes of the stack.
    Type: Application
    Filed: December 13, 2018
    Publication date: June 18, 2020
    Applicant: Intel Corporation
    Inventors: Prasad Ramanathan, Nicholas Neal, Chandra Mohan Jha
  • Publication number: 20200185300
    Abstract: An integrated circuit (IC) package comprises a substrate comprising a dielectric and a thermal conduit that is embedded within the dielectric. The thermal conduit has a length that extends laterally within the dielectric from a first end to a second end. An IC die is thermally coupled to the first end of the thermal conduit. The IC die comprises an interconnect that is coupled to the first end of the thermal conduit. An integrated heat spreader comprises a lid over the IC die and at least one sidewall extending from the edge of the lid to the substrate that is thermally coupled to the second end of the thermal conduit.
    Type: Application
    Filed: December 10, 2018
    Publication date: June 11, 2020
    Applicant: INTEL CORPORATION
    Inventors: Cheng Xu, Zhimin Wan, Lingtao Liu, Yikang Deng, Junnan Zhao, Chandra Mohan Jha, Kyu-oh Lee
  • Patent number: 10659395
    Abstract: A network where FC and Ethernet storage traffic share the underlying network. The network extends FC SAN storage specific attributes to Ethernet storage devices. The network is preferably formed of FC switches, so each edge switch acts as an FCoE FCF, with internal communications done using FC. IP packets are encapsulated in FC packets for transport. Preferably, either each outward facing switch port can be configured as an Ethernet or FC port, so devices can be connected as desired. FCoE devices connected to the network are in particular virtual LANs (VLANs). The name server database is extended to include VLAN information for the device and the zoning database has automatic FCOE_VLAN zones added to provide a mechanism for enhanced soft and hard zoning. Zoning is performed with the conventional zoning restrictions enhanced by including the factor that any FCoE devices must be in the same VLAN.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: May 19, 2020
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Kiran Sangappa Shirol, Chandra Mohan Konchada
  • Publication number: 20200126888
    Abstract: An integrated circuit (IC) package comprising an IC die, the IC die having a first surface and an opposing second surface. The IC die comprises a semiconductor material. The first surface comprises an active layer. A thermoelectric cooler (TEC) comprising a thermoelectric material is embedded within the IC die between the first surface and the second surface and adjacent to the active layer. The TEC has an annular shape that is substantially parallel to the first and second surfaces of the IC die. The thermoelectric material is confined between an outer sidewall along an outer perimeter of the TEC and an inner sidewall along an inner perimeter of the TEC. The outer and inner sidewalls are substantially orthogonal to the first and second surfaces of the IC die.
    Type: Application
    Filed: October 23, 2018
    Publication date: April 23, 2020
    Applicant: Intel Corporation
    Inventors: Kelly Lofgreen, Chandra Mohan Jha, Krishna Vasanth Valavala
  • Publication number: 20200118990
    Abstract: A semiconductor device package structure is provided. The semiconductor device package structure includes a substrate having a cavity, and phase change material within the cavity. In an example, the phase change material has a phase change temperature lower than 120 degree centigrade. A die may be coupled to the substrate. In an example, the semiconductor device package structure includes one or more interconnect structures that are to couple the die to the phase change material within the cavity.
    Type: Application
    Filed: October 11, 2018
    Publication date: April 16, 2020
    Applicant: Intel Corporation
    Inventors: Cheng Xu, Zhimin Wan, Yikang Deng, Junnan Zhao, Chong Zhang, Chandra Mohan M. Jha, Ying Wang, Kyu-oh Lee
  • Publication number: 20200118071
    Abstract: Examples provide machine language (“ML”)-powered on-time delivery prediction generation for virtual orders obtained from an order management component (“OMC”). Predictions based on order factors deterministic to on-time delivery are output to the OMC. Predictions become increasingly accurate over time based on the accuracy of past delivery predictions and give the probabilistic chance of on-time delivery (the “order-score”) in real-time before an order for goods and/or services is dispatched. The OMC uses the order-score to react preemptively to mitigate delay factors on orders likely to arrive late, increasing the probability of on-time delivery. Customers are given confidence predicted arrival times are accurate enough for scheduling purposes. Providers more easily maintain and grow good reputations and revenue.
    Type: Application
    Filed: November 26, 2018
    Publication date: April 16, 2020
    Inventors: Srinivasan Venkatesan, Sandeep Nayak, Subhash Kumar Dhaka, Shantanu Rai, Balasubrahmanyam Chaturvedula, Chandra Mohan Meena
  • Publication number: 20200111720
    Abstract: An Integrated Circuit (IC) device structure is provided. The IC device structure includes a first substrate, first one or more dies coupled to a first side of the first substrate by a first plurality of interconnect structures, second one or more dies coupled to a first section of a second side of the substrate by a second plurality of interconnect structures, and a third plurality of interconnect structures to couple a second section of the second side of the substrate to a second substrate. In an example, at least a part of the second one or more dies are within a cavity in the second substrate.
    Type: Application
    Filed: October 5, 2018
    Publication date: April 9, 2020
    Inventors: Zhimin Wan, Shankar Devasenathipathy, Chia-Pin Chiu, Chandra Mohan Jha, Weihua Tang
  • Publication number: 20200105643
    Abstract: An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).
    Type: Application
    Filed: September 27, 2018
    Publication date: April 2, 2020
    Applicant: INTEL CORPORATION
    Inventors: ZHIMIN WAN, CHIA-PIN CHIU, CHANDRA MOHAN JHA, WEIHUA TANG, SHANKAR DEVASENATHIPATHY
  • Publication number: 20200105639
    Abstract: Embodiments include a microelectronic device package structure having a first die on the substrate. One or more additional dice are on the first die, and a thermal electric cooler (TEC) is on the first die adjacent at least one of the one or more additional dice. A dummy die is on the TEC, wherein the dummy die is thermally coupled to the first die.
    Type: Application
    Filed: October 2, 2018
    Publication date: April 2, 2020
    Applicant: Intel Corporation
    Inventors: Krishna Vasanth Valavala, Ravindranath Mahajan, Chandra Mohan Jha, Kelly Lofgreen, Weihua Tang
  • Publication number: 20200098666
    Abstract: Heat dissipation techniques include using metal features having one or more slanted or otherwise laterally-extending aspects. The metal features include, for example, tilted metal pillars, or metal bodies or fillets having an angled or sloping sidewall, or other metal features that extend both vertically and laterally. Such metal features increase the effective heat transfer area significantly by spreading heat in the in-plane (lateral) direction, in addition to the vertical direction. In some embodiments, slanted trenches are formed in photoresist/mold material deposited over a lower die, using photolithography and a multi-angle lens, or by laser drilling mold material deposited over the lower die. The trenches are then filled with metal. In other embodiments, metal features are printed on the lower die, and then molding material is deposited over the printed features. In any such cases, heat is conducted from a lower die to an upper die and/or an integrated heat spreader.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Applicant: INTEL CORPORATION
    Inventors: ZHIMIN WAN, CHIA-PIN CHIU, POOYA TADAYON, JOE F. WALCZYK, CHANDRA MOHAN JHA, WEIHUA TANG, SHRENIK KOTHARI, SHANKAR DEVASENATHIPATHY
  • Publication number: 20200098664
    Abstract: Embodiments herein relate to systems, apparatuses, processing, and techniques related to a first heat-conducting plate to be thermally coupled to a first heat source, a thermoelectric cooler (TEC) thermally coupled to the first plate, a second heat-conducting plate thermally coupled to the TEC and to be thermally coupled to a second heat source where the TEC is to at least partially thermally isolate the first plate from the second plate to reduce heat transfer from the first plate to the second plate.
    Type: Application
    Filed: September 26, 2018
    Publication date: March 26, 2020
    Inventors: Krishna Vasanth VALAVALA, Kelly LOFGREEN, Chandra-Mohan JHA
  • Publication number: 20200051894
    Abstract: Disclosed herein are thermal assemblies for multi-chip packages (MCPs), as well as related methods and devices. For example, in some embodiments, a thermal assembly for an MCP may include a heat pipe having a ring shape.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 13, 2020
    Applicant: Intel Corporation
    Inventors: Zhimin Wan, Je-Young Chang, Chia-Pin Chiu, Shankar Devasenathipathy, Betsegaw Kebede Gebrehiwot, Chandra Mohan Jha
  • Publication number: 20200004837
    Abstract: A system, method and the like for front-end comprehensive validation of data files that require processing by multiple different computing systems having different validation requirements. Validation for all of the multiple different computing systems is performed upon receipt of the data file by the data processing entity and, as such, in the event that validation results in an error/failure, the originator/sender of the data file can be notified of the error failure proximate in time to when the data file is transmitted to the data processing entity and can re-submit a valid data file in due time. In addition, the present invention is configured to insure that the validation meets the current requirements of all the computing systems that process the data file by employing a centralized data file validation requirements database that stores validation requirements for each of the computing systems.
    Type: Application
    Filed: July 2, 2018
    Publication date: January 2, 2020
    Inventor: Mahesh Chandra Mohan
  • Publication number: 20190312824
    Abstract: A network where FC and Ethernet storage traffic share the underlying network. The network extends FC SAN storage specific attributes to Ethernet storage devices. The network is preferably formed of FC switches, so each edge switch acts as an FCoE FCF, with internal communications done using FC. IP packets are encapsulated in FC packets for transport. Preferably, either each outward facing switch port can be configured as an Ethernet or EC port, so devices can be connected as desired. FCoE devices connected to the network are in particular virtual LANs (VLANs). The name server database is extended to include VLAN information for the device and the zoning database has automatic FCOE_VLAN zones added to provide a mechanism for enhanced soft and hard zoning. Zoning is performed with the conventional zoning restrictions enhanced by including the factor that any FCoE devices must be in the same ULAN.
    Type: Application
    Filed: June 24, 2019
    Publication date: October 10, 2019
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Jesse Willeke, Kiran Sangappa Shirol, Chandra Mohan Konchada
  • Publication number: 20190281031
    Abstract: Disclosed are a system, method and devices for simultaneous MACsec key agreement (MKA) negotiation between the devices. The present application controls a basic TLV message exchange between supplicant and authenticator in case of race condition to establish the secure association key (SAK) channel. The present application by controlling a basic TLV message exchange enables to establish a secure channel in race condition and achieves a high reliability of the product as this makes product launch MACsec services quickly and available for the service. Accordingly, when both sides (two supplicants) exchange hello with basic TLV at the same time, triggering the race condition, drops first message from the authenticator at supplicant and update the peer MN and the supplicant will not send reply. The authenticator when send next message (basic+potential peer TLV) with peer MN incremented by 1, the supplicant will respond with incremental message with live peer TLV.
    Type: Application
    Filed: May 23, 2019
    Publication date: September 12, 2019
    Inventors: Dharmanandana Reddy Pothula, Chandra Mohan Padamati, Antony Paul, Yun Qin, De Sheng
  • Patent number: 10403242
    Abstract: Disclosed herein is a display controller and display controller techniques to self-refresh a non-self-refresh display. The display controller can be configured to determine when display data is static. During periods where display data is static, the display controller can cache display data output in device memory and “refresh” the display data using the cached display data output. A display controller can receive a number of display data elements to be overlaid. The display controller can blend the display data elements into blended display data and can send the blended display data to a display. The display controller can determine whether the display data elements are static. The display controller can cache the blended display data based on determining that the display data elements are static and can send the cached blended display data to the display every refresh while the display data elements are no longer static.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: September 3, 2019
    Assignee: INTEL CORPORATION
    Inventor: Chandra Mohan Konduru
  • Publication number: 20190268441
    Abstract: A network where FC and Ethernet storage traffic share the underlying network. The network extends FC SAN storage specific attributes to Ethernet storage devices. The network is preferably formed of FC switches, so each edge switch acts as an FCoE FCF, with internal communications done using FC. IP packets are encapsulated in FC packets for transport. Preferably, either each outward facing switch port can be configured as an Ethernet or FC port, so devices can be connected as desired. FCoE devices connected to the network are in particular virtual LANs (VLANs). The name server database is extended to include VLAN information for the device and the zoning database has automatic FCOE_VLAN zones added to provide a mechanism for enhanced soft and hard zoning. Zoning is performed with the conventional zoning restrictions enhanced by including the factor that any FCoE devices must be in the same VLAN.
    Type: Application
    Filed: May 9, 2019
    Publication date: August 29, 2019
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Kiran Sangappa Shirol, Chandra Mohan Konchada
  • Patent number: 10374980
    Abstract: A network where FC and Ethernet storage traffic share the underlying network. The network extends FC SAN storage specific attributes to Ethernet storage devices. The network is preferably formed of FC switches, so each edge switch acts as an FCoE FCF, with internal communications done using FC. IP packets are encapsulated in FC packets for transport. Preferably, either each outward facing switch port can be configured as an Ethernet or FC port, so devices can be connected as desired. FCoE devices connected to the network are in particular virtual LANs (VLANs). The name server database is extended to include VLAN information for the device and the zoning database has automatic FCOE_VLAN zones added to provide a mechanism for enhanced soft and hard zoning. Zoning is performed with the conventional zoning restrictions enhanced by including the factor that any FCoE devices must be in the same VLAN.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: August 6, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Jesse Willeke, Kiran Sangappa Shirol, Chandra Mohan Konchada
  • Patent number: 10348859
    Abstract: A network where FC and Ethernet storage traffic share the underlying network. The network extends FC SAN storage specific attributes to Ethernet storage devices. The network is preferably formed of FC switches, so each edge switch acts as an FCoE FCF, with internal communications done using FC. IP packets are encapsulated in FC packets for transport. Preferably, either each outward facing switch port can be configured as an Ethernet or FC port, so devices can be connected as desired. FCoE devices connected to the network are in particular virtual LANs (VLANs). The name server database is extended to include VLAN information for the device and the zoning database has automatic FCOE_VLAN zones added to provide a mechanism for enhanced soft and hard zoning. Zoning is performed with the conventional zoning restrictions enhanced by including the factor that any FCoE devices must be in the same VLAN.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: July 9, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Kiran Sangappa Shirol, Chandra Mohan Konchada
  • Patent number: 10333866
    Abstract: A network where FC and Ethernet storage traffic share the underlying network. The network extends FC SAN storage specific attributes to Ethernet storage devices. The network is preferably formed of FC switches, so each edge switch acts as an FCoE FCF, with internal communications done using FC. IP packets are encapsulated in FC packets for transport. Preferably, either each outward facing switch port can be configured as an Ethernet or FC port, so devices can be connected as desired. FCoE devices connected to the network are in particular virtual LANs (VLANs). The name server database is extended to include VLAN information for the device and the zoning database has automatic FCOE_VLAN zones added to provide a mechanism for enhanced soft and hard zoning. Zoning is performed with the conventional zoning restrictions enhanced by including the factor that any FCoE devices must be in the same VLAN.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: June 25, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Chandra Mohan Konchada, Kiran Sangappa Shirol, Jesse Willeke