Patents by Inventor Chandra Mohan

Chandra Mohan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11552906
    Abstract: A network where FC and Ethernet storage traffic share the underlying network. The network extends FC SAN storage specific attributes to Ethernet storage devices. The network is preferably formed of FC switches, so each edge switch acts as an FCoE FCF, with internal communications done using FC. IP packets are encapsulated in FC packets for transport. Preferably, either each outward facing switch port can be configured as an Ethernet or FC port, so devices can be connected as desired. FCoE devices connected to the network are in particular virtual LANs (VLANs). The name server database is extended to include VLAN information for the device and the zoning database has automatic FCOE_VLAN zones added to provide a mechanism for enhanced soft and hard zoning. Zoning is performed with the conventional zoning restrictions enhanced by including the factor that any FCoE devices must be in the same VLAN.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: January 10, 2023
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Jesse Willeke, Kiran Sangappa Shirol, Chandra Mohan Konchada
  • Patent number: 11521914
    Abstract: Microelectronic assemblies that include a cooling channel, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a surface, a die having a surface, and a fluidic channel between the surface of the die and the surface of the package substrate, wherein a top surface of the fluidic channel is defined by the surface of the die and a bottom surface of the fluidic channel is defined by the surface of the package substrate. In some embodiments, a microelectronic assembly may include a package substrate having a surface; a die having a surface; and an interposer having a fluidic channel between the surface of the die and the surface of the package substrate.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: December 6, 2022
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Cheng Xu, Yikang Deng, Junnan Zhao, Ying Wang, Chong Zhang, Kyu Oh Lee, Chandra Mohan Jha, Chia-Pin Chiu
  • Publication number: 20220384306
    Abstract: A thermal interface structure for facilitating heat transfer from an integrated circuit device to a heat dissipation device may be fabricated to include at least one conductive wire structure wherein each conductive wire structure includes a conductive wire having a first end, a first barrier layer adjacent the first end of the conductive wire, and a first solder structure adjacent the first barrier layer. The thermal interface structure may further include an encapsulation material substantially encapsulating each conductive wire structure and a first solder layer abutting the encapsulation material and abutting the first solder structure of each conductive wire structure.
    Type: Application
    Filed: May 26, 2021
    Publication date: December 1, 2022
    Applicant: Intel Corporation
    Inventors: Weihua Tang, Chandra Mohan Jha, Nicholas S. Haehn
  • Patent number: 11502017
    Abstract: An integrated circuit (IC) package comprises a substrate comprising a dielectric and a thermal conduit that is embedded within the dielectric. The thermal conduit has a length that extends laterally within the dielectric from a first end to a second end. An IC die is thermally coupled to the first end of the thermal conduit. The IC die comprises an interconnect that is coupled to the first end of the thermal conduit. An integrated heat spreader comprises a lid over the IC die and at least one sidewall extending from the edge of the lid to the substrate that is thermally coupled to the second end of the thermal conduit.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: November 15, 2022
    Assignee: Intel Corporation
    Inventors: Cheng Xu, Zhimin Wan, Lingtao Liu, Yikang Deng, Junnan Zhao, Chandra Mohan Jha, Kyu-oh Lee
  • Patent number: 11462457
    Abstract: Embodiments herein relate to systems, apparatuses, processing, and techniques related to a first heat-conducting plate to be thermally coupled to a first heat source, a thermoelectric cooler (TEC) thermally coupled to the first plate, a second heat-conducting plate thermally coupled to the TEC and to be thermally coupled to a second heat source where the TEC is to at least partially thermally isolate the first plate from the second plate to reduce heat transfer from the first plate to the second plate.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: October 4, 2022
    Assignee: Intel Corporation
    Inventors: Krishna Vasanth Valavala, Kelly Lofgreen, Chandra-Mohan Jha
  • Patent number: 11456232
    Abstract: Disclosed herein are thermal assemblies for multi-chip packages (MCPs), as well as related methods and devices. For example, in some embodiments, a thermal assembly for an MCP may include a heat pipe having a ring shape.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: September 27, 2022
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Je-Young Chang, Chia-Pin Chiu, Shankar Devasenathipathy, Betsegaw Kebede Gebrehiwot, Chandra Mohan Jha
  • Patent number: 11444003
    Abstract: An integrated heat spreader includes channel structures assembled in a frame. Each channel structure is independent of the other, and can be used to dissipate heat from integrated circuitry at a specific location within a package, and without allowing heat from that particular location to propagate to integrated circuitry at other locations within the package. Each channel structure can be implemented with metal having a high thermal conductivity (e.g., copper). The channel structures can be used in conjunction with liquid-based cooling or air-based cooling. The frame can be implemented with low thermal conductivity molding compound or plastic so the heat transfer from one channel structure to another is inhibited. The channel structures can have different configurations (e.g., straight, pillars, and/or pin fins) to provide different rates of flow, mixing, and/or cooling. The flow direction of air or liquid for the channel structures can be the same (parallel) or different (counter).
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Chia-Pin Chiu, Chandra Mohan Jha, Weihua Tang, Shankar Devasenathipathy
  • Patent number: 11427083
    Abstract: A method and a system of deploying an ignition interlock device (IID). The method comprises receiving a time series of breath alcohol content (BrAC) measurements that are unitarily sourced from a pre-identified user, each BrAC measurement of the time series including an alveolar breath component and an interferent breath component; estimating a dissipation rate of alcohol attributable to the pre-identified user in accordance with the time series of BrAC measurements; determining, responsive to estimating the dissipation rate of alcohol, at least a subset of the BrAC measurements as being based on the alveolar breath component but not the interferent breath component; and performing one of triggering and not triggering the IID into a lockout state based on the at least a subset of the BrAC measurements.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: August 30, 2022
    Assignee: Consumer Safety Technology, LLC
    Inventors: Amanda Renee Mallinger, Jennifer Ringgenberg, Usha Rani Chintala, Douglas Robert Bruce, Sujitha Chandra Mohan
  • Patent number: 11398414
    Abstract: Heat dissipation techniques include using metal features having one or more slanted or otherwise laterally-extending aspects. The metal features include, for example, tilted metal pillars, or metal bodies or fillets having an angled or sloping sidewall, or other metal features that extend both vertically and laterally. Such metal features increase the effective heat transfer area significantly by spreading heat in the in-plane (lateral) direction, in addition to the vertical direction. In some embodiments, slanted trenches are formed in photoresist/mold material deposited over a lower die, using photolithography and a multi-angle lens, or by laser drilling mold material deposited over the lower die. The trenches are then filled with metal. In other embodiments, metal features are printed on the lower die, and then molding material is deposited over the printed features. In any such cases, heat is conducted from a lower die to an upper die and/or an integrated heat spreader.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: July 26, 2022
    Assignee: Intel Corporation
    Inventors: Zhimin Wan, Chia-Pin Chiu, Pooya Tadayon, Joe F. Walczyk, Chandra Mohan Jha, Weihua Tang, Shrenik Kothari, Shankar Devasenathipathy
  • Publication number: 20220222105
    Abstract: System and techniques for container provisioning are described herein. A request to instantiate a container image may be made. This request specifies a name for the container image where the name is created through a first defined generation process applied to contents of the container image. A container manifest may be received from a local copy of a distributed container directory. The container manifest includes a set of entries for container layer images of the container image. Here, the set of entries are named by a second defined generation process applied to respective container layer images. Then, container layer images may be retrieved using names from the set of entries and the container image instantiated using the retrieved container layer images.
    Type: Application
    Filed: April 1, 2022
    Publication date: July 14, 2022
    Inventors: Jeffrey Christopher Sedayao, Juan Pablo Munzo, Vinoth kumar Chandra Mohan, Promila Agarwal, Dean Chu, Eve M. Schooler, Kshitij Arun Doshi
  • Patent number: 11387224
    Abstract: A semiconductor device package structure is provided. The semiconductor device package structure includes a substrate having a cavity, and phase change material within the cavity. In an example, the phase change material has a phase change temperature lower than 120 degree centigrade. A die may be coupled to the substrate. In an example, the semiconductor device package structure includes one or more interconnect structures that are to couple the die to the phase change material within the cavity.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Cheng Xu, Zhimin Wan, Yikang Deng, Junnan Zhao, Chong Zhang, Chandra Mohan M Jha, Ying Wang, Kyu-oh Lee
  • Publication number: 20220147533
    Abstract: Embodiments of a computer-implemented system and methods for automated ranking of computer element/asset importance are disclosed.
    Type: Application
    Filed: November 10, 2021
    Publication date: May 12, 2022
    Inventors: Paulo Shakarian, Jana Shakarian, Chandra Mohan
  • Publication number: 20220143140
    Abstract: The present disclosure provides methods of treating inflammatory or autoimmune diseases (e.g., lupus nephritis) using CD6-ALCAM pathway inhibitors such as EQ001 and to methods and diagnostic tests for identifying subjects likely to respond to such inhibitors. In particular, the present disclosure provides diagnostic and therapeutic uses related to elevated levels of soluble ALCAM and/or CD6 protein and protein fragments in urine and other biological samples that are indicative of sensitivity to inhibitors of the CD6-ALCAM pathway (e.g., EQ001).
    Type: Application
    Filed: February 26, 2020
    Publication date: May 12, 2022
    Inventors: Stephen Connelly, Krishna Polu, Chandra Mohan
  • Publication number: 20220109364
    Abstract: A converter (20) comprises: a first terminal and a second terminal (24,26), the first terminal (24,26) configured for connection to a first network, the second terminal (34) configured for connection to a second network (40); at least one switching module (44) arranged to interconnect the first terminal (24,26) and the second terminal (34), the or each switching module (44) including at least one module switching element (46) and at least one energy storage device (48), the or each module switching element (46) and the or each energy storage device (48) in the or each switching module (44) arranged to be combinable to selectively provide a voltage source, the or each switching module (44) switchable to control a transfer of power between the first and second networks (40); the or each switching module (44) including a discharge circuit, the or each discharge circuit including a discharge switching element (50) and a discharge resistor (52), the or each discharge switching element (50) switchable to switch
    Type: Application
    Filed: March 7, 2019
    Publication date: April 7, 2022
    Inventors: Chandra Mohan Sonnathi, Radnya Anant Mukhedkar, Rajaseker Reddy Ginnareddy
  • Patent number: 11290422
    Abstract: Systems and methods include, responsive to routing a packet to a destination via an external interface of a plurality of external interfaces, receiving the packet; checking if the packet belongs to an existing session for network address and port translation based on a session key; if the packet does not belong to the existing session, assigning the packet an Internet Protocol (IP) address and port based on the routing; if the packet belongs to the existing session, checking if an active path has changed, and, if not, performing the network address and port translation based on the session; and, if the active path has changed, assigning the packet an Internet Protocol (IP) address and port based on another external interface associated with the changed active path.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: March 29, 2022
    Assignee: Ciena Corporation
    Inventors: Vijay Mohan Chandra Mohan, Prasanth Gajarampalli
  • Publication number: 20220024308
    Abstract: A method and a system of deploying an ignition interlock device (IID). The method comprises receiving a time series of breath alcohol content (BrAC) measurements that are unitarily sourced from a pre-identified user, each BrAC measurement of the time series including an alveolar breath component and an interferent breath component; estimating a dissipation rate of alcohol attributable to the pre-identified user in accordance with the time series of BrAC measurements; determining, responsive to estimating the dissipation rate of alcohol, at least a subset of the BrAC measurements as being based on the alveolar breath component but not the interferent breath component; and performing one of triggering and not triggering the IID into a lockout state based on the at least a subset of the BrAC measurements.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 27, 2022
    Inventors: Amanda Renee Mallinger, Jennifer Ringgenberg, Usha Rani Chintala, Douglas Robert Bruce, Sujitha Chandra Mohan
  • Publication number: 20210391244
    Abstract: Embodiments disclosed herein comprise a die and methods of forming a die. In an embodiment, a die comprises, a die substrate, wherein the die substrate has a first thermal conductivity, and a first layer over the die substrate, wherein the first layer has a second thermal conductivity that is greater than the first thermal conductivity. In an embodiment, the die further comprises a second layer over the first layer, wherein the second layer comprises transistors.
    Type: Application
    Filed: June 10, 2020
    Publication date: December 16, 2021
    Inventors: Chandra Mohan JHA, Pooya TADAYON, Aastha UPPAL, Weihua TANG, Paul DIGLIO, Xavier BRUN
  • Publication number: 20210359617
    Abstract: There is provided an electrical assembly (20) for interconnecting first and second networks (40).
    Type: Application
    Filed: March 20, 2019
    Publication date: November 18, 2021
    Inventors: Chandra Mohan Sonnathi, Radnya Anant Mukhedkar, Rajaseker Reddy Ginnareddy, Amit Kumar, Damien Pierre Gilbert Fonteyne
  • Publication number: 20210280497
    Abstract: A modular technique for die-level liquid cooling is described. In an example, an integrated circuit assembly includes a first silicon die comprising a device side and a backside opposite the device side. The integrated circuit assembly also includes a second silicon die comprising a plurality of fluidly accessible channels therein. A dielectric interface directly couples the second silicon die to a backside of the first silicon die.
    Type: Application
    Filed: March 5, 2020
    Publication date: September 9, 2021
    Inventors: Xavier F. BRUN, Chandra Mohan JHA
  • Patent number: 11106627
    Abstract: A system, method and the like for front-end comprehensive validation of data files that require processing by multiple different computing systems having different validation requirements. Validation for all of the multiple different computing systems is performed upon receipt of the data file by the data processing entity and, as such, in the event that validation results in an error/failure, the originator/sender of the data file can be notified of the error failure proximate in time to when the data file is transmitted to the data processing entity and can re-submit a valid data file in due time. In addition, the present invention is configured to insure that the validation meets the current requirements of all the computing systems that process the data file by employing a centralized data file validation requirements database that stores validation requirements for each of the computing systems.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: August 31, 2021
    Assignee: BANK OF AMERICA CORPORATION
    Inventor: Mahesh Chandra Mohan