Patents by Inventor Chang Hsieh

Chang Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9996011
    Abstract: A method provides an integrated circuit (IC) substrate having first and second alignment marks defined in a first pattern layer, and third and fourth alignment marks defined in a second pattern layer. The first and second alignment marks are illuminated, through a photomask, with a first light to determine a first layer alignment error including a first alignment error and a second alignment error. The first alignment error has more weight than the second alignment error in determining the first layer alignment error. The third and fourth alignment marks are illuminated with a second light to determine a second layer alignment error including a third alignment error in relation to the third alignment mark and a fourth alignment error in relation to the fourth alignment mark. The third alignment error has more weight than the fourth alignment error in determining the second layer alignment error.
    Type: Grant
    Filed: April 4, 2016
    Date of Patent: June 12, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Hsien Lin, Hung-Chang Hsieh, Feng-Jia Shiu, Chun-Yi Lee
  • Patent number: 9983805
    Abstract: A memory management method, and a memory control circuit unit and a memory storage apparatus using the same are provided. The method includes recording a valid data count of each physical erasing unit, and identifying a plurality of first physical erasing units, wherein the valid data count of each first physical erasing unit is between a first predetermined value and a second predetermined value. The method also includes selecting a physical erasing unit from the first physical erasing units for performing a garbage collection operation if the number of the first physical erasing units meets a predetermined condition.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: May 29, 2018
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Chien-Wen Chen, Yi-Chang Hsieh
  • Publication number: 20180126457
    Abstract: An aluminum alloy powder and a manufacturing method of an aluminum alloy object are provided. The aluminum alloy powder includes 96.5-99 wt % of a combination of Al, Si, Cu and Mg and the remainder including Ni and Mn. Moreover, the aluminum alloy powder includes an alloy core and a native oxide layer covering the alloy core.
    Type: Application
    Filed: December 28, 2016
    Publication date: May 10, 2018
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yen-Yu HOU, Chih-Chao YANG, Ching-Chang HSIEH, Chao-Ming CHEN, Chi-San CHEN
  • Publication number: 20180120662
    Abstract: The present invention discloses a method for fabricating an electrochromic device, which adopts the vacuum cathodic arc-plasma deposition to comprise five layers with an ionic conduction layer (electrolyte) in contact with an electrochromic (EC) layer and an ion storage (complementary) layer, all sandwiched between two transparent conducting layers sequentially on a substrate. The method owns superior deposition efficiency and the fabricated thin film structures have higher crystalline homogeneity. In addition, thanks to the nanometer pores in the thin film structures, the electric capacity as well as the ion mobility are greater. Consequently, the reaction efficiency for bleaching or coloring is enhanced.
    Type: Application
    Filed: August 7, 2017
    Publication date: May 3, 2018
    Inventors: PO-WEN CHEN, CHEN-TE CHANG, PENG YANG, JIN-YU WU, DER-JUN JAN, CHENG-CHANG HSIEH, WEN-FA TSAI, MIN-CHUAN WANG
  • Patent number: 9951416
    Abstract: A vacuum coating apparatus includes at least a chamber, an arc discharge plasma source, a feeding-reeling unit, and a roller set. The first and second openings are connecting with the feeding or reeling unit so as to allow the substrate to enter and leave the chamber therethrough, respectively. The arc discharge plasma source located inside the chamber generates the plasma, which discharges radially from the arc discharge plasma source as its center. The roller set includes a plurality of the first rollers, which are located in the chamber and enclosing the arc discharge plasma source. A first surface of the substrate is facing the plurality of the first rollers and contacts tightly on the periphery of the first rollers so that the first rollers can rotate by the moving of the substrate. The material evaporated and emitted by the plasma is attached onto the first surface of the substrate.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: April 24, 2018
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN
    Inventors: Cheng-Chang Hsieh, Deng-Lian Lin, En-Shih Chen, Wen-Fa Tsai, Chi-Fong Ai
  • Publication number: 20180102177
    Abstract: A two-sided, staged programming operation is applied to a memory having first and second stacks of memory cells C1(i) and C2(i), i being the physical level of a cell. The staged programming operation includes applying a preliminary program stage S1, an intermediate program stage S2, and a final program stage S3 to memory cells in the first and second stacks. In a programming order the final program stage S3 is applied to memory cells in the first and second stacks at each level (i) for which the intermediate program stage S2 has already been applied to the memory cells in any neighboring levels (levels i+1 and i?1). The intermediate program stage S2 is applied only to memory cells for which the preliminary program stage S1 has already been applied to the cells in any neighboring levels (levels i+1 and i?1).
    Type: Application
    Filed: October 11, 2016
    Publication date: April 12, 2018
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chen-Jun WU, Chih-Chang Hsieh, Tzu-Hsuan Hsu, Hang-Ting LUE
  • Publication number: 20180094091
    Abstract: Provided is a method of preparing a powdery diacetal clarifying agent, which comprises mixing an aromatic aldehyde, a polyol, and an acid catalyst in an organic polar solvent, adding a hydrogenating agent and an inorganic silicon-containing agent into the foregoing mixture, and filtering the mixture. The powdery diacetal clarifying agent prepared by the method can have excellent flowability, dispersability, thermal resistance, and color stability. Accordingly, the powdery diacetal clarifying agent does not release stinking odor and incur yellowing at high temperature, allowing the plastic articles to have improved appearance and visual appeal.
    Type: Application
    Filed: December 7, 2017
    Publication date: April 5, 2018
    Inventors: Chiu-Peng TSOU, Ting-Ti HUANG, Chen-Ku HSIEH, Tien-Chu CHANG, Ming-Chang HSIEH
  • Patent number: 9929153
    Abstract: A method of fabricating a fin-like field-effect transistor (FinFET) device is disclosed. The method includes forming a mandrel features over a substrate, the mandrel feature and performing a coarse cut to remove one or more mandrel features to form a coarse space. After the coarse cut, the substrate is etched by using the mandrel features, with the coarse space as an etch mask, to form fins. A spacer layer is deposited to fully fill in a space between adjacent fins and cover sidewalls of the fins adjacent to the coarse space. The spacer layer is etched to form sidewall spacers on the fins adjacent to the coarse space. A fine cut is performed to remove a portion of one or more mandrel features to form an end-to-end space. An isolation trench is formed in the end-to-end space and the coarse space.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: March 27, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Feng Shieh, Weng-Hung Tseng, Tzung-Hua Lin, Hung-Chang Hsieh
  • Publication number: 20180061715
    Abstract: Methods for fabricating semiconductor devices are disclosed. An exemplary method includes forming first spacers along sidewalls of a gate structure that is disposed over a substrate and between source/drain features. A first dielectric layer is formed over the substrate and recessed to expose upper portions of the first spacers. A spacer layer is then formed over the upper portions of the first spacers. A second dielectric layer is formed over the spacer layer, and a patterned masking layer is formed over the second dielectric layer. The second dielectric layer, the spacer layer, and the first dielectric layer are patterned. For example, exposed portions of the second dielectric layer, the spacer layer (forming second spacers disposed along the upper portions of the first spacers), and the first dielectric layer are etched to form a trench exposing the gate structure and the source/drain features. The trench is filled with a conductive material.
    Type: Application
    Filed: October 23, 2017
    Publication date: March 1, 2018
    Inventors: Ming-Jhih Kuo, Yu-Hsien Lin, Hung-Chang Hsieh, Jhun Hua Chen
  • Patent number: 9905471
    Abstract: A method includes depositing an ESL on a substrate; patterning the ESL such that a first region of the substrate is covered thereby and a second region of the substrate is exposed within an opening of the etch stop layer; depositing a first dielectric layer on the ESL in the first region and on the substrate in the second region; patterning the first dielectric layer to form a first trench through the first dielectric layer in the first region; forming a metal feature in the first trench; depositing a second dielectric layer over the metal feature in the first region and over the first dielectric layer in the second region; and performing a patterning process to form a second trench through the second dielectric layer in the first region, and to form a third trench through the second and first dielectric layers in the second region.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: February 27, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yuan-Yen Lo, Jhih-Yu Wang, Jhun Hua Chen, Hung-Chang Hsieh
  • Publication number: 20180047561
    Abstract: A lithography method is provided in accordance with some embodiments. The lithography method includes forming a surface modification layer on a substrate, the surface modification layer including a hydrophilic top surface; coating a photoresist layer on the surface modification layer; and developing the photoresist layer, thereby forming a patterned photoresist layer.
    Type: Application
    Filed: November 18, 2016
    Publication date: February 15, 2018
    Inventors: Shu-Fang Chen, Hung-Chung Chien, Lin-Hung Shiu, Hung-Chang Hsieh
  • Patent number: 9892889
    Abstract: The present invention relates to a roll-to-roll hybrid plasma modular coating system, which comprises: at least one arc plasma processing unit, at least one magnetron sputtering plasma processing unit, a metallic film and at least one substrate feeding unit. Each of the arc plasma processing unit is formed with a first chamber and an arc plasma source. Each of the magnetron sputtering plasma processing unit is formed with a second chamber and at least one magnetron sputtering plasma source. The metallic film is disposed in the arc plasma processing unit to avoid chamber wall being deposited by the arc plasma source; There are at least one arc plasma processing unit, at least one magnetron sputtering plasma processing unit and at least one winding/unwinding unit connected in series to lay at least one thin layer by arc plasma deposition or by magnetron sputtering plasma onto substrate material.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: February 13, 2018
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN, R.O.C
    Inventors: Cheng-Chang Hsieh, Deng-Lain Lin, Ching-Pei Tseng, Wen-Fa Tsai, Jiun-Shen Chen, Chi-Fong Ai
  • Patent number: 9875892
    Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: January 23, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Wei Chang, Chih-Chien Wang, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20180004168
    Abstract: The present disclosure discloses a multi-eye analog smart timekeeping apparatus, comprising: a dial, comprising a dial substrate comprising a plurality of view regions; an arm positioned above the dial; a display panel positioned below the dial and comprising a plurality of display regions, each of the display regions corresponding to one of at least two of the view regions; and a shaft connected to the arm and being through the dial and the display panel. The present disclosure also discloses a method of making a display panel that may be used with the timekeeping apparatus, comprising: providing a first substrate comprising a first area; forming a display layer on the first substrate outside the first area; applying encapsulation material on the first area and around the display layer; sealing the display layer between the first substrate and a second substrate; and drilling a hole in the first area, wherein a size of the hole is smaller than a size of the first area.
    Type: Application
    Filed: September 18, 2017
    Publication date: January 4, 2018
    Inventors: Chih-Chang HSIEH, Te-Hsiu CHIU, Ming-Yish CHEN
  • Publication number: 20170369611
    Abstract: Provided are a powdery diacetal clarifying agent and a method of preparing the same. The powdery diacetal clarifying agent comprises a diacetal compound and an inorganic silicon-containing compound having a pH value equal to or more than 6 and equal to or less than 12. The powdery diacetal clarifying agent of the composition can have excellent flowability, dispersability, thermal resistance, and color stability. Accordingly, the powdery diacetal clarifying agent does not release stinking odor and incur yellowing at high temperature, allowing the plastic articles to have improved appearance and visual appeal.
    Type: Application
    Filed: June 23, 2016
    Publication date: December 28, 2017
    Inventors: Ting-Ti Huang, Chiu-Peng Tsou, Tien-Chu Chang, Ming-Chang Hsieh, Chen-Ku Hsieh
  • Publication number: 20170345277
    Abstract: Devices, methods, and systems for translating building automation events into mobile notifications are described herein. One device includes a memory, and a processor configured to execute executable instructions stored in the memory to receive a notification of an event from a building automation system, translate the event into a mobile notification of the event, and transmit the mobile notification of the event to a mobile device.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Inventors: Andie Kurniawan, Gary Fuller, Dae-Soon Kwon, Martin Lee, Paul Vanderstraeten, Yi-Chang Hsieh
  • Publication number: 20170345287
    Abstract: Reducing nuisance notifications from building automation systems is described herein. One device includes a memory, and a processor configured to execute executable instructions stored in the memory to receive a notification of an alarm from a building automation system, compare attributes of the alarm to attributes of alarms included in a database of suppressed alarms, refrain from transmitting a notification of the alarm to a mobile device in response to the attributes of the alarm matching attributes of any of the alarms in the database, and transmit a notification of the alarm to a mobile device in response to the attributes of the alarm not matching the attributes of any of the alarms in the database.
    Type: Application
    Filed: August 18, 2017
    Publication date: November 30, 2017
    Inventors: Gary Fuller, Dae-Soon Kwon, Yi-Chang Hsieh, Andie Kurniawan, Martin Lee, Paul Vanderstraeten
  • Publication number: 20170345283
    Abstract: Devices, methods, and systems for hands free facility status alerts are described herein. One system includes a computing device for hands free building automation notifications, comprising a memory and a processor to execute executable instructions stored in the memory to: receive a notification of an event from a building automation system, modify the notification to include only pre-defined attributes of the notification that are displayable on a user interface of a wearable device, and transmit the modified notification to the wearable device.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Inventors: Dae-Soon Kwon, Gary Fuller, Paul Vanderstraeten, Andie Kurniawan, Yi-Chang Hsieh, Martin Lee
  • Patent number: 9823574
    Abstract: A device for semiconductor fabrication includes a substrate and a layer formed over the substrate, wherein the layer includes an alignment mark. The alignment mark includes a first plurality of elongated members that are oriented lengthwise along a first direction and are distributed along a second direction. The alignment mark further includes a second plurality of elongated members that are oriented lengthwise along a third direction perpendicular to the first direction and are distributed along the second direction, wherein the second direction is different from each of the first and third directions.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: November 21, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ching-Huang Chen, Hung-Chang Hsieh, Kuei-Liang Lu, Ya Hui Chang, Spencer Lin
  • Publication number: 20170322710
    Abstract: Devices, methods, and systems for navigating an operational user interface for a building management system are described herein. One device includes a user interface, a memory, and a processor configured to execute executable instructions stored in the memory to display, on the user interface of the computing device, an operational user interface for a building management system, wherein the operational user interface includes a number of orthogonal navigation models for the building management system within a single navigation structure, and navigate between the number of orthogonal navigation models within the single navigation structure in the operational user interface.
    Type: Application
    Filed: May 4, 2016
    Publication date: November 9, 2017
    Inventors: Mark Cockburn, Yi-Chang Hsieh