Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.

Abstract: An automatic cleaning apparatus is configured to clean a floor and emit ultraviolet light for sterilizing the floor in a cleaning mode. Upon detecting that a wall is nearby, the automatic cleaning apparatus emits ultraviolet light toward a corner formed by the floor and the wall for sterilization.

Abstract: The majority of the mortality observed in young pigs occurs between three and five weeks post-weaning for S. suis infections and between four and six weeks post-weaning for H. parasuis and Actinobacillus suis infections. Clinical disease control associated with S. suis, A. suis and H. parasuis has been attempted using antibiotic treatment, by controlled exposure with live organisms, and by vaccination, using either inactivated commercial or autogenous bacterins administered parenterally. A similar lack of protection in very young pigs is observed with various viruses including swine influenza virus, porcine reproductive and respiratory syndrome virus, porcine epidemic diarrhea virus and rotavirus. Disclosed herein is an immunogenic composition comprising inactivated antigens and a mucosal adjuvant.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an isolation structure formed over a substrate, and a first stacked wire structure and a second stacked wire structure extending above the isolation structure. The semiconductor device structure includes a dummy fin structure formed over the isolation structure, and the dummy fin structure is between the first stacked wire structure and the second stacked wire structure. The semiconductor device structure also includes a capping layer formed over the dummy fin structure. The isolation structure has a first width, the dummy fin structure has a second width, and the second width is smaller than the first width.

Abstract: A display device includes a substrate, a light-emitting element, and a transistor. The substrate has a top surface. The light-emitting element is disposed on the substrate. The transistor is disposed on the substrate, and includes a drain electrode, a gate electrode, and a semiconductor layer. The drain electrode is electrically connected to the light-emitting element. The semiconductor layer includes an overlapping portion overlapped with the gate electrode. The light-emitting element does not overlap with the overlapping portion along a direction perpendicular to the top surface of the substrate.

Abstract: The present invention discloses a connector for flat conducting wires that is directed into the insertion opening, the front end comes in contact with the first locking protrusion and the second locking protrusion of the connector, respectively causing the first elastic arm and the second elastic arm to deform, thereby causing the first operating part and the second operating part to move towards the third surface until the indented notches correspond to the first locking protrusion and the second locking protrusion, which subsequently causes the first elastic arm and the second elastic arm to return to their former position by means of elastic force, latch-locking the front end of the flat conducting wire in the accommodating space, and through exerting an external force on the upper portion of the first operating part and the upper portion of the second operating part to unlatch and separate from the accommodating space.

Abstract: A display device is provided. The display device includes a light-emitting unit. The light-emitting unit includes a light-emitting part, wherein a light extraction structure is disposed on a first surface of the light-emitting part. The light-emitting unit also includes a connective part disposed on a second surface opposite to the first surface of the light-emitting part. The light-emitting unit further includes a protective part surrounding the light-emitting part and the connective part. In addition, the display device includes a substrate having a plurality of active elements and at least one bonding pad, wherein the bonding pad is electrically connected to the corresponding connective part of the light-emitting unit. The roughness of the light extraction structure is greater than or equal to 0.2 ?m and less than or equal to 5 ?m.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device includes a semiconductor fin projecting from a substrate. Semiconductor nanostructures are disposed over the semiconductor fin. A gate electrode is disposed over the semiconductor fin and around the semiconductor nanostructures. A dielectric fin is disposed over the substrate. A dielectric structure is disposed over the dielectric fin. An upper surface of the dielectric structure is disposed over the upper surface of the gate electrode. A dielectric layer is disposed over the substrate. The dielectric fin laterally separates both the gate electrode and the semiconductor nanostructures from the dielectric layer. An upper surface of the dielectric layer is disposed over the upper surface of the gate electrode structure and the upper surface of the dielectric structure. A lower surface of the dielectric layer is disposed below the upper surface of the dielectric fin.

Abstract: Biocompatible intraocular implants include a tyrosine kinase inhibitor and a biodegradable polymer that is effective to facilitate release of the tyrosine kinase inhibitor into the vitreous of an eye for an extended period of time. The therapeutic agents of the implants may be associated with a biodegradable polymer matrix, such as a matrix that is substantially free of a polyvinyl alcohol. The implants can be placed in an eye to treat or reduce the occurrence of one or more ocular conditions.

Abstract: A power rail design method is disclosed that includes the steps outlined below. A plurality of power rails and a plurality of power domains corresponding thereto in an integrated circuit design file are identified. A design rule check for a plurality of circuit units in the integrated circuit design file is performed to retrieve a plurality of non-violating circuit regions that correspond to the power rails in each of the power domains. The power rails corresponding to at least part of the plurality of non-violating circuit regions in the integrated circuit design file are widened to occupy at least part of the non-violating circuit regions for the plurality of power rails.

Abstract: Semiconductor devices using a dielectric structure and methods of manufacturing are described herein. The semiconductor devices are directed towards gate-all-around (GAA) devices that are formed over a substrate and are isolated from one another by the dielectric structure. The dielectric structure is formed over the fin between two GAA devices and cuts a gate electrode that is formed over the fin into two separate gate electrodes. The two GAA devices are also formed with bottom spacers underlying source/drain regions of the GAA devices. The bottom spacers isolate the source/drain regions from the substrate. The dielectric structure is formed with a shallow bottom that is located above the bottoms of the bottom spacers.

Abstract: An optical element driving mechanism includes a fixed portion, a movable portion, a driving assembly, and a circuit assembly. The movable portion is connected to the optical element and is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion. The circuit assembly is connected to the driving assembly. The driving assembly is electrically connected to an external circuit via the circuit assembly.

Abstract: The present disclosure describes an inner spacer structure for a semiconductor device and a method for forming the same. The method for forming the inner spacer structure in the semiconductor device can include forming a vertical structure over a substrate, forming a gate structure over a portion of the vertical structure, exposing sidewalls of the portion of the vertical structure, forming multiple spacers over the sidewalls of the portion of the vertical structure, and forming a void in each of the multiple spacers.

Abstract: A semiconductor device package includes a first substrate, a second substrate disposed over the first substrate, and a surface mount device (SMD) component disposed between the first substrate and the second substrate. The SMD component includes a plurality of connection electrodes electrically connecting the first substrate to the second substrate, and the plurality of connection electrodes are electrically disconnected from each other.

Abstract: A method includes forming a gate stack, which includes a gate dielectric and a metal gate electrode over the gate dielectric. An inter-layer dielectric is formed on opposite sides of the gate stack. The gate stack and the inter-layer dielectric are planarized. The method further includes forming an inhibitor film on the gate stack, with at least a portion of the inter-layer dielectric exposed, selectively depositing a dielectric hard mask on the inter-layer dielectric, with the inhibitor film preventing the dielectric hard mask from being formed thereon, and etching to remove a portion of the gate stack, with the dielectric hard mask acting as a portion of a corresponding etching mask.

Abstract: A memory module includes a first redistribution structure, a second redistribution structure, first semiconductor dies, second semiconductor dies, an encapsulant, through insulator vias and thermally conductive material. Second redistribution structure is stacked over first redistribution structure. First semiconductor dies are sandwiched between first redistribution structure and second redistribution structure and disposed side by side. Second semiconductor dies are disposed on the second redistribution structure. The encapsulant laterally wraps the second semiconductor dies. The through insulator vias are disposed among the first semiconductor dies, extending from the first redistribution structure to the second redistribution structure. The through insulator vias are electrically connected to the first redistribution structure and the second redistribution structure.

Abstract: A semiconductor device package comprises a carrier, a stop layer, a barrier layer and an encapsulant. The carrier has a first surface and a second surface recessed with respect to the first surface. The stop layer is disposed on the second surface of the carrier. The barrier layer is disposed on the stop layer and protruded from the first surface of the carrier. The encapsulant is disposed on the first surface of the carrier. Further, the encapsulant has a side surface disposed on the barrier layer.

Abstract: An electric power system for an electric bus includes a battery assembly, a leakage detection device, and a control device. The battery assembly includes a plurality of series-connected battery packs and a plurality of switch elements, wherein each of the battery packs includes a positive terminal, a negative terminal, and a battery cell module, and the battery packs include a first battery pack and a second battery pack; the positive terminal of the first battery pack and the negative terminal of the second battery pack are electrically connected to a load of the electric bus, and at least one of the positive terminal of the first battery pack and the negative terminal of the second battery pack is electrically connected to the leakage detection device, which outputs a leakage signal when a leakage is detected on an electric wire connected between the battery assembly and the load.

Abstract: A voltage control circuit for controlling an operating voltage of a target circuit, including: a speed detecting circuit, configured to detect an operating speed of the target circuit; and a control circuit, coupled to the speed detecting circuit, configured to generate a voltage control signal according to a difference between the operating speed and a predetermined speed, to a power supply circuit which generates the operating voltage, to control the operating voltage.

Abstract: A connecting device with multiple axial connectors. The connecting device includes a main base and a plurality of connectors, wherein the main base has a long shape. A plurality of first through holes are formed on the main base, and the connectors extend through the first through holes. Each connector has a tubular body, and a groove is formed on an outer periphery of the tubular body. A wire extends from one end of the tubular body. A c-shaped clamp joins the groove and presses an inner surface of the first through hole, whereby the connectors is secured to the main base. The difficulty of maintenance of the connecting device is reduced.