Abstract: The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.

Abstract: In accordance with the present invention, a structure of an asymmetric high-voltage MOS device is disclosed. The key aspect of the present invention is a high-voltage MOS device having a drift region underneath an isolation structure, wherein the high-voltage MOS device is isolated by shallow trench isolations and formed on a silicon-on-insulator (SOI) substrate. The asymmetric high-voltage MOS device comprises a substrate having an insulating layer thereon and a semiconductor layer of a first conductive type on the insulating layer. A plurality of shallow trench isolations defining an active area is formed in the semiconductor layer. A field oxide layer is formed in the active area of the semiconductor layer. A drift region of a second conductive type is formed under the field oxide layer in the semiconductor layer. A gate structure including a conductive layer and a gate dielectric layer is formed on the semiconductor layer in the active area and covers a portion of the field oxide layer.

Abstract: The present invention provides a method for making a HVMOS transistor on a SOI substrate. The method according to the present invention involves forming a plurality of shallow trench isolations (STI) and at least one active area isolated by each shallow trench isolation on the SOI substrate. Then, two unneighboring field oxide layers and a gate are formed on the surface of the active area, with a portion of the gate covering the two field oxide layers. Thereafter, two double diffuse drains(DDD) are formed on the surface of the active area not covered by the gate and the two field oxide layers. Finally, a drift region of the HVMOS transistor is formed at the bottom of the two field oxide layers.