Patents by Inventor Chang Sheng

Chang Sheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210389750
    Abstract: A method for controlling a cutting tool in a CNC machine and a device using the method receives contours of workpieces generated by a first measuring machine, inputs the first contour parameters into a calculation model to output first compensation values of the cutting tool, the calculation model being a time sequences model established according to contour sets of the workpieces, and the contour sets include at least one historical contour of the workpieces. The device further determines whether the first compensation values of the cutting tool are greater than, equal to or smaller than a preset value, and sends the first compensation values of the cutting tool to a machine.
    Type: Application
    Filed: June 15, 2021
    Publication date: December 16, 2021
    Inventors: CHENG-I SUN, CHANG-SHENG CHEN, YONG YANG
  • Publication number: 20210376124
    Abstract: A semiconductor device includes a substrate, an isolation structure on the substrate, a fin protruding from the substrate and through the isolation structure, a gate stack engaging the fin, and a gate spacer on sidewalls of the gate stack. The gate spacer includes an inner sidewall facing the gate stack and an outer sidewall opposing the inner sidewall. The inner sidewall has a first height measured from a top surface of the fin and a bowed structure in a top portion of the inner sidewall. The bowed structure extends towards the gate stack for a first lateral distance measured from a middle point of the inner sidewall. The first lateral distance is less than about 8% of the first height.
    Type: Application
    Filed: August 5, 2021
    Publication date: December 2, 2021
    Inventors: Wei-Yu Tsai, Fu-Yao Nien, Hong-Wei Huang, Chang-Sheng Lee
  • Publication number: 20210358786
    Abstract: A method of forming dice includes the following steps. First, a wafer structure is provides, which includes a substrate and a stack of semiconductor layers disposed in die regions and a scribe line region. Then, the substrate and the stack of the semiconductor layers in the scribe line region are removed to forma groove in the substrate. After the formation of the groove, the substrate is further thinned to obtain the substrate with a reduced thickness. Finally, a separation process is performed on the substrate with the reduced thickness.
    Type: Application
    Filed: May 14, 2020
    Publication date: November 18, 2021
    Inventors: Hsiu-Mei Yu, Wei-Chan Chang, Chang-Sheng Lin, Chun-Yi Wu
  • Patent number: 11177230
    Abstract: An electronic device includes a substrate and first bumps. The first bumps are disposed on the substrate and arranged in a first bump row. Each first bump has a first end and a second end opposite to each other. Centers of the first ends of the first bumps are on a first axial line. A first axial coordinate of a center of the second end of a respective first bump relative to a second axial line perpendicular to the first axial line is XA(1+?AYA), in which XA is a first axial coordinate of the center of the first end of the respective first bump relative to the second axial line, YA is a second axial coordinate of the center of the second end of the respective first bump relative to the first axial line, and ?A is a slope coefficient of the respective first bump.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: November 16, 2021
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Hsien-Wen Lo, Chang-Sheng Tseng
  • Publication number: 20210342504
    Abstract: A method of determining productive capacity parameters includes steps of: obtaining a plurality of parameters of a production line from a memory. By a productive capacity parameters generating system finishing the following steps of: combining parameters of production line to obtain a plurality of parametric combinations so as to generate a plurality of production capacity values; calculating a plurality of stimulation values according to production capacity values and parameters; when at least one stimulation value of stimulation values is greater than to or equals to a preset threshold, setting up at least one stimulation value of stimulation values as at least one related stimulation value; obtaining parameters of at least one target parametric combination of parametric combinations according to at least one related stimulation value; and providing parameters of at least one target parametric combination as productive capacity parameters of production line.
    Type: Application
    Filed: March 18, 2021
    Publication date: November 4, 2021
    Inventors: Chun-Kuang MA, Chang-Sheng TSAU, Shen-Hau CHANG
  • Patent number: 11100399
    Abstract: Systems and methods for training a neural network model are disclosed. In the method, training data is obtained by a deep neural network (DNN) first, the deep neural network comprising at least one hidden layer. Then features of the training data are obtained from a specified hidden layer of the at least one hidden layer, the specified hidden layer being connected respectively to a supervised classification network for classification tasks and an autoencoder based reconstruction network for reconstruction tasks. And at last the DNN, the supervised classification network and the reconstruction network are trained as a whole based on the obtained features, the training being guided by the classification tasks and the reconstruction tasks.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: August 24, 2021
    Assignee: International Business Machines Corporation
    Inventors: Wei Shan Dong, Peng Gao, Chang Sheng Li, Chun Yang Ma, Kai AD Yang, Ren Jie Yao, Ting Yuan, Jun Zhu
  • Publication number: 20210245344
    Abstract: A pneumatic electric nail gun includes a muzzle unit, a striking cylinder that is connected to the muzzle unit, a piston rod subunit that extends movably from the striking cylinder into the muzzle unit, an electric unit that drives movement of the piston rod subunit from a standby position to a nail-striking position for striking a nail, and a connecting unit that includes a plurality of fasteners and a plurality of buffer members. The fasteners extend through the electric unit and secure the electric unit to the muzzle unit. Each of the buffer members surrounds a respective one of the fasteners and fills a space between the respective one of the fasteners, the electric unit and the muzzle unit for shock absorption during a nail-striking process.
    Type: Application
    Filed: February 3, 2021
    Publication date: August 12, 2021
    Applicant: BASSO INDUSTRY CORP.
    Inventors: An-Gi LIU, Chang-Sheng LIN, Fu-Ying HUANG
  • Patent number: 11088262
    Abstract: A method includes providing a structure having a substrate and a fin protruding from the substrate; forming a dummy gate stack over the fin; forming a gate spacer on sidewalls of the dummy gate stack; removing the dummy gate stack using a radical etch process, resulting in a gate trench; and forming a metal gate stack in the gate trench.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: August 10, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yu Tsai, Fu-Yao Nien, Hong-Wei Huang, Chang-Sheng Lee
  • Patent number: 11081805
    Abstract: An antenna array is provided, which may include a connection portion and a plurality of antenna units. The antenna units may be disposed on the two sides of the connection portion respectively. The proximal end of each of the antenna units may be connected to the connection portion and the distal end of one or more of the antenna units may be grounded. The length of each of the antenna units may be less than or equal to ¼ wavelength of the operating frequency of the antenna array, and the distance between any two adjacent antenna units may be less than or equal to ½ wavelength of the operating frequency of the antenna array.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: August 3, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chun-Chi Lin, Chang-Sheng Chen, Guo-Shu Huang
  • Publication number: 20210210451
    Abstract: An electronic device includes a substrate and first bumps. The first bumps are disposed on the substrate and arranged in a first bump row. Each first bump has a first end and a second end opposite to each other. Centers of the first ends of the first bumps are on a first axial line. A first axial coordinate of a center of the second end of a respective first bump relative to a second axial line perpendicular to the first axial line is XA(1+?AYA), in which XA is a first axial coordinate of the center of the first end of the respective first bump relative to the second axial line, YA is a second axial coordinate of the center of the second end of the respective first bump relative to the first axial line, and ?A is a slope coefficient of the respective first bump.
    Type: Application
    Filed: January 8, 2020
    Publication date: July 8, 2021
    Inventors: Hsien-Wen LO, Chang-Sheng TSENG
  • Patent number: 11029969
    Abstract: Determining a characteristic of a configuration file that is used to discover configuration files in a target machine, a computer identifies, using information associated with a configuration item of a machine, a candidate configuration file related to the configuration item of the machine, from among a plurality of files from the machine. The computer extracts a value of a feature of the candidate configuration file and aggregates the candidate configuration file with a second candidate configuration file related to the same configuration item identified from among a plurality of files from a second machine, based on the extracted value. The computer then determines a configuration file related to the configuration item from among the aggregated candidate configuration files based on a result of the aggregation, and determines a characteristic of the configuration file related to the configuration item.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: June 8, 2021
    Assignee: International Business Machines Corporation
    Inventors: Ajay A. Apte, Chang Sheng Li, Fan Jing Meng, Joseph P. Wigglesworth, Jing Min Xu, Bo Yang, Xue Jun Zhuo
  • Patent number: 11011385
    Abstract: A method of manufacturing an integrated circuit device is provided. A first feature, which has a first susceptibility to damage by chemical mechanical processing (CMP), is formed at a first height as measured from an upper surface of the substrate. A second feature, which has a second susceptibility to damage by the CMP, is formed at a second height as measured from the upper surface of the substrate and is laterally spaced from the first feature by a recess. The second height is greater than the first height, and the second susceptibility is less than the first susceptibility. A sacrificial coating is formed in the recess over an uppermost surface of the first feature. CMP is performed to remove a first portion of the sacrificial coating and expose an upper surface of the second feature while leaving a second portion of the sacrificial coating in place over the first feature.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Kuei Liu, Teng-Chun Tsai, Kuo-Yin Lin, Shen-Nan Lee, Yu-Wei Chou, Kuo-Cheng Lien, Chang-Sheng Lin, Chih-Chang Hung, Yung-Cheng Lu
  • Publication number: 20210143556
    Abstract: An antenna array is provided, which may include a connection portion and a plurality of antenna units. The antenna units may be disposed on the two sides of the connection portion respectively. The proximal end of each of the antenna units may be connected to the connection portion and the distal end of one or more of the antenna units may be grounded. The length of each of the antenna units may be less than or equal to ¼ wavelength of the operating frequency of the antenna array, and the distance between any two adjacent antenna units may be less than or equal to ½ wavelength of the operating frequency of the antenna array.
    Type: Application
    Filed: February 20, 2020
    Publication date: May 13, 2021
    Inventors: CHUN-CHI LIN, CHANG-SHENG CHEN, GUO-SHU HUANG
  • Patent number: 10996166
    Abstract: An apparatus for detecting an object capable of emitting light. The apparatus comprises a light detector comprising at least two optical sensors capable of determining the intensity of the light; and a computer processing output signal generated by the optical sensors and comparing a result of the processing with a known result corresponding to a known type to determine whether the object belongs to the known type.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: May 4, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Hung-Chun Chen, Ming-Chia Li, Chang-Sheng Chu, Yu-Tang Li, Chung-Fan Chiou
  • Publication number: 20210064618
    Abstract: A federated database-management system receives an SQL query or other type of data-access request. The federated system's host DBMS parses, rewrites, and optimizes the request into an optimal data-access plan, then determines which portions of the plan require access to data stored on the federated systems' remote databases. The federated host partitions the plan into subplans that each represent instructions of the original data-access request that were directed to a corresponding remote database of the federated DBMS. Each subplan is then transmitted to its corresponding remote database, which directly executes the subplan and returns results to the host. If necessary, a subplan is translated from an original generic access-plan format into a database-specific format required by its corresponding remote database.
    Type: Application
    Filed: August 29, 2019
    Publication date: March 4, 2021
    Inventors: Chang Sheng Liu, Yan Li Xu, Hui Guo, Yao M. Wang, Hai Jun Shen, Ping Liu
  • Publication number: 20210061643
    Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.
    Type: Application
    Filed: November 13, 2020
    Publication date: March 4, 2021
    Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
  • Patent number: 10916473
    Abstract: A method includes forming a first dielectric layer over a wafer, etching the first dielectric layer to form an opening, filling a tungsten-containing material into the opening, and performing a Chemical Mechanical Polish (CMP) on the wafer. After the CMP, a cleaning is performed on the wafer using a weak base solution.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: February 9, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hao Chung, Chang-Sheng Lin, Kuo-Feng Huang, Li-Chieh Wu, Chun-Chieh Lin
  • Publication number: 20200407594
    Abstract: A slurry solution for a Chemical Mechanical Polishing (CMP) process includes a wetting agent, a stripper additive that comprises at least one of: N-methyl-2-pyrrolidone (NMP), dimethyl sulfoxide (DMSO), sulfolane, and dimethylformamide (DMF), and an oxidizer additive comprising at least one of: hydrogen peroxide (H2O2), ammonium persulfate ((NH4)2S2O8), peroxymonosulfuric acid (H2SO5), ozone (O3) in de-ionized water, and sulfuric acid (H2SO4).
    Type: Application
    Filed: September 14, 2020
    Publication date: December 31, 2020
    Inventors: Kuo-Yin Lin, Wen-Kuei Liu, Teng-Chun Tsai, Shen-Nan Lee, Kuo-Cheng Lien, Chang-Sheng Lin, Yu-Wei Chou
  • Patent number: 10870576
    Abstract: A semiconductor sensor, comprising a gas-sensing device and an integrated circuit is provided. The gas-sensing device includes a substrate having a sensing area and an interconnection area in the vicinity of the sensing area, an inter-metal dielectric (IMD) layer formed above the substrate in the sensing area and in the interconnection area, and an interconnect structure formed in the interconnection area; further includes a sensing electrode, a second TiO2-patterned portion, and a second Pt-patterned portion on the second TiO2-patterned portion in the sensing area. The interconnect structure includes a tungsten layer buried in the IMD layer, wherein part of a top surface of the tungsten layer is exposed by at least a via. The interconnect structure further includes a platinum layer formed in said at least the via, a TiO2 layer formed on the IMD layer, a first TiO2-patterned portion and a first Pt-patterned portion.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: December 22, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Fan Hu, Chia-Wei Lee, Chang-Sheng Hsu, Weng-Yi Chen
  • Patent number: 10868072
    Abstract: A semiconductor structure includes a substrate having a front surface and a back surface. The semiconductor structure further includes a first isolation structure extending from the front surface into the substrate, the first isolation structure having a depth D1 from the front surface. The semiconductor structure further includes a second isolation structure extending from the front surface into the substrate, the second isolation structure having a depth D2 from the front surface. The semiconductor structure further includes a first etching stop feature in the substrate and contacting the first isolation structure. The semiconductor structure further includes a second etching stop feature in the substrate and contacting the second isolation structure.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Chang-Sheng Tsao