Patents by Inventor Chao-Hung Lin

Chao-Hung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973164
    Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 30, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen
  • Publication number: 20240136472
    Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 25, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Tzu-Yao TSENG, Tsung-Hsun CHIANG, Bo-Jiun HU, Wen-Hung CHUANG, Yu-Ling LIN
  • Publication number: 20240124844
    Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 18, 2024
    Inventors: Chia-Hsin Lee, Po-Cheng Lin, Yong-Cheng Kao, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240115616
    Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Inventors: Po-Cheng Lin, Pi-Chun Huang, Zih-Han Hong, Ming-Hsi Chuang, Yi-Chun Lin, Chia-Hsin Lee, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Patent number: 11935969
    Abstract: A photodetector includes a first semiconductor layer, an absorption structure, a second semiconductor layer, and a barrier structure. The absorption structure is located on the first semiconductor layer, and having a first conduction band, a first valence band, and a first band gap. The second semiconductor layer is located on the absorption structure, and having a second conduction band, a second valence band, and a second band gap. The barrier structure is located between the absorption structure and the second semiconductor layer, and having a third conduction band, a third valence band, and a third band gap. The third conduction band is greater than the second conduction band or the third valence band is less than the second valence band.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Shih-Chang Lee, Shiuan-Leh Lin, I-Hung Chen, Chu-Jih Su, Chao-Shun Huang
  • Patent number: 11387148
    Abstract: A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region, wherein each of the first fin-shaped structure and the second fin-shaped structure comprises a top portion and a bottom portion; a first doped layer around the bottom portion of the first fin-shaped structure; a second doped layer around the bottom portion of the second fin-shaped structure; a first liner on the first doped layer; and a second liner on the second doped layer.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: July 12, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Wei Feng, Shih-Hung Tsai, Chao-Hung Lin, Hon-Huei Liu, Shih-Fang Hong, Jyh-Shyang Jenq
  • Publication number: 20210362211
    Abstract: An example system includes a first stamping portion having a first surface to form a corresponding stamped surface on a metal component to be stamped, and a second stamping portion having a second surface, the second surface to oppose the first surface of the first stamping portion during stamping of the metal component. The second surface includes a metal flow receiving feature, the metal flow receiving feature including a non-flat surface to attenuate an amount of metal flowing therein during stamping of the metal component between the first stamping portion and the second stamping portion.
    Type: Application
    Filed: July 2, 2018
    Publication date: November 25, 2021
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Chao-Hung Lin, Te-Shun Lee, Kuan-Ting Wu, Chia-Cheng Wei
  • Publication number: 20200301139
    Abstract: A head-up display system includes a display device, a liquid crystal cell and a driver circuit. The display device is configured to generate multiple images at a frame rate. Each image includes multiple image segments with an initial polarization. The liquid crystal cell includes multiple addressable segments. The addressable segments are aligned with the image segments. The addressable segments are individually controllable to selectively adjust the initial polarization of the image segments between two different polarizations. The driver circuit is in communication with the display device and the liquid crystal cell. The driver circuit is configured to control the addressable segments to pass each image segment that has visible content to a user with the initial polarization switched between the two different polarizations at a frequency greater than the frame rate of the images and attenuate sunlight incident on the display device at each image segment that has blank content.
    Type: Application
    Filed: March 20, 2020
    Publication date: September 24, 2020
    Applicant: Visteon Global Technologies, Inc.
    Inventors: Chao-Hung Lin, Sebastien Hervy, Paul Fredrick Luther Weindorf, Elie Abi-Chaaya, Thierry Dommanget
  • Publication number: 20200273758
    Abstract: A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region, wherein each of the first fin-shaped structure and the second fin-shaped structure comprises a top portion and a bottom portion; a first doped layer around the bottom portion of the first fin-shaped structure; a second doped layer around the bottom portion of the second fin-shaped structure; a first liner on the first doped layer; and a second liner on the second doped layer.
    Type: Application
    Filed: May 12, 2020
    Publication date: August 27, 2020
    Inventors: Li-Wei Feng, Shih-Hung Tsai, Chao-Hung Lin, Hon-Huei Liu, Shih-Fang Hong, Jyh-Shyang Jenq
  • Patent number: 10692777
    Abstract: A semiconductor device includes: a substrate having a first region and a second region; a first fin-shaped structure on the first region and a second fin-shaped structure on the second region, wherein each of the first fin-shaped structure and the second fin-shaped structure comprises a top portion and a bottom portion; a first doped layer around the bottom portion of the first fin-shaped structure; a second doped layer around the bottom portion of the second fin-shaped structure; a first liner on the first doped layer; and a second liner on the second doped layer.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: June 23, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Wei Feng, Shih-Hung Tsai, Chao-Hung Lin, Hon-Huei Liu, Shih-Fang Hong, Jyh-Shyang Jenq
  • Publication number: 20200050054
    Abstract: A head-up display (HUD) compatible with polarized sunglasses is disclosed. The HUD includes a thin-film transistor liquid crystal display (TFT-LCD), an active polarization modulator, and a wavelength filter. The active polarization modulator and the wavelength filter are optically bonded to the TFT-LCD. The active polarization modulator is configured to modulate a polarization from the TFT-LCD. The wavelength filter is configured to increase a sunlight resistance of the TFT-LCD.
    Type: Application
    Filed: August 9, 2018
    Publication date: February 13, 2020
    Inventors: Chao-Hung Lin, Paul Fredrick Luther Weindorf, Sebastien Hervy
  • Publication number: 20190369392
    Abstract: The present invention relates to a picture generation unit for a head-up display. The picture generation unit comprises an array of light-sources for emitting beams of light, the light sources being arranged in a matrix of Ly rows and Lx columns; an array of collimation lenses for receiving said emitted beams of light, the collimation lenses being arranged in a matrix of Ly rows and Lx columns; a micro lens array for receiving light from the collimation lenses and providing a focused light output, the micro lens array arranged in a matrix of Fy rows and Fx columns, wherein Fx>2·Lx and Fy>2·Ly; a field lens array for receiving said light from the micro lens array and providing a collimated light output, the field lens array arranged in a matrix of Lx rows and Ly columns; and an image generation unit for receiving said collimated light output.
    Type: Application
    Filed: May 30, 2019
    Publication date: December 5, 2019
    Applicant: VISTEON GLOBAL TECHNOLOGIES, INC.
    Inventors: Kazuya Matsuura, Ryo Kajiura, Alexandra Ledermann, Sebastien Hervy, Chao-Hung Lin
  • Patent number: 10497810
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a first spacer adjacent to the first fin-shaped structure and a second spacer adjacent to the second fin-shaped structure; and using the first spacer and the second spacer as mask to remove part of the substrate for forming a third fin-shaped structure on the first region and a fourth fin-shaped structure on the second region, in which the third fin-shaped structure includes a first top portion and a first bottom portion and the fourth fin-shaped structure includes a second top portion and a second bottom portion.
    Type: Grant
    Filed: January 21, 2019
    Date of Patent: December 3, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Wei Feng, Shih-Hung Tsai, Chao-Hung Lin, Chih-Kai Hsu, Yu-Hsiang Hung, Jyh-Shyang Jenq
  • Patent number: 10365483
    Abstract: Disclosed herein are systems, methods, and devices for implementing a heads-up display (HUD) that is viewable in conditions where a viewer is wearing a p-polarized eyewear, eyewear polarized between s-polarized and p-polarized, or not. Thus, employing the aspects disclosed herein, a viewer may realize all the benefits of a HUD implementation (for example, one implemented via a vehicle), while realizing all the benefits of wearing polarized eyewear.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: July 30, 2019
    Assignee: Visteon Global Technologies, INC.
    Inventors: Chao-Hung Lin, Paul Fredrick Luther Weindorf, Sebastien Hervy, Jay P. Dark, Darrin W. Bruce, Ryo Kajiura, Claire Gerardin
  • Patent number: 10319641
    Abstract: A semiconductor device includes a substrate, a first insulating structure and a gate structure. The substrate includes at least two fin structures protruding from a top surface of the substrate, the substrate includes a first recess and a second recess under the first recess, and the first recess and the second recess are disposed between the fin structures, in which a width of the first recess is larger than a width of the second recess, and the first recess and the second recess form a step structure. The first insulating structure fills the second recess. The gate structure is disposed on the first insulating structure, in which the first recess and the second recess are filled up with the gate structure and the first insulating structure.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: June 11, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: En-Chiuan Liou, Chao-Hung Lin, Yu-Cheng Tung
  • Publication number: 20190157445
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a first spacer adjacent to the first fin-shaped structure and a second spacer adjacent to the second fin-shaped structure; and using the first spacer and the second spacer as mask to remove part of the substrate for forming a third fin-shaped structure on the first region and a fourth fin-shaped structure on the second region, in which the third fin-shaped structure includes a first top portion and a first bottom portion and the fourth fin-shaped structure includes a second top portion and a second bottom portion;
    Type: Application
    Filed: January 21, 2019
    Publication date: May 23, 2019
    Inventors: Li-Wei Feng, Shih-Hung Tsai, Chao-Hung Lin, Chih-Kai Hsu, Yu-Hsiang Hung, Jyh-Shyang Jenq
  • Patent number: 10256146
    Abstract: A semiconductor device and method of forming the same, the semiconductor device includes a first and second fin shaped structures, a first and second gate structures and a first and second plugs. The first and second fin shaped structures are disposed on a first region and a second region of a substrate and the first and second gate structure are disposed across the first and second fin shaped structures, respectively. A dielectric layer is disposed on the substrate, covering the first and second gate structure. The first and second plugs are disposed in the dielectric layer, wherein the first plug is electrically connected first source/drain regions adjacent to the first gate structure and contacts sidewalls of the first gate structure, and the second plug is electrically connected to second source/drain regions adjacent to the second gate structure and not contacting sidewalls of the second gate structure.
    Type: Grant
    Filed: January 14, 2018
    Date of Patent: April 9, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Hsiang Hung, Ssu-I Fu, Chao-Hung Lin, Chih-Kai Hsu, Jyh-Shyang Jenq
  • Patent number: 10236383
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first fin-shaped structure thereon; forming a spacer adjacent to the first fin-shaped structure; using the spacer as mask to remove part of the substrate for forming a second fin-shaped structure, wherein the second fin-shaped structure comprises a top portion and a bottom portion; and forming a doped portion in the bottom portion of the second fin-shaped structure.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: March 19, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Wei Feng, Shih-Hung Tsai, Chao-Hung Lin, Chih-Kai Hsu, Yu-Hsiang Hung, Jyh-Shyang Jenq
  • Patent number: 10211243
    Abstract: A method of image sensor package fabrication includes providing an image sensor, including a pixel array disposed in a semiconductor material, and a first transparent shield adhered to the semiconductor material. The pixel array is disposed between the semiconductor material and the first transparent shield. A light blocking layer is deposited and disposed between lateral edges of the pixel array and lateral edges of the first transparent shield, and a second transparent shield is placed on the image sensor package, where the light blocking layer is disposed between the first transparent shield and the second transparent shield.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: February 19, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Chia-Chun Miao, Yin Qian, Chao-Hung Lin, Chen-Wei Lu, Dyson H. Tai, Ming Zhang, Jin Li
  • Patent number: 10204504
    Abstract: An electronic device including a signal processing circuit, an acceleration sensor, and an edge sensor is provided. The electronic device has a device body. The signal processing circuit operates in a sleep mode. The acceleration sensor senses an acceleration variation of the device body to generate an acceleration sensing signal. The acceleration sensor determines whether the acceleration sensing signal is continuously lower than an acceleration threshold for a preset length of time to wake up the signal processing circuit. When the acceleration sensor wakes up the signal processing circuit, the signal processor enables the edge sensor. The edge sensor senses a deformation variation of the device body to generate at least one deformation sensing signal. The signal processing circuit analyzes the deformation sensing signal to determine whether a drop event of the device body occurs. In addition, a drop warning method is also provided.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: February 12, 2019
    Assignee: HTC Corporation
    Inventors: Chao-Hung Lin, Chin-Yu Wang, Ming-Chang Chen