Patents by Inventor Che-An Lee

Che-An Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145132
    Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.
    Type: Application
    Filed: March 16, 2023
    Publication date: May 2, 2024
    Inventors: CHENG-YU TUNG, CHEN-NAN LIU, Chia-Yuan Lee, HSIU-CHE YEN, YUNG-HSIEN CHANG, Yao-Te Chang, FU-HUA CHU
  • Publication number: 20240145133
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.
    Type: Application
    Filed: April 5, 2023
    Publication date: May 2, 2024
    Inventors: CHEN-NAN LIU, YUNG-HSIEN CHANG, CHENG-YU TUNG, HSIU-CHE YEN, Chia-Yuan LEE, Yao-Te CHANG, FU-HUA CHU
  • Publication number: 20240143191
    Abstract: A cyclic backup method for a solid-state disk (SSD) device includes writing, by a controller, data into corresponding physical address and reading data from corresponding physical address according to logic address of a first mapping table; receiving, by the controller, a backup signal; writing, by the controller, data into corresponding physical address and reading data from corresponding physical address according to logic address of a second mapping table; reading, by the controller, a first data according to logic address of the first mapping table when the controller cannot read the first data according to logic address of the second mapping table; receiving, by the controller, a recovery signal; and reading, by the controller, data from corresponding physical address according to logic address of the first mapping table.
    Type: Application
    Filed: December 22, 2022
    Publication date: May 2, 2024
    Applicant: Apacer Technology Inc.
    Inventor: Yu-Che Lee
  • Publication number: 20240141909
    Abstract: A fan frame includes a central base, a frame wall, and a plurality of static blades radially extending from the central base to the frame wall, each static blade is connected to the central base at a first end and connected to the frame wall at a second end, the central base is provided with a first wire groove, the frame wall is provided with a second wire groove, the first wire groove and the second wire groove are configured for accommodating wires, and the second wire groove has a shape same as the second end of the static blade connected to the frame wall for gathering the wires to shape similar to the static blade. A fan assembly including the fan frame is also disclosed.
    Type: Application
    Filed: February 1, 2023
    Publication date: May 2, 2024
    Inventors: XIAO-GUANG MA, YUNG-PING LIN, YONG-KANG ZHANG, PENG-FEI MAI, KUN-CHE LEE, YANG-YANG ZHU
  • Publication number: 20240127989
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.
    Type: Application
    Filed: January 25, 2023
    Publication date: April 18, 2024
    Inventors: CHIA-YUAN LEE, CHENG-YU TUNG, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, YAO-TE CHANG, FU-HUA CHU
  • Publication number: 20240127988
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.
    Type: Application
    Filed: March 2, 2023
    Publication date: April 18, 2024
    Inventors: HSIU-CHE YEN, YUNG-HSIEN CHANG, CHENG-YU TUNG, Chia-Yuan Lee, CHEN-NAN LIU, Yao-Te Chang, FU-HUA CHU
  • Publication number: 20240130104
    Abstract: A semiconductor structure including a substrate, a first dielectric layer disposed on the substrate, a second dielectric layer disposed on the first dielectric layer and in physical contact with the first dielectric layer, an opening on the substrate and having a lower portion through the first dielectric layer and an upper portion through the second dielectric layer, an conductive layer disposed on the second dielectric layer at two sides of the opening and in physical contact with the second dielectric layer, a contact structure disposed in the lower portion of the opening, and a passivation layer covering a top surface of the contact structure, a sidewall of the second dielectric layer, and a sidewall of the conductive layer.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wang Jhan, Fu-Che Lee, Gang-Yi Lin, An-Chi Liu, Yifei Yan, Yu-Cheng Tung
  • Patent number: 11961762
    Abstract: A method includes forming a first conductive feature, depositing a passivation layer on a sidewall and a top surface of the first conductive feature, etching the passivation layer to reveal the first conductive feature, and recessing a first top surface of the passivation layer to form a step. The step comprises a second top surface of the passivation layer. The method further includes forming a planarization layer on the passivation layer, and forming a second conductive feature extending into the passivation layer to contact the first conductive feature.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Da Cheng, Tzy-Kuang Lee, Song-Bor Lee, Wen-Hsiung Lu, Po-Hao Tsai, Wen-Che Chang
  • Patent number: 11955335
    Abstract: In a method of coating a photo resist over a wafer, dispensing the photo resist from a nozzle over the wafer is started while rotating the wafer, and dispensing the photo resist is stopped while rotating the wafer. After starting and before stopping the dispensing the photo resist, a wafer rotation speed is changed at least 4 times. During dispensing, an arm holding the nozzle may move horizontally. A tip end of the nozzle may be located at a height of 2.5 mm to 3.5 mm from the wafer.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: April 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tung-Hung Feng, Hui-Chun Lee, Sheng-Wen Jiang, Shih-Che Wang
  • Patent number: 11949799
    Abstract: Disclosed is an input/output circuit for a physical unclonable function generator circuit. In one embodiment, a physical unclonable function (PUF) generator includes: a PUF cell array comprising a plurality of bit cells configured in a plurality of columns and at least one row, and at least one input/output (I/O) circuit each coupled to at least two neighboring columns of the PUF cell array, wherein the at least one I/O circuit each comprises a sense amplifier (SA) with no cross-coupled pair of transistors, wherein the SA comprises two cross-coupled inverters with no access transistor and a SA enable transistor, and wherein the at least one I/O circuit each is configured to access and determine logical states of at least two bit cells in the at least two neighboring columns; and based on the determined logical states of the plurality of bit cells, to generate a PUF signature.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Che Tsai, Shih-Lien Linus Lu, Cheng Hung Lee, Chia-En Huang
  • Publication number: 20240101847
    Abstract: A quantum dot oil-based ink is provided. The quantum dot oil-based ink includes a quantum dot material, a dispersing solvent, a viscosity modifier, and a surface tension modifying solution. The dispersing solvent includes a linear alkane having 6 to 14 carbon atoms. The viscosity modifier includes an aromatic hydrocarbon having 10 to 18 carbon atoms or a linear olefin having 16 to 20 carbon atoms. The surface tension modifying solution includes a hydrophobic polymer material and a nonpolar solvent.
    Type: Application
    Filed: November 29, 2022
    Publication date: March 28, 2024
    Inventors: Chun Che LIN, Chong-Ci HU, Yi-Ting TSAI, Ching-Yi CHEN, Yu-Chun LEE
  • Patent number: 11943909
    Abstract: A semiconductor memory device and a method of forming the same are provided, with the semiconductor memory device including a substrate, a stacked structure, plural openings, plural flared portions and an electrode layer. The stacked structure is disposed on the substrate and includes alternately stacked oxide material layers and stacked nitride material layers. Each of the openings is disposed in the stacked structure, and each of the flared portions is disposed under each of the openings, in connection with each opening. The electrode layer is disposed on surfaces of each opening and each flared portion.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: March 26, 2024
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Feng-Yi Chang, Fu-Che Lee
  • Patent number: 11929971
    Abstract: Systems and methods are directed to email threading based on machine learning determined categories and features. A network system accesses a plurality of emails addressed to a user. The network system then classifies, using a machine learning model, each email into at least one of a plurality of categories. For a category of the plurality of categories, one or more feature values are extracted from each email in the category. Based on the category and the extracted feature values, the network system groups messages having a same feature value in the same category together into a single email thread. Information related to the single email thread is then presented at a client device of the user.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 12, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Charles Yin-Che Lee, Victor Poznanski
  • Publication number: 20240080505
    Abstract: A method, comprising: detecting an outage of at least one functionality in a live streaming; performing an first operation toward a second user terminal; storing data of the first operation in a database of the first user terminal; and displaying an effect corresponding to the first operation during the outage. The present disclosure may store the data of operation performed by the user terminal during outage and process the operation after the outage is recovered. Therefore, the streamers and viewers may feel interested and satisfied, instead of feeling anxious, and the user experience may be enhanced.
    Type: Application
    Filed: June 23, 2023
    Publication date: March 7, 2024
    Inventors: Yung-Chi HSU, Hsing-Yu TSAI, Chia-Han CHANG, Yi-Jou LEE, Ming-Che CHENG
  • Patent number: 11925017
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 11924039
    Abstract: Provided are a system and a method for optimization of network function management and computer readable medium thereof that develop an OAM system architecture compatible with a standard MANO framework set by ETSI, so as to effectively integrate and manage the resources and situation configurations of the network elements (including VNF and CNF) of different manufacturers. Therefore, containment management for various network elements may be flexibly integrated, advantages of the standard MANO framework may be preserved, cost for customized development of various OAM systems and the information transmission therefrom may be reduced, and overall efficiency is increased.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: March 5, 2024
    Assignee: CHUNGHWA TELECOM CO., LTD.
    Inventors: Yuan-Mao Hung, Mao-Yao Lee, Chien-Hua Lee, Shih-Che Chien
  • Publication number: 20240069431
    Abstract: In a method of manufacturing an attenuated phase shift mask, a photo resist pattern is formed over a mask blank. The mask blank includes a transparent substrate, an etch stop layer on the transparent substrate, a phase shift material layer on the etch stop layer, a hard mask layer on the phase shift material layer and an intermediate layer on the hard mask layer. The intermediate layer is patterned by using the photo resist pattern as an etching mask, the hard mask layer is patterned by using the patterned intermediate layer as an etching mask, and the phase shift material layer is patterned by using the patterned hard mask layer as an etching mask. The intermediate layer includes at least one of a transition metal, a transition metal alloy, or a silicon containing material, and the hard mask layer is made of a different material than the intermediate layer.
    Type: Application
    Filed: February 16, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Che HSIEH, Chien-Cheng Chen, Ping-Hsun Lin, Ta-Cheng Lien, Hsin-Chang Lee
  • Publication number: 20240071281
    Abstract: A display device includes a display panel and a circuit. For a first sub-pixel, the circuit obtains a corresponding second sub-pixel. The circuit calculates a first compensation value according to the grays levels of the first sub-pixel and the second sub-pixel, and calculates a second compensation value according to the polarity states of the first sub-pixel and the second sub-pixel and the difference between the gray levels of the two sub-pixels. The circuit also calculates a gain according to the position of the first sub-pixel, compensates the gray level to the first sub-pixel according to the first compensation value, the second compensation value and the gain to obtain an output gray level, and drives the first sub-pixel according to the output gray level.
    Type: Application
    Filed: June 16, 2023
    Publication date: February 29, 2024
    Inventors: Cheng-Hsun LEE, Tsai Hsing CHEN, Cheng Che TSAI, Ching-Wen WANG
  • Patent number: 11914169
    Abstract: An optical member driving mechanism is provided. The optical member driving mechanism is configured to hold an optical member and drive the optical member to move. The optical member driving mechanism includes a first movable portion, a fixed portion, and a driving assembly. The first movable portion is movable relative to the fixed portion. The driving assembly is configured to drive the first movable portion to move relative to the fixed portion.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: February 27, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chen-Hsien Fan, Sung-Mao Tsai, Chia-Che Wu, Yueh-Lin Lee
  • Patent number: 11903181
    Abstract: A semiconductor structure includes a substrate comprising a peripheral region and a memory region defined thereon, a first dielectric layer disposed on the substrate, a second dielectric layer disposed on the first dielectric layer, an opening on the peripheral region of the substrate and having a lower portion through the first dielectric layer and an upper portion through the second dielectric layer, an interconnecting structure disposed on the second dielectric layer and two sides of the opening, a contact structure disposed in the lower portion of the opening, and a spacer covering a top surface of the contact structure, a sidewall of the second dielectric layer, and a sidewall of the interconnecting structure.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: February 13, 2024
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wang Jhan, Fu-Che Lee, Gang-Yi Lin, An-Chi Liu, Yifei Yan, Yu-Cheng Tung