Abstract: A semiconductor device includes a substrate and a material disposed on the substrate. The material layer includes plural first patterns arranged parallel and separately in an array within a first region of the substrate, and plural second patterns parallel and separately disposed at two opposite sides of the first patterns, and plural third patterns parallel and separately disposed at another two opposite sides of the first patterns, wherein each of the third patterns has a relative greater dimension than that of each of the first patterns.

Abstract: The present disclosure relates to a semiconductor wafer structure including a semiconductor substrate and a plurality of semiconductor devices disposed along the semiconductor substrate. A dielectric stack including a plurality of dielectric layers is arranged over the semiconductor substrate. A conductive interconnect structure is within the dielectric stack. A seal ring layer is over the dielectric stack and laterally surrounds the dielectric stack along a first sidewall of the dielectric stack. The seal ring layer includes a first protrusion that extends into a first trench in the semiconductor substrate.

Abstract: A patterning method includes the following steps. A mask layer is formed on a material layer. A first hole is formed in the mask layer by a first photolithography process. A first mask pattern is formed in the first hole. A second hole is formed in the mask layer by a second photolithography process. A first spacer is formed on an inner wall of the second hole. A second mask pattern is formed in the second hole after the step of forming the first spacer. The first spacer surrounds the second mask pattern in the second hole. The mask layer and the first spacer are removed. The pattern of the first mask pattern and the second mask pattern are transferred to the material layer by an etching process.

Abstract: A method of making a semiconductor arrangement includes forming a first layer of molecular ions in a first wafer interface region of a first wafer, forming a second layer of molecular ions in a second wafer interface region of a second wafer, forming a first molecular bond connecting the first wafer interface region to the second wafer interface region by applying pressure to at least one of the first wafer or the second wafer in a direction toward the first wafer interface region and the second wafer interface region, and annealing the first wafer and the second wafer to form a second molecular bond connecting the first wafer interface region to the second wafer interface region.

Abstract: This application discloses a method for adjusting image luminance performed at an electronic device. The method includes: determining that an original luminance of a target pixel in an image is lower than a luminance threshold of the image, the luminance threshold being determined according to luminance of pixels in the image; in accordance with the determination: obtaining a luminance distribution intensity of pixels adjacent to the target pixel in the image; determining a luminance difference between the luminance threshold and the luminance distribution intensity of the adjacent pixels; and adjusting the original luminance of the target pixel to a corresponding target luminance according to the luminance difference. By preserving the changing characteristic of relative luminance between the target pixel and the adjacent pixel, the luminance adjustment is more consistent with the luminance distribution of the image, thereby achieving a technical effect of improving the luminance adjustment on an image.

Abstract: A semiconductor structure includes: a substrate; a first passivation layer over the substrate; a second passivation layer over the first passivation layer; and a magnetic core in the second passivation layer, wherein the magnetic core includes a first magnetic material layer and a second magnetic material layer over the first magnetic material layer, the first magnetic material layer and the second magnetic material layer are separated by a high resistance isolation layer, and the high resistance isolation layer has a resistivity greater than about 1.3 ohm-cm.

Abstract: A software agent, that is used to assist in providing a service, receives communications from a set of users that are attempting to use the software agent. The communications include communications that are interacting with the software agent, and communications that are not interacting with the software agent. The software agent performs natural language processing on all communications to identify such things as user sentiment, user concerns or other items in the content of the messages, and also to identify actions taken by the users in order to obtain a measure of user satisfaction with the software agent. One or more action signals are then generated based upon the identified user satisfaction with the software agent.

Abstract: A method of manufacturing contacts is provided in the present invention, which include the steps of forming a plurality of mask bars on a substrate, forming a circular mask surrounding each mask bar, wherein the circular masks connect each other and define a plurality of opening patterns collectively with the mask bars, using the mask bars and the circular masks as etch masks to perform an etch process and to transfer the opening patterns and form a plurality recesses in the substrate, and filling up the recesses with metal to form contacts.

Abstract: In non-limiting examples of the present disclosure, systems, methods and devices for training machine learning models are presented. An automated task framework comprising a plurality of machine learning models for executing a task may be maintained. A natural language input may be processed by two or more of the machine learning models. An action corresponding to a task intent identified from the natural language input may be executed. User feedback related to the execution may be received. The feedback may be processed by a user sentiment engine. A determination may be made by the user sentiment engine that a machine learning model generated an incorrect output. The machine learning model that generated the incorrect output may be identified. The machine learning model that generated the incorrect output may be automatically penalized via training. Any machine learning models that a user expressed neutral or positive sentiment toward may be rewarded.

Abstract: A device for obtaining a newly generated oxygen from an atmospheric environment is disclosed. The device includes a container having an inlet and an outlet, a cathode accommodated in the container and being in contact with an environmental oxygen in the atmospheric environment, an anode accommodated in the container and disposed at a position opposite to the cathode, an electrolyte accommodated in the container and immersing therein the cathode and the anode, a moisture removal unit disposed at the outlet having an outlet position, and a gas permeable element disposed at the outlet, wherein the cathode is disposed at the inlet, and the gas permeable element is disposed at a position closer to the outlet position than the moisture removal unit.

Abstract: A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.

Abstract: A semiconductor memory device includes a substrate, a dielectric layer, plural bit lines, at least one bit line contact, a spacer structure and a spacer layer. The substrate has an isolation area to define plural active areas. The dielectric layer is disposed on the substrate, and the dielectric layer includes a bottom layer having a sidewall being retracted from sidewalls of other layers of the dielectric layer. The plural bit lines are disposed on the dielectric stacked structure, along a direction, and the at least one bit line contact is disposed below one of the bit lines, within the substrate. The spacer structure is disposed at sidewalls of each of the bit lines, and the spacer layer is disposed on the spacer structure to directly in contact with the spacer structure and the other layers of the dielectric layer.

Abstract: A spindle device is mountable with a tool holder, and includes a rotating spindle rotatably mounted to a spindle main body and extending axially to have an axial end surface. A contactless power transmission module is disposed on a flange end surface of the spindle main body and an outer peripheral wall of the rotating spindle for supplying power. An electrically connecting module includes two conductive units each disposed in the rotating spindle and electrically connected with the power transmission module. Each conductive unit has an electrically conductive post extending axially and exposed from the axial end surface for conducting the power to the tool holder.

Abstract: A method includes setting a current level of a write signal to a first non-zero value for a first period of time. The write signal is provided to a memory element during the first period of time. The current level of the write signal is adjusted from the first non-zero value to a second non-zero value, different from the first non-zero value, for a second period of time. The write signal is provided to the memory element during the second period of time. The current level of the write signal is adjusted from the second non-zero value to a third value, different from the first non-zero value and different from the second non-zero value, for a third period of time. The write signal is provided to the memory element during the third period of time.

Abstract: Provided are an integrated circuit (IC) and a method of forming the same. The IC includes a substrate; a conductive layer, disposed on the substrate; a barrier layer, disposed on the conductive layer; an etching stop layer, covering a sidewall of the barrier layer and extending on a first portion of a top surface of the barrier layer; and at least one capacitor structure, disposed on a second portion of the top surface of the barrier layer.

Abstract: A fan frame electrical connector structure is configured for assembling to a motherboard of an electronic device and includes a fan having a frame. The frame is provided with at least one pogo pin connector, which is located at one side of the frame to project into an outer side of the frame. The motherboard of the electronic device is provided at a position corresponding to the pogo pin connector with at least one metal contact, and the pogo pin connector is electrically connected to the metal contact. With the above fan frame electrical connector structure, it is possible to realize automated assembling of the fan to the electronic device motherboard.

Abstract: A fan structure automatically mountable on a system circuit board includes a fan. The fan includes a fan frame main body. A connector connection section is disposed on the fan frame main body for connecting with a fan end connector, whereby the fan end connector can be assembled with the fan frame main body. Accordingly, when the fan is mounted on the system circuit board, the fan end connector can be directly pressed down by means of an automated device to plug into the circuit board end connector. Therefore, the manufacturing process can be automated.

Abstract: A semiconductor device inspection method including: depositing a dielectric material over a substrate to form an interconnect-level dielectric (ILD) layer; patterning the ILD layer to form via structures in the ILD layer; depositing an electrically conductive material to form an inspection layer on the ILD layer and in the via structures; imaging the inspection layer to generate image data; and detecting any defects in the via structures by analyzing the image data.

Abstract: A fan connector structure is applicable to a system circuit board having a circuit board-end connector provided thereon and includes a fan having a fan frame main body and a fan-end connector projected from an outer side of the fan frame main body. The fan-end connector and the fan frame main body can be selectively integrally or non-integrally formed with each other. The fan-end connector is correspondingly connectable to the circuit board-end connector, so as to realize the purpose of automated and quick assembling of the fan to the system circuit board with less labor and time cost.

Abstract: This application discloses a method for adjusting image luminance performed at an electronic device. The method includes: determining a target pixel with original luminance lower than a luminance threshold in an original image, the luminance threshold being determined according to luminance of pixels in the original image; obtaining a luminance distribution intensity of pixels adjacent to the target pixel; determining a difference between the luminance threshold and the luminance distribution intensity of the adjacent pixels; and adjusting the target pixel to corresponding target luminance according to the difference and the original luminance of the target pixel. According to this application, a changing characteristic of relative luminance between the target pixel and the adjacent pixel is reserved. The luminance adjustment is more consistent with the luminance propagation of the original image, thereby achieving a technical effect of improving an adjustment effect of luminance adjustment on an image.