Patents by Inventor Che-An Lee

Che-An Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240080505
    Abstract: A method, comprising: detecting an outage of at least one functionality in a live streaming; performing an first operation toward a second user terminal; storing data of the first operation in a database of the first user terminal; and displaying an effect corresponding to the first operation during the outage. The present disclosure may store the data of operation performed by the user terminal during outage and process the operation after the outage is recovered. Therefore, the streamers and viewers may feel interested and satisfied, instead of feeling anxious, and the user experience may be enhanced.
    Type: Application
    Filed: June 23, 2023
    Publication date: March 7, 2024
    Inventors: Yung-Chi HSU, Hsing-Yu TSAI, Chia-Han CHANG, Yi-Jou LEE, Ming-Che CHENG
  • Patent number: 11925017
    Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
  • Patent number: 11924039
    Abstract: Provided are a system and a method for optimization of network function management and computer readable medium thereof that develop an OAM system architecture compatible with a standard MANO framework set by ETSI, so as to effectively integrate and manage the resources and situation configurations of the network elements (including VNF and CNF) of different manufacturers. Therefore, containment management for various network elements may be flexibly integrated, advantages of the standard MANO framework may be preserved, cost for customized development of various OAM systems and the information transmission therefrom may be reduced, and overall efficiency is increased.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: March 5, 2024
    Assignee: CHUNGHWA TELECOM CO., LTD.
    Inventors: Yuan-Mao Hung, Mao-Yao Lee, Chien-Hua Lee, Shih-Che Chien
  • Publication number: 20240069431
    Abstract: In a method of manufacturing an attenuated phase shift mask, a photo resist pattern is formed over a mask blank. The mask blank includes a transparent substrate, an etch stop layer on the transparent substrate, a phase shift material layer on the etch stop layer, a hard mask layer on the phase shift material layer and an intermediate layer on the hard mask layer. The intermediate layer is patterned by using the photo resist pattern as an etching mask, the hard mask layer is patterned by using the patterned intermediate layer as an etching mask, and the phase shift material layer is patterned by using the patterned hard mask layer as an etching mask. The intermediate layer includes at least one of a transition metal, a transition metal alloy, or a silicon containing material, and the hard mask layer is made of a different material than the intermediate layer.
    Type: Application
    Filed: February 16, 2023
    Publication date: February 29, 2024
    Inventors: Wei-Che HSIEH, Chien-Cheng Chen, Ping-Hsun Lin, Ta-Cheng Lien, Hsin-Chang Lee
  • Publication number: 20240071281
    Abstract: A display device includes a display panel and a circuit. For a first sub-pixel, the circuit obtains a corresponding second sub-pixel. The circuit calculates a first compensation value according to the grays levels of the first sub-pixel and the second sub-pixel, and calculates a second compensation value according to the polarity states of the first sub-pixel and the second sub-pixel and the difference between the gray levels of the two sub-pixels. The circuit also calculates a gain according to the position of the first sub-pixel, compensates the gray level to the first sub-pixel according to the first compensation value, the second compensation value and the gain to obtain an output gray level, and drives the first sub-pixel according to the output gray level.
    Type: Application
    Filed: June 16, 2023
    Publication date: February 29, 2024
    Inventors: Cheng-Hsun LEE, Tsai Hsing CHEN, Cheng Che TSAI, Ching-Wen WANG
  • Patent number: 11914169
    Abstract: An optical member driving mechanism is provided. The optical member driving mechanism is configured to hold an optical member and drive the optical member to move. The optical member driving mechanism includes a first movable portion, a fixed portion, and a driving assembly. The first movable portion is movable relative to the fixed portion. The driving assembly is configured to drive the first movable portion to move relative to the fixed portion.
    Type: Grant
    Filed: January 24, 2020
    Date of Patent: February 27, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chen-Hsien Fan, Sung-Mao Tsai, Chia-Che Wu, Yueh-Lin Lee
  • Patent number: 11903181
    Abstract: A semiconductor structure includes a substrate comprising a peripheral region and a memory region defined thereon, a first dielectric layer disposed on the substrate, a second dielectric layer disposed on the first dielectric layer, an opening on the peripheral region of the substrate and having a lower portion through the first dielectric layer and an upper portion through the second dielectric layer, an interconnecting structure disposed on the second dielectric layer and two sides of the opening, a contact structure disposed in the lower portion of the opening, and a spacer covering a top surface of the contact structure, a sidewall of the second dielectric layer, and a sidewall of the interconnecting structure.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: February 13, 2024
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Yi-Wang Jhan, Fu-Che Lee, Gang-Yi Lin, An-Chi Liu, Yifei Yan, Yu-Cheng Tung
  • Patent number: 11894297
    Abstract: Disclosed are metal-insulator-metal capacitors and integrated chips. In one embodiment, a metal-insulator-metal capacitor includes N electrodes and (N?1) passivation layers, wherein the N electrodes and the (N?1) passivation layers are alternately stacked on a substrate. N is an integer larger than 1. Thicknesses of the N electrodes gradually increase in a direction parallel to a normal direction of the substrate.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: February 6, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: I-Che Lee
  • Publication number: 20240029917
    Abstract: A method for producing a porous structure electrode with gas permeability and liquid impermeability, includes the following steps: Step 1: mixing a catalytic material having hydrophilicity, a carbon nanotube material, a material with a hydrophilic group, and a carbon black material to form a first slurry, wherein the carbon nanotube material has a specific surface area equal to or greater than the carbon black material; Step 2: mixing the first slurry with an emulsified material to form a second slurry; Step 3: obtaining a film material through a film forming process; Step 4: heating the film material to a first temperature to remove solvent in the film material; Step 5: Repeating steps 3 to 4; and Step 6: heating the film material to a second temperature to remove liquid in the film material, thereby leaving pores in the film material, and allowing the film material to solidify.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 25, 2024
    Inventors: Chia-Hung LI, Kuang-Che LEE, Chien-Yao HUANG, Chun-Hsien TSAI, Ting-Chuan LEE, Chun-Jung TSAI
  • Patent number: 11882683
    Abstract: A method of forming a semiconductor memory device, the semiconductor memory device includes a plurality of active areas, a shallow trench isolation, a plurality of trenches and a plurality of gates. The active areas are defined on a semiconductor substrate, and surrounded by the shallow trench isolation. The trenches are disposed in the semiconductor substrate, penetrating through the active areas and the shallow trench isolation, wherein each of the trenches includes a bottom surface and a saddle portion protruded therefrom in each active areas. The gates are disposed in the trenches respectively.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: January 23, 2024
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chien-Ming Lu, Fu-Che Lee, Chien-Cheng Tsai, Chiu-Fang Hsu
  • Patent number: 11862665
    Abstract: A method of forming a semiconductor structure including a metal-insulator-metal (MIM) capacitor includes: forming a stack structure over a substrate, wherein the stack structure includes a plurality of electrode material layers and a plurality of insulating material layers alternately stacked over the substrate; forming a mask layer on the stack structure; and performing a patterning process on the stack structure, so as to form the MIM capacitor comprising alternately stacked electrodes and insulating layers. Performing the patterning process includes: performing a first etching process to remove a first portion of the stack structure exposed by the mask layer; performing a first trimming process on the mask layer to remove a portion of the mask layer, and a first trimmed mask layer is formed; and performing a second etching process to remove a second portion of the stack structure exposed by the first trimmed mask layer.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: I-Che Lee
  • Patent number: 11853694
    Abstract: In non-limiting examples of the present disclosure, systems, methods and devices for resolving temporal ambiguities are presented. A natural language input may be received. A temporal component of the input may be identified. A determination may be made that the temporal component includes a conjunction that separates temporal meeting block alternatives. A temporal ambiguity may be identified in one of the meeting block alternatives. A plurality of syntax tree permutations may be generated for the meeting block alternative where the ambiguity was identified. A machine learning model that has been trained to identify a most relevant permutation for a given natural language input may be applied to each of the plurality of permutations. A temporal meeting block alternative corresponding to the most relevant permutation may be surfaced.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: December 26, 2023
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Pamela Bhattacharya, Barun Patra, Charles Yin-Che Lee
  • Patent number: 11856793
    Abstract: A memory array and a method for forming the memory array are disclosed. The memory array includes memory elements, selectors and conductive vias. Each selector includes two pairs of fin structures. The conductive vias are electrically coupled to the two pairs of fin structures of the selectors.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: I-Che Lee, Huai-Ying Huang
  • Publication number: 20230412549
    Abstract: Systems and methods are directed to email threading based on machine learning determined categories and features. A network system accesses a plurality of emails addressed to a user. The network system then classifies, using a machine learning model, each email into at least one of a plurality of categories. For a category of the plurality of categories, one or more feature values are extracted from each email in the category. Based on the category and the extracted feature values, the network system groups messages having a same feature value in the same category together into a single email thread. Information related to the single email thread is then presented at a client device of the user.
    Type: Application
    Filed: June 21, 2022
    Publication date: December 21, 2023
    Inventors: Charles Yin-Che LEE, Victor POZNANSKI
  • Publication number: 20230411227
    Abstract: Some implementations described herein provide techniques and apparatuses for polishing a perimeter region of a semiconductor substrate so that a roll-off profile at or near the perimeter region of the semiconductor substrate satisfies a threshold. The described implementations include depositing a first layer of a first oxide material across the semiconductor substrate followed by depositing a second layer of a second oxide material over the first layer of the first oxide material and around a perimeter region of the semiconductor substrate. The described implementations further include polishing the second layer of the second oxide material over the perimeter region using a chemical mechanical planarization tool including one or more ring-shaped polishing pads oriented vertically over the perimeter region.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 21, 2023
    Inventors: I-Nan. CHEN, Kuo-Ming WU, Ming-Che LEE, Hau-Yi HSIAO, Yung-Lung LIN, Che Wei YANG, Sheng-Chau CHEN
  • Publication number: 20230395640
    Abstract: Various embodiments of the present disclosure are directed towards a pixel sensor. The pixel sensor includes a substrate having a front-side opposite a back-side. An image sensor element comprises an active layer disposed within the substrate, where the active layer comprises germanium. An anti-reflective coating (ARC) structure overlies the back-side of the substrate. The ARC structure includes a first dielectric layer overlying the back-side of the substrate, a second dielectric layer overlying the first dielectric layer, and a third dielectric layer overlying the second dielectric layer. A first index of refraction of the first dielectric layer is less than a second index of refraction of the second dielectric layer, and a third index of refraction of the third dielectric layer is less than the first index of refraction.
    Type: Application
    Filed: August 4, 2023
    Publication date: December 7, 2023
    Inventors: Cheng-Hsien Chou, Sheng-Chau Chen, Ming-Che Lee
  • Publication number: 20230386941
    Abstract: Costs may be avoided and yields improved by applying scanning probe microscopy to substrates in the midst of an integrated circuit fabrication process sequence. Scanning probe microscopy may be used to provide conductance data. Conductance data may relate to device characteristics that are normally not available until the conclusion of device manufacturing. The substrates may be selectively treated to ameliorate a condition revealed by the data. Some substrates may be selectively discarded based on the data to avoid the expense of further processing. A process maintenance operation may be selectively carried out based on the data.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 30, 2023
    Inventors: I-Che Lee, Huai-Ying Huang
  • Publication number: 20230385778
    Abstract: Various embodiments are directed to automatically determining when meetings are related to each other. The relationship between meetings may be stored in a meeting-oriented knowledge graph that can be analyzed to provide meeting analytics. Various technologies can leverage the meeting relationship information to provide improved meeting services to users. For example, meeting suggestions may be presented to a user with suggested meeting parameters (e.g., suggested attendees, suggested location, suggested topic) that are accurate because a relationship between meetings is used to predict the parameters. The information in the meeting-oriented knowledge graph can be used to generate various analytics and visualizations that help users plan or prepare for meetings.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Warren David JOHNSON, III, Yuchen LI, Charles Yin-Che LEE
  • Patent number: 11832380
    Abstract: A fan structure automatically mountable on a system circuit board includes a fan. The fan includes a fan frame main body. A connector connection section is disposed on the fan frame main body for connecting with a fan end connector, whereby the fan end connector can be assembled with the fan frame main body. Accordingly, when the fan is mounted on the system circuit board, the fan end connector can be directly pressed down by means of an automated device to plug into the circuit board end connector. Therefore, the manufacturing process can be automated.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: November 28, 2023
    Assignee: ASIA VITAL COMPONENTS CO., LTD.
    Inventors: Sung-Wei Sun, Ming-Che Lee
  • Publication number: 20230373242
    Abstract: A hub device is provided, including: a hub shell, defining an axial direction, including a room and a projection, the room having an opening open in the axial direction, an inner wall of the room being integrally connected with the projection, the room further including an annular toothed portion, the projection projecting radially within the room; and a ratchet ring, including an outer toothed portion and an engaging slot corresponding to the projection, the ratchet ring being disposing in the room, the outer toothed portion being engaged with the annular toothed portion so that the ratchet ring is rotatable with the hub shell, the engaging slot being disposed on the ratchet ring, the projection being engaged radially within the engaging slot and abutted radially against the hub shell.
    Type: Application
    Filed: May 20, 2022
    Publication date: November 23, 2023
    Inventor: Chung-Che LEE