Patents by Inventor Chen Chu

Chen Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230291391
    Abstract: A transmitter circuit is provided. The transmitter circuit has a first transmission node and a second transmission node and includes a first resistor, a second resistor, a third resistor, a fourth resistor, and a driving circuit. The driving circuit includes a first transistor group, a second transistor group, a third transistor group, and a fourth transistor group. The first resistor is coupled between a first output terminal and the first transmission node. The second resistor is coupled between a second output terminal and the second transmission node. The third resistor is coupled between a third output terminal and the first transmission node. The fourth resistor is coupled between a fourth output terminal and the second transmission node. The first, second, third, and fourth transistor groups are coupled to a first and a second reference voltages and electrically connected to the first, second, third, and fourth output terminals, respectively.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 14, 2023
    Inventors: HUNG-CHEN CHU, CHIEN-HUI TSAI, YUNG-TAI CHEN
  • Publication number: 20230282571
    Abstract: The present disclosure relates to an integrated chip that includes a substrate, a first metal line, and a hybrid metal line. The first metal line includes a first metal material and is within a first interlayer dielectric (ILD) layer over the substrate. The hybrid metal line is also within the first ILD layer. The hybrid metal line includes a pair of first metal segments that comprise the first metal material. The hybrid metal line further includes a second metal segment that comprises a second metal material that is different from the first metal material. The second metal segment is laterally between the pair of first metal segments.
    Type: Application
    Filed: May 8, 2023
    Publication date: September 7, 2023
    Inventors: Pokuan Ho, Chia-Tien Wu, Hsin-Ping Chen, Wei-Chen Chu
  • Patent number: 11749696
    Abstract: An optical apparatus includes: a substrate having a first material; an absorption region having a second material different from the first material, the absorption region configured to absorb photons and to generate photo-carriers including electrons and holes in response to the absorbed photons; a first well region surrounding the absorption region and arranged between the absorption region and the substrate, the first well region being doped with a first polarity; and one or more switches each controlled by a respective control signal, the one or more switches each configured to collect at least a portion of the photo-carriers based on the respective control signal and to provide the portion of the photo-carriers to a respective readout circuit.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: September 5, 2023
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Che-Fu Liang, Szu-Lin Cheng, Shu-Lu Chen, Kuan-Chen Chu, Chung-Chih Lin, Han-Din Liu
  • Publication number: 20230275018
    Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a first interconnect layer over a substrate, the first interconnect layer including a first conductive feature and a second conductive feature, forming a patterned mask on the first interconnect layer, one or more openings in the patterned mask overlaying the second conductive feature, recessing the second conductive feature through the one or more openings in the patterned mask, and forming a second interconnect layer over the first interconnect layer. The second interconnect layer includes a first via in contact with the first conductive feature and a second via in contact with the second conductive feature.
    Type: Application
    Filed: June 4, 2022
    Publication date: August 31, 2023
    Inventors: Chia-Tien Wu, Wei-Chen Chu, Yu-Chieh Liao, Hsin-Ping Chen
  • Patent number: 11742832
    Abstract: A transmission-end impedance matching circuit operates according to a signal of an overvoltage signal source and includes a first level shifter, a voltage generating circuit, and an impedance matching circuit. The first level shifter generates a first conversion voltage according to a source signal and operates between a first high voltage and a ground voltage. The voltage generating circuit generates a second high voltage according to the first conversion voltage, the first high voltage, and a medium voltage. The impedance matching circuit includes a second level shifter, a transistor, and two resistors. The second level shifter generates a gate voltage according to the second high voltage, a low voltage, and an input signal. The transistor is turned on/off according to the gate voltage and has a withstand voltage lower than the first high voltage. Each of the two resistors is coupled between the transistor and a differential signal transmission end.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: August 29, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chien-Hui Tsai, Hung-Chen Chu, Yung-Tai Chen
  • Patent number: 11734946
    Abstract: A fingerprint sensing module includes a first substrate, an active device, a photosensitive element layer, a collimation structure layer, a second substrate, a plurality of micro lenses, and a spacer pattern. The active device is disposed on the first substrate. The photosensitive element layer is disposed on the first substrate and is electrically connected to the active device. The collimation structure layer is disposed on the photosensitive element layer. The second substrate is disposed on the collimation structure layer. The micro lenses are disposed on a surface of the collimation structure layer facing away from the photosensitive element layer, and overlap the photosensitive element layer. The micro lenses are divided into a plurality of microlens groups, and the microlens groups are respectively located in a plurality of sensing pixel areas of the fingerprint sensing module. The spacer pattern extends between the microlens groups.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: August 22, 2023
    Assignee: Au Optronics Corporation
    Inventors: Chao-Chien Chiu, Shuo-Hong Wang, Shih-Hua Lu, Hsun-Chen Chu, Yan-Liang Chen
  • Publication number: 20230262968
    Abstract: A semiconductor device and a method of operating the same are provided. The semiconductor device includes a transistor and a fuse structure electrically connected to the transistor. The fuse structure includes a first fuse element, a second fuse element, and a fuse medium. The second fuse element at least partially overlaps the first fuse element. The fuse medium connects the first fuse element and the second fuse element. The fuse medium includes an electrically conductive material.
    Type: Application
    Filed: February 15, 2022
    Publication date: August 17, 2023
    Inventors: HSIANG-WEI LIU, WEI-CHEN CHU, CHIA-TIEN WU
  • Patent number: 11729969
    Abstract: A semiconductor device and a method of operating the same are provided. The semiconductor device includes a transistor and a fuse structure electrically connected to the transistor. The fuse structure includes a first fuse element, a second fuse element, and a fuse medium. The second fuse element at least partially overlaps the first fuse element. The fuse medium connects the first fuse element and the second fuse element. The fuse medium includes an electrically conductive material.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsiang-Wei Liu, Wei-Chen Chu, Chia-Tien Wu
  • Publication number: 20230229055
    Abstract: An electronic paper display device includes an upper supporting layer, a lower supporting layer, and an electronic ink layer. The lower supporting layer is opposite to the upper supporting layer. At least one of the upper supporting layer and the lower supporting layer has a thickness in a range from 1 ?m to 50 ?m and has a storage modulus in a range from 1 kPa to 100 kPa in 0° C. to 70° C. The electronic ink layer is located between the upper supporting layer and the lower supporting layer.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 20, 2023
    Inventors: Yi-Sheng LIN, Chia-Chun YEH, Chen-Chu TSAI
  • Patent number: 11703738
    Abstract: An electronic apparatus includes a flexible display device and a roller. The flexible display device includes a driving substrate, a display layer on the driving substrate, and a front protective layer covering the display layer. The flexible display device has an end portion fixed to the roller. The roller includes a holding groove, a receiving slot, and a retraction assembly. The holding groove is recessed from an external surface of the roller. The end portion is in the holding groove. The flexible display device further includes a main body portion outside the holding groove. A thickness of the end portion is less than a thickness of the main body portion. The receiving slot is recessed from the external surface. The retraction assembly is disposed in the receiving slot. When the retraction assembly abuts against the flexible display device, the retraction assembly is pressed into the receiving slot.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: July 18, 2023
    Assignee: E Ink Holdings Inc.
    Inventors: Hsing-Kai Wang, Chen-Chu Tsai, Chia-Chun Yeh, Yi-Sheng Lin
  • Publication number: 20230216493
    Abstract: An output stage of an Ethernet transmitter is provided. The output stage is coupled to a resistor and includes a first output terminal, a second output terminal, a first transistor, and a first transistor group. The resistor is coupled between the first output terminal and the second output terminal. The first transistor has a first source, a first drain, and a first gate, the first source being coupled to a first reference voltage and the first drain being coupled to the second output terminal. The first transistor group is coupled to the first reference voltage and the first output terminal. The first transistor group includes multiple transistors which are connected in parallel, and the magnitude of the current flowing to the first output terminal is related to the number of transistors that are turned on.
    Type: Application
    Filed: December 5, 2022
    Publication date: July 6, 2023
    Inventors: CHIEN-HUI TSAI, HUNG-CHEN CHU, YUNG-TAI CHEN
  • Publication number: 20230216460
    Abstract: A transmitter circuit is provided. The transmitter circuit has an input port, a first transmission node, a second transmission node, a third transmission node, and a fourth transmission node and includes a first operational amplifier, a first output stage, a first resistor-capacitor network, a first switch group coupled between the first resistor-capacitor network and the input port, a first impedance matching circuit coupled to the first output stage, the first transmission node, and the second transmission node, a second operational amplifier, a second output stage, a second resistor-capacitor network, a second switch group coupled between the second resistor-capacitor network and the input port, and a second impedance matching circuit coupled to the second output stage, the third transmission node, and the fourth transmission node.
    Type: Application
    Filed: December 5, 2022
    Publication date: July 6, 2023
    Inventors: Chien-Hui TSAI, Hung-Chen CHU, Yung-Tai CHEN, Sheng-Yang HO
  • Publication number: 20230215902
    Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.
    Type: Application
    Filed: March 15, 2023
    Publication date: July 6, 2023
    Inventors: Yun-Chung Na, Che-Fu Liang, Shu-Lu Chen, Szu-Lin Cheng, Han-Din Liu, Chien-Lung Chen, Yuan-Fu Lyu, Chieh-Ting Lin, Bo-Jiun Chen, Hui-Wen Chen, Shu-Wei Chu, Chung-Chih Lin, Kuan-Chen Chu
  • Patent number: 11694466
    Abstract: A biometric verification device includes a backlight module, a photodetector, a switching element, and at least one collimation structure. The photodetector is disposed on the backlight module. The switching element is disposed on the backlight module and electrically connected with the photodetector. The at least one collimation structure is disposed on the backlight module and has a first pinhole and a second pinhole. The horizontal projections of the first pinhole and the second pinhole on the backlight module do not overlap with the horizontal projection of the photodetector on the backlight module.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: July 4, 2023
    Assignee: Au Optronics Corporation
    Inventor: Hsun-Chen Chu
  • Publication number: 20230205036
    Abstract: A flexible display device includes a thin-film transistor (TFT) array substrate, a cover film, an electronic ink layer, an edge sealant, an electrode layer, and a reinforcement layer. The electronic ink layer is located between the TFT array substrate and the cover film. The edge sealant is located between the TFT array substrate and the cover film and surrounds the electronic ink layer. The edge sealant defines a packaging area that vertically overlaps the edge sealant. The electrode layer is located on the electronic ink layer. The reinforcement layer is disposed along the packaging area.
    Type: Application
    Filed: October 31, 2022
    Publication date: June 29, 2023
    Inventors: Yi-Sheng LIN, Chia-Chun YEH, Chen-Chu TSAI
  • Patent number: 11682618
    Abstract: The present disclosure relates to an integrated chip that includes a substrate, a first metal line, and a hybrid metal line. The first metal line includes a first metal material and is within a first interlayer dielectric (ILD) layer over the substrate. The hybrid metal line is also within the first ILD layer. The hybrid metal line includes a pair of first metal segments that comprise the first metal material. The hybrid metal line further includes a second metal segment that comprises a second metal material that is different from the first metal material. The second metal segment is laterally between the pair of first metal segments.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pokuan Ho, Chia-Tien Wu, Hsin-Ping Chen, Wei-Chen Chu
  • Patent number: 11663987
    Abstract: A display apparatus including a display panel and a display driver is provided. The display driver is coupled to the display panel. The display driver is configured to drive the display panel by at least one of a plurality of gray levels to display an image frame in a first state. The display driver is configured to drive the display panel by a predetermined gray level to display a standby frame in a second state. The display driver determines the predetermined gray level of the standby frame according to the gray levels of the image frame. In addition, a driving method of a display apparatus is also provided.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: May 30, 2023
    Assignee: E Ink Holdings Inc.
    Inventors: Yi-Sheng Lin, Chen Chu Tsai, Chia-Chun Yeh
  • Patent number: 11647344
    Abstract: A hearing device is disclosed, comprising a main microphone, M auxiliary microphones, a transform circuit, a processor, a memory and a post-processing circuit. The transform circuit transforms first sample values in current frames of a main audio signal and M auxiliary audio signals from the microphones into a main and M auxiliary spectral representations. The memory includes instructions to be executed by the processor to perform operations comprising: performing ANC over the first sample values using an end-to-end neural network to generate second sample values; and, performing audio signal processing over the main and the M auxiliary spectral representations using the end-to-end neural network to generate a compensation mask. The post-processing circuit modifies the main spectral representation with the compensation mask to generate a compensated spectral representation, and generates an output audio signal according to the second sample values and the compensated spectral representation.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: May 9, 2023
    Assignee: BRITISH CAYMAN ISLANDS INTELLIGO TECHNOLOGY INC.
    Inventors: Ting-Yao Chen, Chen-Chu Hsu, Yao-Chun Liu, Tsung-Liang Chen
  • Patent number: 11637142
    Abstract: A circuit, including: a photodetector including a first readout terminal and a second readout terminal different than the first readout terminal; a first readout circuit coupled with the first readout terminal and configured to output a first readout voltage; a second readout circuit coupled with the second readout terminal and configured to output a second readout voltage; and a common-mode analog-to-digital converter (ADC) including: a first input terminal coupled with a first voltage source; a second input terminal coupled with a common-mode generator, the common-mode generator configured to receive the first readout voltage and the second readout voltage, and to generate a common-mode voltage between the first and second readout voltages; and a first output terminal configured to output a first output signal corresponding to a magnitude of a current generated by the photodetector.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: April 25, 2023
    Assignee: Artilux, Inc.
    Inventors: Yun-Chung Na, Che-Fu Liang, Shu-Lu Chen, Szu-Lin Cheng, Han-Din Liu, Chien-Lung Chen, Yuan-Fu Lyu, Chieh-Ting Lin, Bo-Jiun Chen, Hui-Wen Chen, Shu-Wei Chu, Chung-Chih Lin, Kuan-Chen Chu
  • Publication number: 20230067527
    Abstract: A semiconductor structure includes a substrate, a dielectric layer, a first conductive feature and a second conductive feature. The substrate includes a semiconductor device. The dielectric layer is disposed on the substrate. The first conductive feature is formed in the first dielectric layer. The second conductive feature penetrates the first conductive feature and the dielectric layer, and is electrically connected to the first conductive feature and the semiconductor device.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chen CHU, Chia-Tien WU, Chia-Wei SU, Yu-Chieh LIAO, Chia-Chen LEE, Hsin-Ping CHEN, Shau-Lin SHUE