Patents by Inventor Chen Liang

Chen Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160366256
    Abstract: A wearable electronic device includes a device body having a wireless communication module, a wearing unit connected to the device body for being worn on a user, an antenna module entirely embedded inside the wearing unit, and a conductive unit is partially disposed in the wearing unit and electrically connected to the antenna module and the wireless communication module.
    Type: Application
    Filed: September 25, 2015
    Publication date: December 15, 2016
    Applicant: QUANTA COMPUTER INC.
    Inventors: Yuan-Chen LIANG, Cheng-Hao WU, Chi-Cheng WU, Hsuan-Hao HSU
  • Publication number: 20160354053
    Abstract: A system for recognizing physiological sound comprises a receiving module, a feature extracting module, a classifier, and a comparing module. A method for recognizing physiological sound comprises receiving a physiological sound by the receiving module; extracting at least one feature from the physiological sound by the feature extraction module; classifying the at least one feature to identify at least one category by a classifier; and comparing the at least one category with a normal physiological sound and/or an abnormal physiological sound by the comparing module for evaluating a risk of disease. The method and system for recognizing physiological sound can precisely identify the specific physiological sound and exclude the noise.
    Type: Application
    Filed: June 3, 2015
    Publication date: December 8, 2016
    Inventors: Kun-Hsi TSAI, Yu TSAO, Shih-Hsuan KU, Tzu-Chen LIANG, Yun-Fan CHANG, Shih-I YANG
  • Publication number: 20160359010
    Abstract: The semiconductor device structures and methods for forming the same are provided. The semiconductor device structure includes a metal gate over a substrate. A first spacer is formed over sidewalls of the metal gate and having a first height. A second spacer is formed over the sidewalls of the metal gate and having a second height. The first height is higher than the second height. The first spacer is farther from the sidewalls of the metal gate than the second spacer. In addition, the semiconductor device structure includes a dielectric layer formed over the substrate to surround the first spacer and the metal gate.
    Type: Application
    Filed: August 22, 2016
    Publication date: December 8, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO.,LTD.
    Inventors: Chen-Liang LIAO, Chih-Hsiao CHEN, Yi-lii HUANG, Yao-Yu LI
  • Patent number: 9466681
    Abstract: The present disclosure provides an apparatus and method for fabricating a semiconductor gate. The apparatus includes, a substrate having an active region and a dielectric region that forms an interface with the active region; a gate electrode located above a portion of the active region and a portion of the dielectric region; and a dielectric material disposed within the gate electrode, the dielectric material being disposed near the interface between the active region and the dielectric region. The method includes, providing a substrate having an active region and a dielectric region that forms an interface with the active region; forming a gate electrode over the substrate, the gate electrode having an opening near a region of the gate electrode that is above the interface; and filling the opening with a dielectric material.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: October 11, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Liang Chu, Fei-Yun Chen, Chih-Wen Albert Yao
  • Patent number: 9439524
    Abstract: An anti-spray drinking bottle has a body, a lid, at least one check valve, a dividing mount and a guiding element. The body has a storage recess and a screwing section. The lid is detachably connected to the body and has a threaded segment connected to the screwing section, a buffering segment connected to the threaded segment and a buffering space formed in the buffering segment. The at least one check valve is mounted on the lid. The dividing board is connected to the lid, is mounted in the body and has a dividing board, a sidewall, an outlet pipe and an abutting segment. The guiding element is connected to the dividing mount, is mounted in the body and has an elongate straw tube connected to the outlet pipe.
    Type: Grant
    Filed: November 3, 2014
    Date of Patent: September 13, 2016
    Inventor: Hsiao-Chen Liang
  • Patent number: 9437494
    Abstract: A semiconductor arrangement and method of formation are provided. A method of semiconductor formation includes using a single photoresist to mask off an area where low voltage devices are to be formed as well as gate structures of high voltage devices while performing high energy implants for the high voltage devices. Another method of semiconductor fabrication includes performing high energy implants for high voltage devices through a patterned photoresist where the photoresist is patterned prior to forming gate structures for high voltage devices and prior to forming gate structures for low voltage devices. After the high energy implants are performed, subsequent processing is performed to form high voltage devices and low voltage devices. High voltage device and low voltage devices are thus formed in a CMOS process without need for additional masks.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: September 6, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Alexander Kalnitsky, Kong-Beng Thei, Chien-Chih Chou, Chen-Liang Chu, Hsiao-Chin Tuan
  • Patent number: 9435991
    Abstract: System and method for correcting a topography of an object being imaged by a multi-array microscope system. The object is forced to conform to a surface of the substrate supporting the object with a suction force and the topography of the chosen object surface is determined. The supporting substrate is bent with the use of force applied to the substrate with at least one actuator such as to reduce the deviations of the determined topography of the object's surface from a pre-determined reference surface by transferring the changes in the curvature of the supporting substrate to the object. In particular, the chosen surface of the object can be substantially flattened for ease of simultaneous imaging of this surface with multiple objectives of the multi-array microscope.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 6, 2016
    Assignee: DMetrix, Inc.
    Inventors: Pixuan Zhou, Chen Liang
  • Patent number: 9434051
    Abstract: An abrasive article comprising a nonwoven substrate material having a top surface and a bottom surface; a woven cloth; a thermoplastic fastener; and a plurality of abrasive particles, wherein the cloth layer is adhered to the top surface of the nonwoven substrate material; wherein the thermoplastic fastener is disposed on the cloth, and wherein the plurality of abrasive particles are disposed on at least the bottom surface of the nonwoven abrasive substrate.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: September 6, 2016
    Assignees: Saint-Gobain Abrasives, Inc., Saint-Gobain Abrasifs
    Inventors: Shyiguei Hsu, Dan M. Villareal, Julienne C. LaBrecque, Scott Kilinski, Vivek Cheruvari Kottieth Raman, Anuj Seth, Jane Chen-Liang, Fernando J. Ramirez, Victor D. Perez
  • Publication number: 20160254170
    Abstract: A method of cleaning a wafer in semiconductor fabrication is provided. The method includes cleaning a wafer using a wafer scrubber. The method further includes moving the wafer scrubber into an agitated cleaning fluid. The method also includes creating a contact between the wafer scrubber and a cleaning stage in the agitated cleaning fluid. In addition, the method includes cleaning the wafer or a second wafer by the wafer scrubber after the wafer scrubber is cleaned by the agitated cleaning fluid.
    Type: Application
    Filed: February 26, 2015
    Publication date: September 1, 2016
    Inventors: Chien-Chun HU, Chen-Liang CHANG, Ju-Ru HSIEH, Po-Chia CHEN, Shun-Yu CHUANG, Wei-Tuzo LIN
  • Patent number: 9425274
    Abstract: The semiconductor device structures and methods for forming the same are provided. The semiconductor device structure includes a metal gate over a substrate. A first spacer is formed over sidewalls of the metal gate and having a first height. A second spacer is formed over the sidewalls of the metal gate and having a second height. The first height is higher than the second height. The first spacer is farther from the sidewalls of the metal gate than the second spacer. In addition, the semiconductor device structure includes a dielectric layer formed over the substrate to surround the first spacer and the metal gate.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: August 23, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chen-Liang Liao, Chih-Hsiao Chen, Yi-Lii Huang, Yao-Yu Li
  • Patent number: 9411320
    Abstract: An intelligent watch includes a main body, a trigger switch, an inner-ring body and an outer-ring body. The trigger switch is disposed in the main body. The inner-ring body is pressably engaged on the main body to be pressed for trigger the trigger switch. The outer-ring body is rotatably engaged on the main body and surrounds the inner-ring body.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: August 9, 2016
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yuan-Chen Liang, Cheng-Hao Wu, Ya-Chu Chuang, Chi-Cheng Wu, Hsuan-Hao Hsu
  • Publication number: 20160203984
    Abstract: The semiconductor device structures and methods for forming the same are provided. The semiconductor device structure includes a metal gate over a substrate. A first spacer is formed over sidewalls of the metal gate and having a first height. A second spacer is formed over the sidewalls of the metal gate and having a second height. The first height is higher than the second height. The first spacer is farther from the sidewalls of the metal gate than the second spacer. In addition, the semiconductor device structure includes a dielectric layer formed over the substrate to surround the first spacer and the metal gate.
    Type: Application
    Filed: March 21, 2016
    Publication date: July 14, 2016
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen-Liang LIAO, Chih-Hsiao CHEN, Yi-Lii HUANG, Yao-Yu LI
  • Publication number: 20160188590
    Abstract: Generally discussed herein are systems, apparatuses, and methods for organizing and/or searching news events. In one or more embodiments, a method can include encoding a news event based on named entities, actors, and actions mentioned in the news event, calculating a locality sensitive hash (LSH) key on the news event encoding, comparing the calculated LSH key to a plurality of LSH keys of respective stories, wherein each story of the respective stories comprises one or more associated news events that include LSH keys that are within a specified distance from each other, and associating the news event with a story of the respective stories that includes an LSH key that has a smallest distance from the LSH key of the received news event and is less than the specified distance.
    Type: Application
    Filed: December 29, 2014
    Publication date: June 30, 2016
    Inventors: Robert J. Cole, Brian J. Simpson, Lee Giles, Zhaohui Wu, Chen Liang
  • Patent number: 9349817
    Abstract: Embodiments of the disclosure provide semiconductor device structures and methods of forming the same. The semiconductor device structure includes a metal gate over a substrate. A first spacer is formed over sidewalls of the metal gate and having a first height. A second spacer is formed over the sidewalls of the metal gate and having a second height. The first height is higher than the second height. The first spacer is farther from the sidewalls of the metal gate than the second spacer. In addition, the semiconductor device structure includes a dielectric layer formed over the substrate to surround the first spacer and the metal gate.
    Type: Grant
    Filed: February 3, 2014
    Date of Patent: May 24, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chen-Liang Liao, Chih-Hsiao Chen, Yi-Lii Huang, Yao-Yu Li
  • Patent number: 9343465
    Abstract: Some embodiments of the present disclosure are directed to an embedded flash (e-flash) memory device that includes a flash memory cell and a metal-oxide-semiconductor field-effect transistor (MOSFET). The flash memory cell includes a control gate disposed over a floating gate. The MOSFET includes a logic gate disposed over a gate dielectric. The floating gate and a first gate layer of the logic gate are simultaneously formed with a first polysilicon layer. A high temperature oxide (HTO) is then formed over the floating gate with a high temperature process, while the first gate layer protects the gate dielectric from degradation effects due to the high temperature process. A second gate layer of the logic gate is then formed over the first gate layer by a second polysilicon layer. The first and second gate layers collectively form a logic gate of the MOSFET.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: May 17, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Liang Chu, Ruey-Hsin Liu, Chih-Wen Albert Yao, Ming-Ta Lei
  • Publication number: 20160135260
    Abstract: A switch circuit for light-emitting diode is provided. The switch circuit includes a power module, a light-emitting diode module, an inductor, a first switch, a second switch and a capacitor. When the input voltage of the power module is higher than the forward bias voltage of the light-emitting diode module, the first switch is switched repeatedly and the second switch is turned off, so that the power supply can charge the inductor and/or the capacitor. When the input voltage of the power module and the storage voltage of the capacitor both are lower than the forward bias voltage of the light-emitting diode module, the first switch and the second switch are controlled to switch repeatedly and synchronously, so that the power energy of the power module or the discharge energy of the capacitor can be used to continuously charge the inductor.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 12, 2016
    Inventors: Pin CHANG, Wei-Chen LIANG
  • Publication number: 20160120343
    Abstract: An anti-spray drinking bottle has a body, a lid, at least one check valve, a dividing mount and a guiding element. The body has a storage recess and a screwing section. The lid is detachably connected to the body and has a threaded segment connected to the screwing section, a buffering segment connected to the threaded segment and a buffering space formed in the buffering segment. The at least one check valve is mounted on the lid. The dividing board is connected to the lid, is mounted in the body and has a dividing board, a sidewall, an outlet pipe and an abutting segment. The guiding element is connected to the dividing mount, is mounted in the body and has an elongate straw tube connected to the outlet pipe.
    Type: Application
    Filed: November 3, 2014
    Publication date: May 5, 2016
    Inventor: Hsiao-Chen LIANG
  • Publication number: 20160118560
    Abstract: A light emitting diode module structural and a manufacturing method thereof are disclosed. The manufacturing method includes the steps as follows. A base and a light emitting diode die are provided. The light emitting diode die may include a first semiconductor layer and a second semiconductor layer. The light emitting diode die is disposed on the base. A buffer layer is formed to cover the light emitting diode die. A first opening and a second opening are formed on the first semiconductor layer and the second semiconductor layer, respectively. The second opening exposes the second semiconductor layer by penetrating the first semiconductor layer. A conductive pattern layer is formed on the buffer layer, and is electrically connected with the first semiconductor layer and the second semiconductor layer via the first opening and the second opening, respectively.
    Type: Application
    Filed: March 16, 2015
    Publication date: April 28, 2016
    Inventors: WEI-CHEN LIANG, PIN CHANG
  • Patent number: 9323038
    Abstract: A method for object preparation for imaging with an array microscope system without scanning. Artifact-free image is formed based on scanning-free imaging of an object array formed from spatially-separated portions of the initially spatially-continuous object that are arranged, in the object plane of the array microscope, in a pattern associated with an array of individual objectives of the array microscope. The size of an individual portion of the object does not exceed the size of a FOV of the individual objective defined in the object plane.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: April 26, 2016
    Assignee: DMetrix, Inc.
    Inventors: Pixuan Zhou, Chen Liang
  • Patent number: 9324864
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes an isolation structure positioned in the semiconductor substrate and adjacent to a first active region of the semiconductor substrate. The semiconductor device structure includes a gate stack disposed over the first active region. The semiconductor device structure includes a first contact structure disposed over the first active region and positioned between the isolation structure and the gate stack. The semiconductor device structure includes a dummy gate stack disposed over the isolation structure and adjacent to the gate stack. The dummy gate stack is not positioned over a portion of the isolation structure next to the first contact structure.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: April 26, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Yao Liang, Chen-Liang Liao, Ming Lei, Chih-Hsiao Chen, Yi-Lii Huang