Abstract: A system for the integral chlorine dioxide production with relatively independent sodium chlorate electrolytic production and chlorine dioxide production is provided. The system may feed electrolyte solution into a solid-liquid filter, filtering out the crystal and eliminating sodium chloride and sodium dichromate. The sodium chlorate crystal may be fed into a chlorine dioxide generator after dissolving, while sodium chloride and sodium dichromate solution separately return to electrolyzer for electrolysis process. Sodium chloride may be constantly formed as a by-product in the chlorine dioxide production unit, and solution containing the sodium chloride is withdrawn from the generator and, after filtration, washing and dissolution, recycled back to sodium chlorate production unit. This way, there is no need of sodium chloride make-up.

Abstract: The invention provides a sulfur doping method for graphene, which comprises the steps of: 1) providing graphene and placing the grapheme in a chemical vapor deposition reaction chamber; 2) employing an inert gas to perform ventilation and exhaust treatment in the reaction chamber; 3) introducing a sulfur source gas to perform sulfur doping on the graphene at 500-1050° C.; and 4) cooling the reaction chamber in a hydrogen and inert gas atmosphere. The present invention can perform sulfur doping on the graphene simply and efficiently, the economic cost is low, and large-scale production can be realized. Large area sulfur doping on graphene can be realized, and doping of graphene on an insulating substrate or metal substrate can be carried out directly.

Abstract: A method of forming a semiconductor structure includes; (i) forming an isolation structure in a semiconductor substrate, the isolation structure electrically isolating device regions of the semiconductor substrate; (ii) forming a gate structure extending from one of the device regions to the isolation structure; (iii) forming a resist protective oxide layer overlaying the gate structure and the isolation structure; and (iv) patterning the resist protective oxide layer to form a patterned resist protective oxide that covers at least a portion of the isolation structure and a portion of the gate structure on the isolation structure.

Abstract: A semiconductor structure is disclosed. The semiconductor structure includes: a substrate of a first conductivity; a first region of the first conductivity formed in the substrate; a second region of the first conductivity formed in the first region, wherein the second region has a higher doping density than the first region; a source region of a second conductivity formed in the second region; a drain region of the second conductivity formed in the substrate; a pickup region of the first conductivity formed in the second region and adjacent to the source region; and a resist protective oxide (RPO) layer formed on a top surface of the second region. An associated fabricating method is also disclosed.

Abstract: A cross-cut tester includes a handle with a receiving cavity, and a plurality of blades received in the receiving cavity. One end of the handle defines an opening. The cross-cut tester further includes a plurality of gaskets received in the receiving cavity. The gaskets and the blades are positioned one-by-one, and are detachably fixed in the receiving cavity. The cross-cut tester of the present disclosure can effectively improve the efficiency of drawing lines and reduce the cost.

Abstract: A robot control system on a platform which can carry target objects employs a coordinate system including X, Y, and Z axes. A plane including the X and Y axis is parallel with a panel including the platform. After the coordinate system is created, a reminder is displayed and a guiding tool is placed in a position on the platform where the target objects are located, and a fastening tool for use with the guiding tool is arranged on hand of the robot. A location of the fastening tool relative to the guiding tool is adjusted according to a predefined rule. When the location of the fastening tool relative to the guiding tool is correctly adjusted, a position of the end effect of the robot is determined according to the location of the fastening tool and the relevant coordinates are stored as data.

Abstract: A system for recognizing physiological sound comprises a receiving module, a feature extracting module, a classifier, and a comparing module. A method for recognizing physiological sound comprises receiving a physiological sound by the receiving module; extracting at least one feature from the physiological sound by the feature extraction module; classifying the at least one feature to identify at least one category by a classifier; and comparing the at least one category with a normal physiological sound and/or an abnormal physiological sound by the comparing module for evaluating a risk of disease. The method and system for recognizing physiological sound can precisely identify the specific physiological sound and exclude the noise.

Abstract: The semiconductor device structures and methods for forming the same are provided. The semiconductor device structure includes a metal gate over a substrate. A first spacer is formed over sidewalls of the metal gate and having a first height. A second spacer is formed over the sidewalls of the metal gate and having a second height. The first height is higher than the second height. The first spacer is farther from the sidewalls of the metal gate than the second spacer. In addition, the semiconductor device structure includes a dielectric layer formed over the substrate to surround the first spacer and the metal gate.

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate, a gate, a first doped region and a second doped region. The gate is over the substrate. The first doped region and the second doped region are in the substrate. The first doped region and the second doped region are of a same conductivity type and separated by the gate. The length of the first doped region is greater than a length of the second doped region in a direction substantially perpendicular to a channel length defined between the first doped region and the second doped region.

Abstract: A semiconductor structure includes an isolation structure, a gate stack, a spacer and a patterned resist protective oxide. The isolation structure is formed in a semiconductor substrate, and electrically isolates device regions of the semiconductor substrate. The gate stack is located on the isolation structure. The spacer is formed along a sidewall of the gate stack on the isolation structure. The patterned resist protective oxide is located on the isolation structure and covers a sidewall of the spacer such that the spacer is interposed between the patterned resist protective oxide and the gate stack.

Abstract: A transistor includes an isolation region surrounding an active region. The transistor also includes a gate dielectric layer over a portion of the active region. The transistor further includes a gate electrode over the gate dielectric layer. The portion of the active region under the gate dielectric layer includes a channel region between a drain region and a source region, and at least one wing region adjoining the channel region. The at least one wing region has a base edge adjoining the channel region. The at least one wing region is polygonal or curved.

Abstract: A heart rate detection method for calculating heart rate using heart sound from auscultation positions identified by a statistical approach utilizes a down-sampling and filtering process to acquire samples of heart sound from multiple auscultation positions of multiple testees and calculate heart rate with the samples, records time for calculating heart rate from each auscultation position of each testee and record the same from electrocardiogram, calculates a mean error and a standard deviation of the time to identify the auscultation positions allowing faster speed in heart rate detection, and applies a Bland-Altman difference plot and both a coefficient of determination and a Pearson's correlation coefficient to determine the degree of consistency and correlation of the heart rate measured from the multiple auscultation positions to identify the auscultation positions allowing generation of precise heart rate.

Abstract: The invention provides a sulfur doping method for graphene, which comprises the steps of: 1) providing graphene and placing the grapheme in a chemical vapor deposition reaction chamber; 2) employing an inert gas to perform ventilation and exhaust treatment in the reaction chamber; 3) introducing a sulfur source gas to perform sulfur doping on the graphene at 500-1050° C.; and 4) cooling the reaction chamber in a hydrogen and inert gas atmosphere. The present invention can perform sulfur doping on the graphene simply and efficiently, the economic cost is low, and large-scale production can be realized. Large area sulfur doping on graphene can be realized, and doping of graphene on an insulating substrate or metal substrate can be carried out directly.

Abstract: The present invention provide a method and an apparatus for mining a maximal repeated sequence, where a maximal repeated sequence is determined based on pipelines and a suffix tree, thereby implementing incremental mining and improving computation efficiency. The method comprises: acquiring a character; appending the character to each pipeline in a pipeline set, and separately determining whether a sequence in each pipeline appended with the character is the same as a corresponding sequence on a suffix tree; determining a maximal repeated sequence according to a first preset policy and the sequence in the first pipeline when there exists such a first pipeline in the pipeline set that after the character is appended to the first pipeline, a sequence in the first pipeline is different from a corresponding sequence on the suffix tree.

Abstract: A light emitting diode module structural and a manufacturing method thereof are disclosed. The manufacturing method includes the steps as follows. A base and a light emitting diode die are provided. The light emitting diode die may include a first semiconductor layer and a second semiconductor layer. The light emitting diode die is disposed on the base. A buffer layer is formed to cover the light emitting diode die. A first opening and a second opening are formed on the first semiconductor layer and the second semiconductor layer, respectively. The second opening exposes the second semiconductor layer by penetrating the first semiconductor layer. A conductive pattern layer is formed on the buffer layer, and is electrically connected with the first semiconductor layer and the second semiconductor layer via the first opening and the second opening, respectively.

Abstract: A method for operating a scanning microscope system. The optimal number of required through-focus scans, that is required to predict the position of a focal plane of the objective with respect to the object to produce the image with minimized blur, is not pre-determined but rather defined iteratively in real-time, contemporaneously with conducting the sample scanning operation itself.

Abstract: A semiconductor structure includes an isolation structure, a gate stack, a spacer and a patterned resist protective oxide. The isolation structure is formed in a semiconductor substrate, and electrically isolates device regions of the semiconductor substrate. The gate stack is located on the isolation structure. The spacer is formed along a sidewall of the gate stack on the isolation structure. The patterned resist protective oxide is located on the isolation structure and covers a sidewall of the spacer such that the spacer is interposed between the patterned resist protective oxide and the gate stack.

Abstract: A wearable electronic device includes a device body having a wireless communication module, a wearing unit connected to the device body for being worn on a user, an antenna module entirely embedded inside the wearing unit, and a conductive unit is partially disposed in the wearing unit and electrically connected to the antenna module and the wireless communication module.

Abstract: The integrated circuit (IC) device includes a substrate, an isolation feature, a first gate structure, a second gate structure, a first contact feature and a first supplementary active region. The isolation feature is disposed in the substrate, and the isolation feature defines a boundary between a first active region and a second active region of the substrate. The first gate structure is disposed over the first active region. The second gate structure is disposed over the second active region. The first contact feature is disposed over the first active region, in which a portion of the first active region is disposed between the first gate structure and the isolation feature. The first supplementary active region is disposed adjacent to the portion of the first active region, in which a thickness of the first supplementary active region is substantially in a range from 5 nm to 10 nm.