Abstract: A non-volatile memory structure including a substrate, a stacked structure, a conductive pillar, a channel layer, a charge storage structure, and a second dielectric layer is provided. The stacked structure is disposed on the substrate and has an opening. The stacked structure includes first conductive layers and first dielectric layers alternately stacked. The conductive pillar is disposed in the opening. The channel layer is disposed between the stacked structure and the conductive pillar. The charge storage structure is disposed between the stacked structure and the channel layer. The second dielectric layer is disposed between the channel layer and the conductive pillar. The non-volatile memory structure can effectively improve the electrical performance and the reliability of the memory device.

Abstract: Described herein is a system and method for utilizing a virtual secure mode instance to protect an artificial intelligence model from unauthorized access (e.g., inspection, copying) during execution of an application utilizing the AI model (e.g., training and/or inference) on a client device. An encrypted artificial intelligence model is received in a virtual secure mode instance of the client device. The encrypted artificial intelligence model is decrypted in the virtual secure mode instance using a decryption secret. The decrypted artificial intelligence model is stored in the virtual secure mode instance. An application that utilizes the decrypted artificial intelligence model is executed (e.g., training and/or inference) in the virtual secure mode instance.

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate, a gate, a first doped region and a second doped region. The gate is over the substrate. The first doped region and the second doped region are in the substrate. The first doped region and the second doped region are of a same conductivity type and separated by the gate. The length of the first doped region is greater than a length of the second doped region in a direction substantially perpendicular to a channel length defined between the first doped region and the second doped region.

Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode, a pair of source/drain regions, a pair of first well regions, a second well region, a pair of contact regions and a pair of third well regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric. The pair of first well regions are disposed under the pair of source/drain regions. The second well region is disposed between the pair of first well regions. The pair of contact regions are disposed on opposing sides of the pair of source/drain regions. The pair of third well regions are disposed under the pair of contact regions.

Abstract: A method including detecting, in response to a design file uploaded by a development device, validity of an actual constraint file included in the design file and corresponding to an FPGA of the FPGA cloud host; synthesis processing the design file in response to detecting that the actual constraint file is valid; and writing a burner file obtained from the synthesis processing into the FPGA. The validity of the actual constraint file is detected to prevent a malicious attack of a user to FPGA hardware.

Abstract: A semiconductor device is provided. The semiconductor device comprises a substrate, a gate, a first doped region and a second doped region. The gate is over the substrate. The first doped region and the second doped region are in the substrate. The first doped region and the second doped region are of a same conductivity type and separated by the gate. The length of the first doped region is greater than a length of the second doped region in a direction substantially perpendicular to a channel length defined between the first doped region and the second doped region.

Abstract: Examples described herein generally relate to device analytics. Specifically, the present disclosure provides resource deployment at an organization including one or more devices. The present disclosure provides for receiving telemetry data from the one or more devices associated with the organization. The present disclosure further provides for generating a set of deployment rings for the deployment of the software resource at the one or more devices of the organization. Additionally, the present disclosure provides for deploying the software resource within the organization based on the set of deployment rings.

Abstract: An information pushing method reduces the interference to the user and improves the utilization rate of information resources during the process of the information pushing. For example, the server sends the triggering condition in the form of triggering condition information, and the identification information corresponding to the information to be pushed to the client terminal. The client terminal determines whether to push the information to be pushed to the user based on the terminal information on its own and sends the identification information to the server. Then the server sends the information to be pushed to the client terminal according to the identification information so that the client terminal may push the information to be pushed to the user.

Abstract: The patent provides a method for preparing titanium-based active electrodes with high stability coating layer, which belongs to the field of electrochemistry. The patent describes the active electrode is used titanium as the substrate, multi-metal oxides as the activated catalytic layer, and dense oxides as the protective layer. The multi-metal catalytic layer is formed by pyrolysis method to form the main body of titanium-based catalytic layer, and the dense oxide protective layer is combined with Sol-gel method and electrochemical deposition method to form a dense protective layer of titanium base. It can be widely used in chlor-alkali industry, paper industry, sewage treatment and other fields.

Abstract: A graphene ternary composite direct current-carrying plate includes an anode plate and a cathode plate. Placed between the anode plate and the cathode plate is a graphene composite layer. The graphene composite layer is doped with a certain proportion of graphene in the aluminum mesh frame. The plate of the invention has small thickness, low ohmic voltage drop, good porosity, and low current loss. This reduces the electrolysis power consumption, thereby significantly reducing the product cost and effectively promoting the industrial production market of the sodium chlorate electrolysis method. The plate also reduces energy consumption and is environmentally friendly.

Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode and a pair of source/drain regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric.

Abstract: Some embodiments of the present disclosure relate to a method of forming a transistor. The method includes forming a gate dielectric over a substrate and forming a gate over the gate dielectric. The gate includes polysilicon extending between a first outermost sidewall and a second outermost sidewall of the gate. A mask is formed over the gate. The mask exposes a first gate region extending to the first outermost sidewall and covers a second gate region extending between the first gate region and the second outermost sidewall. Dopants are selectively implanted into the first gate region according to the mask. Source and drain regions are formed within the substrate. The source region and the drain region are asymmetric with respect to an interface of the first gate region and the second gate region and extend to substantially equal distances past the first and second outermost sidewalls of the gate, respectively.

Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.

Abstract: A method for semiconductor manufacturing is disclosed. The method includes receiving a device having a first surface through which a first metal or an oxide of the first metal is exposed. The method further includes depositing a dielectric film having Si, N, C, and O over the first surface such that the dielectric film has a higher concentration of N and C in a first portion of the dielectric film near the first surface than in a second portion of the dielectric film further away from the first surface than the first portion. The method further includes forming a conductive feature over the dielectric film. The dielectric film electrically insulates the conductive feature from the first metal or the oxide of the first metal.

Abstract: Described herein is a system and method for utilizing a virtual secure mode instance to protect an artificial intelligence model from unauthorized access (e.g., inspection, copying) during execution of an application utilizing the AI model (e.g., training and/or inference) on a client device. An encrypted artificial intelligence model is received in a virtual secure mode instance of the client device. The encrypted artificial intelligence model is decrypted in the virtual secure mode instance using a decryption secret. The decrypted artificial intelligence model is stored in the virtual secure mode instance. An application that utilizes the decrypted artificial intelligence model is executed (e.g., training and/or inference) in the virtual secure mode instance.

Abstract: A method of cleaning a wafer in semiconductor fabrication is provided. The method includes cleaning a wafer using a wafer scrubber. The method further includes moving the wafer scrubber into an agitated cleaning fluid. The method also includes creating a contact between the wafer scrubber and a cleaning stage in the agitated cleaning fluid. In addition, the method includes cleaning the wafer or a second wafer by the wafer scrubber after the wafer scrubber is cleaned by the agitated cleaning fluid.

Abstract: A semiconductor device includes a semiconductor substrate, a gate dielectric, a gate electrode and a pair of source/drain regions. The gate dielectric is disposed in the semiconductor substrate having a concave profile that defines an upper boundary lower than an upper surface of the semiconductor substrate. The gate electrode is disposed over the gate dielectric. The pair of source/drain regions are disposed on opposing sides of the gate dielectric.

Abstract: A high-purity chlorine dioxide gas may use hydrogen peroxide as a reducing agent and may use horizontal generator, evaporation crystallizer, dryer and other devices to produce chlorine dioxide gas (product) and sodium sulfate (by-product). Compared to the conventional chlorine dioxide preparation system, the chlorine dioxide reaction and the sodium sulfate crystallization are performed in two processes. These processes are relatively separate and independent, and continuously produce chlorine dioxide gas with high purity and low moisture content while the by-product salt cake is evaporated, crystallized, filtered and dried, thereby producing sodium sulfate, without generating solid and liquid waste.

Abstract: The devices, systems, and methods described herein enable automatically configuring an electronic device using artificial intelligence (AI). The devices, systems, and methods enable accessing telemetry data representing device usage data, inputting the accessed telemetry data into machine learning models that are matched to device metadata, and determining notifications to publish to components of the electronic device. The notifications represent events predicted to occur on the electronic device. The notifications are published to the components of the electronic device such that the electronic device is configured according to the published notifications. The determined notifications enable the identification of optimal settings for the electronic device based on the usage pattern of the device and enable components of the electronic device to preemptively take action on events which are predicted to occur in the future.

Abstract: A housing device with slidable engagement includes a housing body, a fitting, and a sliding buckle. The housing body includes an opening side and a lateral adjacent to the opening side. The lateral has a through hole, and an inner surface of the lateral is provided with a guide structure. The fitting is inserted into the housing body through the through hole. The sliding buckle is slidably assembled on the guide structure. The sliding buckle includes two clamping arms, and the two clamping arms correspondingly clamp to an outside of the fitting.