Abstract: A shoe insole includes an elastic main body including a front metatarsal, a mid foot and a rear heel sections, the front metatarsal section having an enclosed forefoot buffer zone, the first recesses being formed in the forefoot buffer zone, the rear heel section having an enclosed heel buffer zone, the second recesses being formed in the heel buffer zone; an elastic pad member combined with the mid foot section and the rear heel section at the bottom surface of the elastic main body, a mid foot section of the elastic pad member having a protruding foot arch portion, the mid foot section of the elastic pad member having the elongated arc-shaped grooves and the through holes, a rear heel section of the elastic pad member having a through hole corresponding to the heel buffer zone; and an upper layer combined with the elastic main body.

Abstract: A system and method for manufacturing a through silicon via is disclosed. An embodiment comprises forming a through silicon via with a liner protruding from a substrate. A passivation layer is formed over the substrate and the through silicon via, and the passivation layer and liner are recessed from the sidewalls of the through silicon via. Conductive material may then be formed in contact with both the sidewalls and a top surface of the through silicon via.

Abstract: In accordance with an embodiment, a structure comprises a substrate having a first area and a second area; a through substrate via (TSV) in the substrate penetrating the first area of the substrate; an isolation layer over the second area of the substrate, the isolation layer having a recess; and a conductive material in the recess of the isolation layer, the isolation layer being disposed between the conductive material and the substrate in the recess.

Abstract: A flash memory cell includes a substrate, a T-shaped control gate disposed above the substrate, a floating gate embedded in a lower recess of the T-shaped control gate, a dielectric layer between the T-shaped control gate and the floating gate; a cap layer above the T-shaped control gate, a control gate oxide between the T-shaped control gate and the substrate, a floating gate oxide between the floating gate and the substrate, a liner covering the cap layer and the floating gate, and a source/drain region adjacent to the floating gate. The floating gate has a vertical wall surface that is coplanar with one side of the dielectric layer.

Abstract: A semiconductor component includes a substrate, two isolation structures, a conductor pattern and a dielectric layer. The isolation structures are disposed in the substrate, and each of the isolation structures has protruding portions protruding from the surface of the substrate. A trench is formed between the protruding portions. The included angle formed by the sidewall of the protruding portion and the surface of the substrate is an obtuse angle. The conductor pattern is disposed in the trench and fills the trench up. The dielectric layer is disposed between the conductor pattern and the substrate.

Abstract: A life jacket includes a float member and at least a cloth layer adhered on the float member. The float member is made of a floatable material, having a head hole in an intermediate lateral portion, a front float portion, a rear float portion, and a shoulder portion between the front and the rear float portion. The cloth layer is adhered or fused on the front surface and/or the rear surface of the float member to increase the structural strength of the life jacket. The front and the rear float portion have a plurality of band holes for a strap band to pass through to bind them on the body of a user. The rear float portion has plural holes spaced apart to reduce its boyancy. The float member with the head hole, the shoulder portion, the band holes and the holes in the rear float portion are formed by a molding pressing process to reduce the cost of the life jacket.