Patents by Inventor Cheng Han

Cheng Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11695372
    Abstract: Apparatus and methods for generating multiple oscillating signals. An example circuit generally includes a first voltage-controlled oscillator (VCO) circuit and a second VCO circuit having a differential bias input coupled to a differential output of the first VCO circuit. At least one of the first VCO circuit or the second VCO circuit generally includes: a pair of cross-coupled transistors comprising a first transistor and a second transistor, a first inductive element coupled between a first node and the drain of the first transistor, a second inductive element coupled between the first node and the drain of the second transistor, a third transistor having a drain coupled to the drain of the first transistor and having a source coupled to a second node, and a fourth transistor having a drain coupled to the drain of the second transistor and having a source coupled to the second node.
    Type: Grant
    Filed: February 11, 2022
    Date of Patent: July 4, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Emanuele Lopelli, Cheng-Han Wang, Yi Zeng
  • Publication number: 20230207634
    Abstract: The present disclosure describes a semiconductor device includes a substrate, a buffer layer on the substrate, and a stacked fin structure on the buffer layer. The buffer layer can include germanium, and the stacked fin structure can include a semiconductor layer with germanium and tin. The semiconductor device further includes a gate structure wrapped around a portion of the semiconductor layer and an epitaxial structure on the buffer layer and in contact with the semiconductor layer. The epitaxial structure includes germanium and tin.
    Type: Application
    Filed: March 6, 2023
    Publication date: June 29, 2023
    Applicant: Taiwan Semiconductor Manufacturing co., Ltd.
    Inventors: Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang, Shih-Ya Lin, Chung-En Tsai, Chee-Wee Liu
  • Publication number: 20230197805
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first source/drain epitaxial feature disposed in an NMOS region, a second source/drain epitaxial feature disposed in the NMOS region, a first dielectric feature disposed between the first source/drain epitaxial feature and the second source/drain epitaxial feature, a third source/drain epitaxial feature disposed in a PMOS region, a second dielectric feature disposed between the second source/drain epitaxial feature and the third source/drain epitaxial feature, and a conductive feature disposed over the first, second, and third source/drain epitaxial features and the first and second dielectric features.
    Type: Application
    Filed: February 13, 2023
    Publication date: June 22, 2023
    Inventors: Shahaji B. MORE, Jia-Ying MA, Cheng-Han LEE
  • Publication number: 20230195269
    Abstract: A touch screen which is provided comprising: a display; multiple first electrodes in parallel to a first axis and multiple second electrodes in parallel to a second axis, wherein the first and the second electrodes are overlapped with the display; and an opaque and non-conductive frame which surrounds and overlaps on top of edges of the display, wherein the first axis is perpendicular to the second axis, the first electrodes intersect with the second electrodes, a distance between center lines of any two adjacent second electrodes is a second pitch, a distance in the first axis between a center line of the first one of the second electrodes and a second edge of the frame in parallel to the second axis is less than or equals to a quarter of the second pitch, a distance in the first axis between a center line of the last one of the second electrodes and a fourth edge of the frame in parallel to the second axis is less than or equals to a quarter of the second pitch.
    Type: Application
    Filed: December 1, 2022
    Publication date: June 22, 2023
    Inventor: CHENG-HAN LEE
  • Patent number: 11681235
    Abstract: An extreme ultraviolet (EUV) photolithography system cleans debris from an EUV reticle. The system includes a cleaning electrode configured to be positioned adjacent the EUV reticle. The system includes a voltage source that helps draw debris from the EUV reticle toward the cleaning electrode by applying a voltage of alternating polarity to the cleaning electrode.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: June 20, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Hui Li, Cheng-Han Yeh, Tzung-Chi Fu
  • Publication number: 20230187283
    Abstract: A device includes a first transistor, a second transistor, and a dielectric structure. The first transistor is over a substrate and has a first gate structure. The second transistor is over the substrate and has a second gate structure. The dielectric structure is between the first gate structure and the second gate structure. The dielectric structure has a width increasing from a bottom position of the dielectric structure to a first position higher than the bottom position of the dielectric structure. A width of the first gate structure is less than the width of the dielectric structure at the first position.
    Type: Application
    Filed: February 10, 2023
    Publication date: June 15, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuei-Ming CHANG, Rei-Jay HSIEH, Cheng-Han WU, Chie-Iuan LIN
  • Patent number: 11672788
    Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: June 13, 2023
    Assignee: Great Novel Therapeutics Biotech & Medicals Corporation
    Inventors: Jia-Shiong Chen, Mu-Hsuan Yang, Yi-Hong Wu, Sz-Hao Chu, Cheng-Han Chou, Ye-Su Chao, Chia-Nan Chen
  • Patent number: 11676838
    Abstract: A wafer cassette for receiving a wafer is provided. The wafer cassette includes a cassette housing, a first supporting rib and a second supporting rib. The first supporting rib is disposed in the cassette housing, wherein the first supporting rib includes a front supporting portion, a middle supporting portion and a rear supporting portion, the front supporting portion is connected to one end of the middle supporting portion, the rear supporting portion is connected to the other end of the middle supporting portion, and the front supporting portion has a front curved edge. The second supporting rib is disposed in the cassette housing. An edge portion of the wafer is supported by the first supporting rib and the second supporting rib, and the front supporting portion, the middle supporting portion and the rear supporting portion contact the wafer simultaneously.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: June 13, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMIIED
    Inventors: Chao-Chih Wang, Ya-Nan Wang, Chia-He Wu, Cheng-Han Chiang
  • Patent number: 11677321
    Abstract: A power converter having a slew rate controlling mechanism is provided. A first terminal of a high-side switch is coupled to an input voltage. A first terminal of a low-side switch is connected to a second terminal of the high-side switch. A second terminal of a first capacitor is connected to a node between the second terminal of the high-side switch and the first terminal of the low-side switch. A first terminal of an inductor is connected to the second terminal of the first capacitor and to the node. A first terminal of a second capacitor is connected to a second terminal of the inductor. A second terminal of the second capacitor is grounded. An input terminal of a current controlling device is connected to a power output terminal of a high-side buffer. An output terminal of the current controlling device is connected to the node.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: June 13, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Tse-Hsu Wu, Cheng-Han Wu, Fu-Chuan Chen, Yun-Chiang Chang
  • Publication number: 20230176681
    Abstract: The invention provides a hovering touch panel/hovering touch device, which includes a plurality of driving lines extending along a first axis, a plurality of sensing lines extending along a second axis and intersecting the driving lines respectively, the intersections of the driving lines and the sensing lines each forming a respective intersected point, and a plurality of hovering units respectively set on the driving lines or the sensing lines between adjacent intersected points, each hovering unit having an even number of linear hovering sections connected to the same point of each driving line or sensing line.
    Type: Application
    Filed: February 8, 2022
    Publication date: June 8, 2023
    Inventor: Cheng-Han LEE
  • Patent number: 11670681
    Abstract: A method includes forming an N well and a P well in a substrate; depositing a first layer having silicon over the N well and the P well; depositing a first dielectric layer over the first layer; forming a resist pattern over the first dielectric layer, the resist pattern providing an opening directly above the N well; etching the first dielectric layer and the first layer through the opening, leaving a first portion of the first layer over the N well; removing the resist pattern; and epitaxially growing a second layer having silicon germanium (SiGe) over the first portion of the first layer. The epitaxially growing the second layer includes steps of (a) performing a baking process, (b) depositing a silicon seed layer, and (c) depositing a SiGe layer over the silicon seed layer, wherein the steps (a), (b), and (c) are performed under about a same temperature.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: June 6, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shahaji B. More, Shu Kuan, Cheng-Han Lee
  • Patent number: 11670699
    Abstract: A semiconductor device includes a substrate, a channel layer, a barrier layer, a ferroelectric composite material layer, a gate, a source and a drain. The channel layer and the barrier layer having a recess are disposed on the substrate in sequence. The ferroelectric composite material layer including a first dielectric layer, a charge trapping layer, a first ferroelectric material layer, a second dielectric layer and a second ferroelectric material layer is disposed in the recess. The gate is disposed on the ferroelectric composite material layer. The source and the drain are disposed on the barrier layer.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: June 6, 2023
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Edward Yi Chang, Shih-Chien Liu, Chung-Kai Huang, Chia-Hsun Wu, Ping-Cheng Han, Yueh-Chin Lin, Ting-En Hsieh
  • Publication number: 20230165213
    Abstract: An intelligent defecation device for living creature includes a device body, a supporting portion, an image module, and a first analysis module. The supporting portion is formed within the inner side of the device body for accommodating a moisture absorption member so as to allow the living creature to leave over its excrement therein. The image module is also arranged at the device body for dynamically capturing the images of the excrement in the supporting portion and outputting the image. The first analysis module is arranged in the device body and connected with the image module to analyze and calculate the defecation mode with the image based on preset or accumulated data, so as to generate a signal when an abnormal defecation mode is diagnosed.
    Type: Application
    Filed: January 12, 2023
    Publication date: June 1, 2023
    Inventors: James Cheng-Han Wu, Pei-Hsuan Shih, Chun-Ming Su, YOU-GANG KUO, Ning-Yuan Lyu, Chi-Yeh Hsu, Liang-Hao Huang
  • Patent number: 11662844
    Abstract: A touch sensitive processing apparatus is used to detect at least one object approximating or touching a touch screen and is configured for iteratively executing the following steps: having a driving circuit simultaneously sending a driving signal to two or more first electrodes, wherein at least one of the two or more first electrodes intersects with multiple second electrodes to form multiple intersection areas, the other of the two or more first electrodes intersects with multiple third electrodes to form multiple intersection areas; and having a sensing circuit simultaneously sensing the driving signal via the second electrodes to generate a one-dimensional sensing information and having the sensing circuit simultaneously sensing the driving signal via the third electrodes to generate another one-dimensional sensing information.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: May 30, 2023
    Assignee: EGALAX_EMPIA TECHNOLOGY INC.
    Inventors: Shang-Tai Yeh, Cheng-Han Lee
  • Publication number: 20230154802
    Abstract: A structure includes a stepped crystalline substrate that includes an upper step, a lower step, and a step rise. A first fin includes a crystalline structure having a first lattice constant. The first fin is formed over the lower step. A second fin includes a crystalline structure having a second lattice constant, the second lattice constant being different than the first lattice constant. The second fin can be formed over the upper step apart from the first fin. A second crystalline structure can be formed over the first crystalline structure and the tops of the fins aligned. The first and second fins can be made of the same material, but with different heights and different channel strain values. The first fin can be used as an NMOS fin and the second fin can be used as a PMOS fin of a CMOS FinFET.
    Type: Application
    Filed: January 3, 2023
    Publication date: May 18, 2023
    Inventors: Cheng-Han Lee, Chih-Yu Ma, Shih-Chieh Chang
  • Patent number: 11652124
    Abstract: An isolation structure can be formed between adjacent and/or non-adjacent pixel regions (e.g., between diagonal or cross-road pixel regions), of an image sensor, to reduce and/or prevent optical crosstalk. The isolation structure may include a deep trench isolation (DTI) structure or another type of trench that is partially filled with a material such that an air gap is formed therein. The DTI structure having the air gap formed therein may reduce optical crosstalk between pixel regions. The reduced optical crosstalk may increase spatial resolution of the image sensor, may increase overall sensitivity of the image sensor, may decrease color mixing between pixel regions of the image sensor, and/or may decrease image noise after color correction of images captured using the image sensor.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: May 16, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Wei Huang, Chao-Ching Chang, Yun-Wei Cheng, Chih-Lung Cheng, Yen-Chang Chen, Wen-Jen Tsai, Cheng Han Lin, Yu-Hsun Chih, Sheng-Chan Li, Sheng-Chau Chen
  • Patent number: 11650500
    Abstract: A system and method for depositing a photoresist and utilizing the photoresist are provided. In an embodiment a deposition chamber is utilized along with a first precursor material comprising carbon-carbon double bonds and a second precursor material comprising repeating units to deposit the photoresist onto a substrate. The first precursor material is turned into a plasma in a remote plasma chamber prior to being introduced into the deposition chamber. The resulting photoresist comprises a carbon backbone with carbon-carbon double bonds.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: May 16, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Keng-Chu Lin, Joung-Wei Liou, Cheng-Han Wu, Ya Hui Chang
  • Patent number: 11648667
    Abstract: A processing path generating device including an intuitive path teaching device and a controller is provided. The intuitive path teaching device is provided for gripping and moving with respect to a workpiece to create a moving path. The intuitive path teaching device has a detecting portion for detecting a surface feature of the workpiece. The controller is connected to the intuitive path teaching device. The controller generates a processing path according to the moving path of the intuitive path teaching device and the surface feature of the workpiece.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 16, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tien-Yun Chi, Cheng-Han Tsai, Kuo-Feng Hung
  • Publication number: 20230146797
    Abstract: The disclosure provides a portable electronic device, including: a housing, a heat dissipation component, a bracket, a cover structure, and a plurality of pivotal linkage rods. The housing includes a heat dissipation opening. The heat dissipation component is disposed in the housing and corresponds to the heat dissipation opening. The bracket is disposed in the housing and encloses the heat dissipation component. The cover structure is configured to move between a close position covering the heat dissipation opening and an open position exposing the heat dissipation opening. Each of the plurality of pivotal linkage rods is pivotally connected between the bracket and the cover structure, and is configured to be driven to rotate, to drive the cover structure to move between the close position and the open position.
    Type: Application
    Filed: October 6, 2022
    Publication date: May 11, 2023
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Cheng-Han Chung, Ching-Yuan Yang, Chui-Hung Chen
  • Publication number: 20230142300
    Abstract: Example embodiments described herein involve a system for testing a light-emitting module. The light-emitting module may include a mounting platform configured to hold a light-emitting module for a camera. The mounting platform may also be configured to rotate. The system may further include a housing holding a plurality of photodiodes arranged in an array over at least a 90 degree arc of a hemisphere. The system may also include a controller configured to control the photodiodes and the rotation of the mounting platform.
    Type: Application
    Filed: January 13, 2023
    Publication date: May 11, 2023
    Inventors: Choon Ping Chng, Cheng-Han Wu, Lucian Ion, Giulia Guidi