Patents by Inventor Cheng Han

Cheng Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230288807
    Abstract: A method of manufacturing a semiconductor device includes forming a multilayer photoresist stack over a substrate, in which the multilayer photoresist stack has a first photoresist layer and a second photoresist layer over the first photoresist layer, and the second photoresist layer is less reactive to hydrogen than the first photoresist layer, exposing the multilayer photoresist stack to an EUV radiation, and developing the exposed multilayer photoresist stack.
    Type: Application
    Filed: March 11, 2022
    Publication date: September 14, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: An-Ren ZI, Cheng-Han WU, Ching-Yu CHANG
  • Patent number: 11753432
    Abstract: Compounds for use in prevention and/or treatment of pain are disclosed. The compounds are derived by conjugation of N6-(4-hydroxybenzyl)adenosine and analogous compounds with amino acids or peptides. In one embodiment of the invention, the compound is 5?-O-(glycine-N-carbonyl-N6-(4-hydroxybenzyl)adenosine (I-a1). In another embodiment of the invention, the compound is 5-deoxy-5?-(glycine-N-amido)-N6-(4-hydroxybenzyl)adenosine (I-d1). Also disclosed are methods of making and using the same.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: September 12, 2023
    Assignee: ACADEMIA SINICA
    Inventors: Chih-Cheng Chen, Jim-Min Fang, Cheng-Han Lee, Jen-Yao Chang
  • Publication number: 20230280370
    Abstract: A testing apparatus for a semiconductor package includes a circuit board, testing patterns and a socket. The circuit board has a testing region and includes a plurality of testing contacts and a plurality of signal contacts distributed in the testing region. The testing patterns are embedded in the circuit board and electrically connected to the testing contacts, where each of the testing patterns includes a first conductive line and a second conductive line including a main portion and a branch portion connected to main portion. The first conductive line is connected to the main portion. The socket is located on the circuit board and comprising connectors electrically connected to the circuit board, wherein the connectors are configured to transmit electric signals for testing the semiconductor package from the testing apparatus.
    Type: Application
    Filed: May 11, 2023
    Publication date: September 7, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Ting Chen, Cheng-Han Huang, Kuang-Hua Wang
  • Publication number: 20230280840
    Abstract: A motion computing system for virtual reality is provided, which comprises a wearable device and a head-mounted display. The head-mounted display performs following steps for: setting a wearing position of the wearable device; determining whether to generate a hand model having finger skeleton data for the hand of the user is found in a monitored field by a hand tracking algorithm; in response respond to that determine the hand model is found in the monitored field, identifying a device position according to the wearing position and the finger skeleton data, and identifying a device rotation of the wearable device in the monitored field according to the inertial data; calculating a pointer direction in the monitored field according to the device position and the device rotation; and generating a ray in a virtual reality field according to the pointer direction and the device position.
    Type: Application
    Filed: February 14, 2023
    Publication date: September 7, 2023
    Inventors: Tzu-Yin CHANG, SyuanYu HSIEH, Cheng-Han HSIEH
  • Publication number: 20230280666
    Abstract: An extreme ultraviolet (EUV) photolithography system cleans debris from an EUV reticle. The system includes a cleaning electrode configured to be positioned adjacent the EUV reticle. The system includes a voltage source that helps draw debris from the EUV reticle toward the cleaning electrode by applying a voltage of alternating polarity to the cleaning electrode.
    Type: Application
    Filed: May 9, 2023
    Publication date: September 7, 2023
    Inventors: Yen-Hui LI, Cheng-Han YEH, Tzung-Chi FU
  • Patent number: 11749760
    Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: September 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Han Lin, Chao-Ching Chang, Yi-Ming Lin, Yen-Ting Chou, Yen-Chang Chen, Sheng-Chan Li, Cheng-Hsien Chou
  • Patent number: 11742160
    Abstract: A key structure including a base plate, a keycap disposed above the base plate, a scissor structure disposed between the base plate and the keycap, a first sleeve connected to the keycap, a second sleeve rotatably inserted into the first sleeve and a trigger member is provided. The first sleeve is located between the base plate and the keycap and has a guiding chute. The first sleeve is slidably sleeved on the second sleeve. The second sleeve has a guiding protrusion slidably disposed in the guiding chute and a notch opposite to the guiding protrusion, and the notch faces the base plate. The second sleeve is slidably sleeved on the trigger member. The trigger member has a trigger protrusion contacting the base plate, and the trigger protrusion is located between the base plate and the second sleeve.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: August 29, 2023
    Assignee: Acer Incorporated
    Inventors: Hung-Chi Chen, Cheng-Han Lin
  • Patent number: 11739080
    Abstract: Hydantoin based compounds useful as inhibitors of matrix metalloproteinases (MMPs), particularly macrophage elastase (MMP-12) are described. Also described are related compositions and methods of using the compounds to inhibit MMP-12 and treat diseases mediated by MMP-12, such as asthma, chronic obstructive pulmonary disease (COPD), emphysema, acute lung injury, idiopathic pulmonary fibrosis (IPF), sarcoidosis, systemic sclerosis, liver fibrosis, nonalcoholic steatohepatitis (NASH), arthritis, cancer, heart disease, inflammatory bowel disease (IBD), acute kidney injury (AKI), chronic kidney disease (CKD), Alport syndrome, and nephritis.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: August 29, 2023
    Assignee: Foresee Pharmaceuticals USA, Inc.
    Inventors: Wenjin Yang, Kai-Wei Chang, Suying Liu, Cheng-Han Tsai
  • Publication number: 20230268367
    Abstract: An isolation structure can be formed between adjacent and/or non-adjacent pixel regions (e.g., between diagonal or cross-road pixel regions), of an image sensor, to reduce and/or prevent optical crosstalk. The isolation structure may include a deep trench isolation (DTI) structure or another type of trench that is partially filled with a material such that an air gap is formed therein. The DTI structure having the air gap formed therein may reduce optical crosstalk between pixel regions. The reduced optical crosstalk may increase spatial resolution of the image sensor, may increase overall sensitivity of the image sensor, may decrease color mixing between pixel regions of the image sensor, and/or may decrease image noise after color correction of images captured using the image sensor.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Inventors: Tsung-Wei HUANG, Chao-Ching CHANG, Yun-Wei CHENG, Chih-Lung CHENG, Yen-Chang CHEN, Wen-Jen TSAI, Cheng Han LIN, Yu-Hsun CHIH, Sheng-Chan LI, Sheng-Chau CHEN
  • Publication number: 20230263790
    Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.
    Type: Application
    Filed: May 1, 2023
    Publication date: August 24, 2023
    Inventors: Jia-Shiong CHEN, Mu-Hsuan YANG, Yi-Hong WU, Sz-Hao CHU, Cheng-Han CHOU, Ye-Su CHAO, Chia-Nan CHEN
  • Publication number: 20230261083
    Abstract: A method of manufacturing a semiconductor device includes providing a substrate. A channel layer is formed on the substrate. A barrier layer is formed on the channel layer. A source and a drain are formed on the barrier layer. A recess is formed in the barrier layer, in which the recess has a bottom surface, and a portion of the barrier underneath the recess has a thickness. A first dielectric layer is formed to cover the bottom surface of the recess. A charge trapping layer is formed on the first dielectric layer. A first ferroelectric material layer is formed on the charge trapping layer. A second dielectric layer is formed on the first ferroelectric material layer. A second ferroelectric material layer is formed on the second dielectric layer. A gate is formed over the second ferroelectric material layer.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 17, 2023
    Inventors: Edward Yi CHANG, Shih-Chien LIU, Chung-Kai HUANG, Chia-Hsun WU, Ping-Cheng HAN, Yueh-Chin LIN, Ting-En HSIEH
  • Patent number: 11729538
    Abstract: A sensor module comprising a housing defining an internal cavity, the housing including an aperture, at least one microphone positioned in the internal cavity spaced from the aperture, a first barrier proximate the aperture, and a second barrier positioned between the at least one microphone and the first barrier.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: August 15, 2023
    Assignee: Waymo LLC
    Inventors: Choon Ping Chng, Cheng-Han Wu, Jun Hou, Xuan Zhong
  • Publication number: 20230251571
    Abstract: A system and method for depositing a photoresist and utilizing the photoresist are provided. In an embodiment a deposition chamber is utilized along with a first precursor material comprising carbon-carbon double bonds and a second precursor material comprising repeating units to deposit the photoresist onto a substrate. The first precursor material is turned into a plasma in a remote plasma chamber prior to being introduced into the deposition chamber. The resulting photoresist comprises a carbon backbone with carbon-carbon double bonds.
    Type: Application
    Filed: April 18, 2023
    Publication date: August 10, 2023
    Inventors: Keng-Chu Lin, Joung-Wei Liou, Cheng-Han Wu, Ya Hui Chang
  • Publication number: 20230253254
    Abstract: A semiconductor device and method includes: forming a gate stack over a substrate; growing a source/drain region adjacent the gate stack, the source/drain region being n-type doped Si; growing a semiconductor cap layer over the source/drain region, the semiconductor cap layer having Ge impurities, the source/drain region free of the Ge impurities; depositing a metal layer over the semiconductor cap layer; annealing the metal layer and the semiconductor cap layer to form a silicide layer over the source/drain region, the silicide layer having the Ge impurities; and forming a metal contact electrically coupled to the silicide layer.
    Type: Application
    Filed: April 17, 2023
    Publication date: August 10, 2023
    Inventors: Shahaji B. More, Zheng-Yang Pan, Cheng-Han Lee, Shih-Chieh Chang
  • Patent number: 11721760
    Abstract: A dopant boost in the source/drain regions of a semiconductor device, such as a transistor can be provided. A semiconductor device can include a doped epitaxy of a first material having a plurality of boosting layers embedded within. The boosting layers can be of a second material different from the first material. Another device can include a source/drain feature of a transistor. The source/drain feature includes a doped source/drain material and one or more embedded distinct boosting layers. A method includes growing a boosting layer in a recess of a substrate, where the boosting layer is substantially free of dopant. The method also includes growing a layer of doped epitaxy in the recess on the boosting layer.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: August 8, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yu Ma, Zheng-Yang Pan, Shih-Chieh Chang, Cheng-Han Lee
  • Patent number: 11716964
    Abstract: An intelligent defecation device for living creature includes a device body, a supporting portion, an image module, and a first analysis module. The supporting portion is formed within the inner side of the device body for accommodating a moisture absorption member so as to allow the living creature to leave over its excrement therein. The image module is also arranged at the device body for dynamically capturing the images of the excrement in the supporting portion and outputting the image. The first analysis module is arranged in the device body and connected with the image module to analyze and calculate the defecation mode with the image based on preset or accumulated data, so as to generate a signal when an abnormal defecation mode is diagnosed.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: August 8, 2023
    Assignee: LULUPET CO., LTD.
    Inventors: James Cheng-Han Wu, Pei-Hsuan Shih, Chun-Ming Su, You-Gang Kuo, Ning-Yuan Lyu, Chi-Yeh Hsu, Liang-Hao Huang
  • Publication number: 20230229273
    Abstract: A touch sensitive structure, comprising: a first electrode layer, further comprises multiple first electrodes in parallel to a first axis in a touch area; a second electrode layer, further comprises multiple second electrodes in parallel to a second axis in the touch area; a touch button outside of the touch area, the touch button further comprises a first button electrode in the first electrode layer and a second button electrode in the second electrode layer, wherein a shape and a position of the first button electrode are corresponding to the second button electrode; a first wire, in the first electrode layer and outside the touch area, for connecting the first button electrode; a second wire, in the second electrode layer and outside the touch area; and a conductive layer being arranged in between an external conductive object on top of the touch sensitive structure and at least one of following: the first wire; and the second wire.
    Type: Application
    Filed: December 28, 2022
    Publication date: July 20, 2023
    Inventor: CHENG-HAN LEE
  • Patent number: 11705149
    Abstract: A system includes a microphone unit coupled to a roof of an autonomous vehicle. The microphone unit includes a microphone board having a first opening. The microphone unit also includes a first microphone positioned over the first opening and coupled to the microphone board. The microphone unit further includes an accelerometer. The system also includes a processor coupled to the microphone unit.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: July 18, 2023
    Assignee: Waymo LLC
    Inventors: Choon Ping Chng, Cheng-Han Wu
  • Publication number: 20230223477
    Abstract: A semiconductor device includes a substrate; a fin protruding above the substrate, the fin including a compound semiconductor material that includes a semiconductor material and a first dopant, the first dopant having a different lattice constant than the semiconductor material, where a concentration of the first dopant in the fin changes along a first direction from an upper surface of the fin toward the substrate; a gate structure over the fin; a channel region in the fin and directly under the gate structure; and source/drain regions on opposing sides of the gate structure, the source/drain regions including a second dopant, where a concentration of the second dopant at a first location within the channel region is higher than that at a second location within the channel region, where the concentration of the first dopant at the first location is lower than that at the second location.
    Type: Application
    Filed: March 17, 2023
    Publication date: July 13, 2023
    Inventors: Shahaji B. More, Cheng-Han Lee, Shih-Chieh Chang
  • Patent number: 11693025
    Abstract: A testing apparatus for a semiconductor package includes a circuit board, testing patterns and a socket. The circuit board has a testing region and includes a plurality of testing contacts and a plurality of signal contacts distributed in the testing region. The testing patterns are embedded in the circuit board and electrically connected to the testing contacts, where each of the testing patterns includes a first conductive line and a second conductive line including a main portion and a branch portion connected to main portion. The first conductive line is connected to the main portion. The socket is located on the circuit board and comprising connectors electrically connected to the circuit board, wherein the connectors are configured to transmit electric signals for testing the semiconductor package from the testing apparatus.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: July 4, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Ting Chen, Cheng-Han Huang, Kuang-Hua Wang