Abstract: A pixel array may include a group of time-of-flight (ToF) sensors. The pixel array may include an image sensor comprising a group of pixel sensors. The image sensor may be arranged among the group of ToF sensors such that the image sensor is adjacent to each ToF sensor in the group of ToF sensors.

Abstract: A semiconductor device includes a plurality of isolation structures, wherein each isolation structure of the plurality of isolation structures is spaced from an adjacent isolation structure of the plurality of isolation structures. The semiconductor device further includes a gate structure. The gate structure includes a first sidewall and a second sidewall angled with respect to the first sidewall. The gate structure further includes a first surface extending between the first sidewall and the second sidewall, wherein a dimension of the gate structure in a first direction is less than a dimension of each of the plurality of isolation structures in the first direction.

Abstract: Redistribution layers of integrated circuits include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

Abstract: A driving assembly and a transfer device to allow an adjustable length of wheelbase for varying sizes of loads comprises a driving device, a driving wheel connected to the driving device rotatable by the driving device, a cantilever assembly comprising a cantilever configured for mounting to the bearing platform, and a driven wheel rotatably connected to one end of the cantilever. The other end of the cantilever is detachably connected to a fixed part of the driving device. The transfer device comprises a bearing platform and two driving assemblies.

Abstract: A semiconductor package structure and a method for manufacturing the same are provided. The semiconductor package structure includes a substrate, a chip and a dielectric structure. The substrate includes a first portion and a second portion surrounding the first portion. The second portion defines a cavity over the first portion. The chip includes a terminal on an upper surface of the chip. The dielectric structure fills the cavity and laterally encroaches over the upper surface of the chip. The dielectric structure is free from overlapping with the terminal of the chip.

Abstract: An image sensor device is provided. The image sensor device includes a substrate having a front surface, a back surface, and a light-sensing region. The image sensor device includes a first isolation structure extending from the front surface into the substrate. The first isolation structure surrounds a first portion of the light-sensing region, and the first isolation structure has a first end portion in the substrate. The image sensor device includes a second isolation structure extending from the back surface into the substrate. The second isolation structure surrounds a second portion of the light-sensing region, the second isolation structure has a second end portion in the substrate, and the second end portion of the second isolation structure is closer to the front surface of the substrate than the first end portion of the first isolation structure.

Abstract: An image sensor includes an array of image pixels and black level correction (BLC) pixels. Each BLC pixel includes a BLC pixel photodetector, a BLC pixel sensing circuit, and a BLC pixel optics assembly configured to block light that impinges onto the BLC pixel photodetector. Each BLC pixel optics assembly may include a first portion of a layer stack including a vertically alternating sequence of first material layers having a first refractive index and second material layers having a second refractive index. Additionally or alternatively, each BLC pixel optics assembly may include a first portion of a layer stack including at least two metal layers, each having a respective wavelength sub-range having a greater reflectivity than another metal layer. Alternatively or additionally, each BLC pixel optics assembly may include an infrared blocking material layer that provides a higher absorption coefficient than color filter materials within image pixel optics assemblies.

Abstract: Some implementations described herein provide pixel sensor configurations and methods of forming the same. In some implementations, one or more transistors of a pixel sensor are included on a circuitry die (e.g., an application specific integrated circuit (ASIC) die or another type of circuitry die) of an image sensor device. The one or more transistors may include a source follower transistor, a row select transistor, and/or another transistor that is used to control the operation of the pixel sensor. Including the one or more transistors of the pixel sensor (and other pixel sensors of the image sensor device) on the circuitry die reduces the area occupied by transistors in the pixel sensor on the sensor die. This enables the area for photon collection in the pixel sensor to be increased.

Abstract: A subpixel including at least one second-conductivity-type pinned photodiode layer that forms a p-n junction with a substrate semiconductor layer, at least one floating diffusion region, and at least one transfer gate stack structure. The at least one transfer gate stack structure may at least partially laterally surround the at least one second-conductivity-type pinned photodiode layer with a total azimuthal extension angle in a range from 240 degrees to 360 degrees around a geometrical center of the second-conductivity-type pinned photodiode layer. The at least one transfer gate stack structure may include multiple edges that overlie different segments of a periphery of the at least one second-conductivity-type pinned photodiode layer, and the floating diffusion region includes a portion located between the first edge and the second edge. In addition, multiple transfer gate stack structures and multiple floating diffusion regions may be present in the subpixel.

Abstract: The present disclosure is directed to anchor structures and methods for forming anchor structures such that planarization and wafer bonding can be uniform. Anchor structures can include anchor layers formed on a dielectric layer surface and anchor pads formed in the anchor layer and on the dielectric layer surface. The anchor layer material can be selected such that the planarization selectivity of the anchor layer, anchor pads, and the interconnection material can be substantially the same as one another. Anchor pads can provide uniform density of structures that have the same or similar material.

Abstract: A one-piece dental implant guide pack based on photocuring molding includes: a guide socket for receiving a photosensitive resin at an outer edge of the guide socket, adjusting and positioning the guide socket by the photosensitive resin which is curable by light; a guide slot formed at a side edge of the guide socket, and having a receiving portion at the bottom; a positioning shaft, having a positioning part and a shaft, and the positioning part being socketed into the guide socket, and the shaft penetrating to the bottom of the guide socket; and at least one positioning part, with an end connected to the guide socket and another end connected to and positioning the positioning shaft. This disclosure facilitates the drilling process of subsequent operations and improves the convenience and accuracy of the implant guide plate and the accuracy of the dental implant surgery.

Abstract: The invention provides an optical pressure sensor. The light-emitting module emits a detection light, and the light-receiving module receives a reflected light reflected by an object. When the distance between the object and the light-receiving module changes due to external pressure, the intensity of reflected light changes. The control module compares the intensity difference of the signal to determines the pressing state.

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a barrier layer on the buffer layer; forming a hard mask on the barrier layer; removing the hard mask to form a first recess for exposing the barrier layer; removing the hard mask adjacent to the first recess to form a second recess; and forming a p-type semiconductor layer in the first recess and the second recess.

Abstract: Provided is an image sensor and a method of forming the same. The image sensor includes a first substrate having a first surface and a second surface opposite to each other; a plurality of photodetectors, disposed in the first substrate; and a plurality of color filters, disposed on the second surface of the first substrate and respectively corresponding to the plurality of photodetectors. The plurality of color filters are composed of a plurality of PIN diodes, and the plurality of PIN diodes are configured to absorb light of different wavelength ranges by applying different bias voltages.

Abstract: A method for fabricating an image sensor device is provided. The method includes forming a plurality of photosensitive pixels in a substrate; depositing a dielectric layer over the substrate; etching the dielectric layer, resulting in a first trench in the dielectric layer and laterally surrounding the photosensitive pixels; and forming a light blocking structure in the first trench, such that the light blocking structure laterally surrounds the photosensitive pixels.

Abstract: Some implementations of the disclosure are directed to a method, comprising: receiving a sheet of graphite comprising a first surface and a second surface opposite the first surface; and perforating the sheet in a first plurality of locations from the first surface through the second surface to form a first plurality of perforations through the sheet and a first plurality of protrusions of the graphite oriented outward from the second surface, the first plurality of protrusions configured to conduct heat away from a plane of the sheet. Further implementations comprise perforating the sheet in a second plurality of locations from the second surface through the first surface to form a second plurality of perforations through the sheet and a second plurality of protrusions of graphite material oriented outward from the first surface, wherein the second plurality of protrusions are configured to conduct heat away from the plane of the sheet.

Abstract: A pixel array may include air gap reflection structures under a photodiode of a pixel sensor to reflect photons that would otherwise partially refract or scatter through a bottom surface of a photodiode. The air gap reflection structures may reflect photons upward toward the photodiode so that the photons may be absorbed by the photodiode. This may increase the quantity of photons absorbed by the photodiode, which may increase the quantum efficiency of the pixel sensor and the pixel array.

Abstract: An image sensor includes a photosensitive sensor, a floating diffusion node, a reset transistor, and a source follower transistor. The reset transistor comprises a first source/drain coupled to the floating diffusion node and a second source/drain coupled to a first voltage source. The source follower transistor comprises a gate coupled to the floating diffusion node and a first source/drain coupled to the second source/drain of the reset transistor. A first elongated contact contacts the second source/drain of the reset transistor and the first source/drain of the source follower transistor. The first elongated contact has a first dimension in a horizontal cross-section and a second dimension in the horizontal cross-section. The second dimension is perpendicular to the first dimension, and the second dimension is less than the first dimension.

Abstract: A method for manufacturing a circuit board structure with a waveguide is provided. The method includes: providing a plate including a top wall and sidewalls disposed on the top wall, an opening being defined between ends of two adjacent sidewalls away from the top wall; forming a conductive layer on the plate to obtain a conductive plate; providing a circuit board, the circuit board comprising an outer circuit layer; mounting the conductive plate on the outer circuit layer, causing the outer circuit layer to be disposed on the opening. The two adjacent sidewalls, the top wall between the two adjacent sidewalls, and the circuit board between the two adjacent sidewalls cooperatively constitutes a tube body of the waveguide, and the conductive layer and the outer circuit layer on an inner surface of the tube body cooperatively constitute a shielding of the waveguide.

Abstract: A back cover with an antenna element includes a cover body having a main portion, and an antenna element. A periphery of the main portion protrudes frontward to form a peripheral wall. The cover body is further equipped with a magnetic part. The antenna element is assembled in the cover body. The antenna element has a base portion, a connecting portion, a first extension portion and a second extension portion extended upward from the base portion. The first extension portion is disposed adjacent to one side of the peripheral wall of the cover body. The second extension portion is adjacent to the first extension portion. A length of the first extension portion is longer than a length of the second extension portion. A connecting portion is connected between the first extension portion and a top end of the second extension portion.