Patents by Inventor Cheng Wei
Cheng Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11962426Abstract: An Ethernet power supply receives a DC voltage through a bus positive terminal and a bus negative terminal, and is coupled to a load device. The Ethernet power supply includes a first control module and a second control module. The first control module is used to provide a first control signal through the bus negative terminal to confirm whether the load device is a valid load. The second control module is used to connect or disconnect a coupling relationship between the bus positive terminal and the first control module according to the load device being connected or not.Type: GrantFiled: May 25, 2022Date of Patent: April 16, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Yung-Wei Peng, Kuan-Hsien Tu, Cheng-En Liu
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Patent number: 11961545Abstract: Various embodiments of the present disclosure are directed towards a memory device. The memory device has a first transistor having a first source/drain and a second source/drain, where the first source/drain and the second source/drain are disposed in a semiconductor substrate. A dielectric structure is disposed over the semiconductor substrate. A first memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the first memory cell has a first electrode and a second electrode, where the first electrode of the first memory cell is electrically coupled to the first source/drain of the first transistor. A second memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the second memory cell has a first electrode and a second electrode, where the first electrode of the second memory cell is electrically coupled to the second source/drain of the first transistor.Type: GrantFiled: December 7, 2022Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Fa-Shen Jiang, Hsia-Wei Chen, Hsun-Chung Kuang, Hai-Dang Trinh, Cheng-Yuan Tsai
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Patent number: 11963464Abstract: A memristor may include an exchange-coupled composite (ECC) portion to provide three or more nonvolatile magneto-resistive states. The ECC portion may include a continuous layer and a granular layer magnetically exchange coupled to the continuous layer. A plurality of memristors may be used in a system to, for example, define a neural network.Type: GrantFiled: February 22, 2021Date of Patent: April 16, 2024Assignee: Seagate Technology LLCInventors: Cheng Wang, Pin-Wei Huang, Ganping Ju, Kuo-Hsing Hwang
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Patent number: 11957667Abstract: Methods of treating a disease caused by a positive strand RNA virus. The methods include administering to a subject in need thereof an effective amount of a compound of Formula I or Formula II.Type: GrantFiled: July 7, 2021Date of Patent: April 16, 2024Assignee: National Health Research InstitutesInventors: Shiow-Ju Lee, Cheng-Wei Yang, Yue-Zhi Lee, Hsing-Yu Hsu
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Publication number: 20240116655Abstract: Disclosed are a system and a method for capturing a space target. The system includes a plurality of capturing devices, a delivery device, a launching device, and a deceleration and recovery device, each of the plurality of capturing devices is configured to be launched into a target orbit to capture a defunct space target, the delivery device is configured to deliver, along a preset delivery trajectory, each of the plurality of capturing devices to a first preset location in the launching device, the launching device is configured to launch each of the plurality of capturing devices located at the first preset location into the target orbit to capture the defunct space target, and the deceleration and recovery device is configured to decelerate each of the plurality of capturing devices after it is launched and flies a preset distance.Type: ApplicationFiled: December 20, 2023Publication date: April 11, 2024Applicant: Harbin Institute of TechnologyInventors: Jinsheng GUO, Fan WU, Shi QIU, Jian CHEN, Cheng WEI, Hongxu WANG
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Publication number: 20240120239Abstract: A method for modulating a threshold voltage of a device. The method includes providing a fin extending from a substrate, where the fin includes a plurality of semiconductor channel layers defining a channel region for a P-type transistor. In some embodiments, the method further includes forming a first gate dielectric layer surrounding at least three sides of each of the plurality of semiconductor channel layers of the P-type transistor. Thereafter, the method further includes forming a P-type metal film surrounding the first gate dielectric layer. In an example, and after forming the P-type metal film, the method further includes annealing the semiconductor device. After the annealing, and in some embodiments, the method includes removing the P-type metal film.Type: ApplicationFiled: March 10, 2023Publication date: April 11, 2024Inventors: Cheng-Wei CHANG, Chi-Yu CHOU, Lun-Kuang TAN, Shuen-Shin LIANG
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Publication number: 20240118566Abstract: A bendable device is provided. The bendable device includes: a frame, a light shielding layer, a flexible substrate, a flexible film, and a first adhesive material. The light shielding layer is disposed on the frame. The flexible substrate is disposed on the frame and includes a plurality of transistors. The flexible film is connected to the flexible substrate and includes a conductive layer. The first adhesive material connects at least a portion of the flexible film and at least a portion of the flexible substrate.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Cheng-Hsia KUO, Chia-Wei YEN
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Publication number: 20240120812Abstract: An integrated motor and drive assembly is disclosed and includes a housing, a motor and a drive. The housing includes a motor-accommodation portion and a drive-accommodation portion. The drive includes a power board and a control board. The power board is made of a high thermal conductivity substrate and includes a power element and an encoder disposed on the first side, the first side faces the motor, the power board and the motor are stacked along a first direction, and the second side contacts the housing to from a heat-dissipating route. The control board is disposed adjacent to the power board. The control board and the power board are arranged along a second direction perpendicular to the first direction, and the first direction is parallel to an axial direction of the motor. A part of the power board and a part of the control board are directly contacted to form an electrical connection.Type: ApplicationFiled: July 17, 2023Publication date: April 11, 2024Inventors: Chi-Hsiang Kuo, Yi-Yu Lee, Zuo-Ying Wei, Yuan-Kai Liao, Wen-Cheng Hsieh
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Publication number: 20240120313Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.Type: ApplicationFiled: December 18, 2023Publication date: April 11, 2024Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU
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Patent number: 11957018Abstract: A display device includes: a substrate having display and non-display areas; a first conductive layer including first and second sub-conductive lines; a second conductive layer including third and fourth sub-conductive lines, wherein, in the display area, the first sub-conductive line and the third sub-conductive lines cross from a top view; and a third conductive layer including third conductive lines and corresponding to the non-display area; wherein, corresponding to the non-display area, a portion of a projection of the one of the third conductive lines is overlapped with a portion of a projection of the second sub-conductive line on the substrate, and another portion of the projection of the one of the third conductive lines is overlapped with a portion of a projection of the fourth sub-conductive line on the substrate.Type: GrantFiled: May 9, 2023Date of Patent: April 9, 2024Assignee: INNOLUX CORPORATIONInventors: Hui-Min Huang, Li-Wei Sung, Cheng-Tso Chen, Chia-Min Yeh
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Patent number: 11953964Abstract: An Ethernet power supply receives a DC voltage through a bus positive terminal and a bus negative terminal, and is coupled to a load device. The Ethernet power supply includes a first control module and a second control module. The first control module provides a first control signal through the bus negative terminal to confirm whether the load device is a valid load. The second control module is used to connect or disconnect a coupling relationship between the bus positive terminal and the first control module according to whether the load device is connected to the Ethernet power supply.Type: GrantFiled: June 2, 2022Date of Patent: April 9, 2024Assignee: DELTA ELECTRONICS, INC.Inventors: Yung-Wei Peng, Kuan-Hsien Tu, Cheng-En Liu
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Patent number: 11951233Abstract: Provided are methods of producing an acellular organ. The method includes the steps of, subjecting an organ derived from an animal to a static supercritical fluid (SCF) treatment followed by a dynamic SCF treatment. Optionally, the method of the present disclosure further includes a hypertonic and a hypotonic treatments prior to the static SCF treatment, and/or a neutralizing treatment after the dynamic SCF treatment. Also disclosed herein are acellular organs produced by the present method.Type: GrantFiled: September 11, 2019Date of Patent: April 9, 2024Assignee: ACRO BIOMEDICAL COMPANY. LTD.Inventors: Dar-Jen Hsieh, Chao-Yi Wei, Chao-Chin Chao, Jer-Cheng Kuo, Yi-Ping Lai, Srinivasan Periasamy
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Patent number: 11955329Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.Type: GrantFiled: April 28, 2023Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Cheng-Wei Chang, Min-Hsiu Hung, Chun-I Tsai, Ken-Yu Chang, Yi-Ying Liu
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Patent number: 11955522Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a buffer layer, a barrier layer, a dielectric layer, a source structure, and a drain structure. The buffer layer is disposed on the substrate. The barrier layer is disposed on the buffer layer. The dielectric layer is disposed on the barrier layer. The passivation layer is disposed on the dielectric layer. The source structure and the drain structure are disposed on the passivation layer.Type: GrantFiled: February 13, 2020Date of Patent: April 9, 2024Assignee: Vanguard International Semiconductor CorporationInventors: Cheng-Wei Chou, Shin-Cheng Lin, Yung-Fong Lin
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Patent number: 11955554Abstract: A method of fabrication of a multi-gate semiconductor device that includes providing a fin having a plurality of a first type of epitaxial layers and a plurality of a second type of epitaxial layers. The plurality of the second type of epitaxial layers is oxidized in the source/drain region. A first portion of a first layer of the second type of epitaxial layers is removed in a channel region of the fin to form an opening between a first layer of the first type of epitaxial layer and a second layer of the first type of epitaxial layer. A portion of a gate structure is then formed in the opening.Type: GrantFiled: July 15, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Huan-Sheng Wei, Hung-Li Chiang, Chia-Wen Liu, Yi-Ming Sheu, Zhiqiang Wu, Chung-Cheng Wu, Ying-Keung Leung
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Patent number: 11951578Abstract: A cutting fluid digital monitoring and management system and method are provided, applicable to a computer numerical control (CNC) machining device. The CNC machining device has a cutting fluid tank configured to accommodate a cutting fluid. The cutting fluid digital monitoring and management system includes: a detection tank, configured to extract a cutting fluid from the cutting fluid tank through a motor and an electrically controlled water valve; a concentration sensing module, a pH sensing module, a water hardness sensing module, and a temperature sensing module, respectively configured to obtain a concentration, a pH value, a hardness, and a temperature of the cutting fluid; a processing module, configured to generate a monitoring integration value, compare the monitoring integration value with a standard model, and generate an adjustment signal; and an adjustment module, configured to actively adjust a variable parameter of the cutting fluid according to the adjustment signal.Type: GrantFiled: December 2, 2022Date of Patent: April 9, 2024Assignee: NATIONAL KAOHSIUNG UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Chun-Chih Kuo, Jyun-Wei Gu, Cheng-Yu Yang
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Patent number: 11955154Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.Type: GrantFiled: May 16, 2022Date of Patent: April 9, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
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Patent number: 11956887Abstract: A board, including a first pad area, a second pad area, a first micro heater, a second micro heater, a first heater terminal pad, a second heater terminal pad, and a third heater terminal pad, is provided. The first pad area and the second pad area respectively include at least one pad. The first micro heater and the second micro heater are respectively disposed corresponding to the first pad area and the second pad area. The first heater terminal pad and the second heater terminal pad form a loop with the first micro heater by being electrically connected to an outside, so that the first micro heater generates heat. The second heater terminal pad and the third heater terminal pad form another loop with the second micro heater by being electrically connected to the outside, so that the second micro heater generates heat. A circuit board and a fixture are also provided.Type: GrantFiled: January 27, 2022Date of Patent: April 9, 2024Assignee: Skiileux Electricity Inc.Inventors: Shang-Wei Tsai, Cheng Chieh Chang, Te Fu Chang
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Publication number: 20240110030Abstract: A styrene-modified polyethylene-based expandable resin particle is provided, which comprise a polyethylene resin and a polystyrene resin, wherein a content of the polyethylene resin ranges from 5 wt % to 30 wt % and a content of the polystyrene resin ranges from 70 wt % to 95 wt % based on 100 wt % of the polyethylene resin and the polystyrene resin, wherein the expandable resin particle comprises a xylene insoluble matter and an acetone insoluble matter, and a ratio of a content of the xylene insoluble matter to a content of the acetone insoluble matter ranges from 0.01 to 5. In addition, an expanded resin particle and a foamed resin molded article prepared by the aforesaid expandable resin particle are also provided. Furthermore, a method for manufacturing the aforesaid expandable resin particle is also provided.Type: ApplicationFiled: September 28, 2023Publication date: April 4, 2024Inventors: Han-Liou YI, Yao-Hsien CHUNG, Cheng-Ting HSIEH, Yu-Pin LIN, Keng-Wei HSU
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Publication number: 20240113856Abstract: The present invention provides an encryption determining method. The method includes the following steps: receiving a side channel signal; generating a filtered side channel signal by filtering noise within the side channel signal; generating a phasor signal by utilizing a filter to covert the filtered side channel signal; locating the encrypted segment by calculating a periodicity of the phasor signal utilizing a standard deviation window; extracting at least one encrypted characteristic from the encrypted segment; and generating an encryption analytic result by recognizing the at least one encrypted characteristic according to a characteristic recognition model; wherein the encryption analytic result includes a position of the encrypted segment within the side channel signal, and an encryption type corresponding to the side channel signal. The present invention is able to automatically and efficiently locate the encryption segment and analyze the encryption type corresponding to the side channel signal.Type: ApplicationFiled: October 31, 2022Publication date: April 4, 2024Applicant: INSTITUTE FOR INFORMATION INDUSTRYInventors: Jian-Wei LIAO, Cheng-En LEE, Ting-Yu LIN