Patents by Inventor Cheng Wei

Cheng Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SOURCE/DRAIN EPI STRUCTURE FOR IMPROVING CONTACT QUALITY
    Publication number: 20240312844
    Abstract: A semiconductor structure includes an n-type epitaxial source/drain feature (NEPI) and a p-type epitaxial source/drain feature (PEPI) over a substrate, wherein a top surface of the NEPI is lower than a top surface of the PEPI. The semiconductor structure further includes a metal compound feature disposed on the top surface of the NEPI and the top surface of the PEPI. The metal compound feature extends continuously from the top surface of the NEPI to the top surface of the PEPI. The semiconductor structure further includes a contact feature disposed on the metal compound feature and a via structure disposed over the contact feature.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Inventors: Shahaji B. More, Cheng-Wei Chang
  • ELECTRONIC APPARATUS WITH SURGE VOLTAGE PROTECTION FUNCTION
    Publication number: 20240313525
    Abstract: An electronic apparatus includes a printed circuit board, a terminal and a surge voltage protection structure. The printed circuit board includes a first plated through hole, a second plated through hole and a ground terminal. The surge voltage protection structure includes the first plated through hole and the second plated through hole. The first plated through hole is electrically connected to the terminal. The second plated through hole is connected to the ground terminal. A gap is defined between the first plated through hole and the second plated through hole. The first plated through hole receives a surge voltage to generate an electric arc across the gap and transmit the electric arc through the gap to the second plated through hole, so that the second plated through hole receives the electric arc to transfer an energy of the electric arc to the ground terminal.
    Type: Application
    Filed: May 16, 2023
    Publication date: September 19, 2024
    Inventors: Chien-Chung LEE, Min-Chi TSENG, Cheng-Wei PENG, Yu-An CHEN
  • Data dividing method and processor for convolution operation
    Patent number: 12086711
    Abstract: A data dividing method applied to a computing device that performs a convolution operation based on an input image data and a weight data is provided. The method includes: determining a restriction condition in connection with the performing of the convolution operation by the computing device; determining a set of candidate data blocks for the input image data and a set of candidate data blocks for the weight data according to the restriction condition; generating an evaluation result by evaluating, according to candidate data blocks in the set of candidate data blocks for the input image data and the set of candidate data blocks for the weight data, an amount of data load of the computing device in accessing both an external memory and an internal memory of the computing device; and determining a method of dividing the input image data and the weight data according to the evaluation result.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: September 10, 2024
    Assignee: SIGMASTAR TECHNOLOGY LTD.
    Inventors: Cheng-Wei Zheng, Hu He, Wei Zhu
  • Conductive feature formation and structure
    Patent number: 12087575
    Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process.
    Type: Grant
    Filed: January 18, 2022
    Date of Patent: September 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Wei Chang, Min-Hsiu Hung, Hung-Yi Huang, Chun Chieh Wang, Yu-Ting Lin
  • Method and system of building knowledge graph and method and system of conversing news event
    Patent number: 12086182
    Abstract: A method of building a knowledge graph, performed by a processing device, includes: classifying news articles to a main event associated with sub events, using the main event as a first node of the knowledge graph, using the sub events as second nodes of the knowledge graph respectively, connecting the second nodes to the first node, extracting event summaries from the news articles respectively according to a template, using the event summaries as third nodes of the knowledge graph respectively, and connecting each of the third nodes to one of the second nodes according to association between the event summaries and the sub events, extracting commenter identities from the event summaries, and using the commenter identities as fourth nodes of the knowledge graph, and connecting each of the fourth nodes to one of the third nodes.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: September 10, 2024
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Wen-Hsiang Lu, Cheng-Wei Lin, Bo Yang Huang, Chia-Ming Tung
  • MASK PACKAGE AND MASK CARRYING SYSTEM
    Publication number: 20240294321
    Abstract: A mask package comprises a package body, a cover body and a first buffer. The package body has a bottom and a side wall, where the side wall has a top; the side wall is connected with the bottom, the top is located on a side opposite to a side where the side wall is connected with the bottom, and the side wall surrounds the bottom to form an accommodating space. The cover body is disposed on the top of the side wall and masks the accommodating space. The first buffer has a first length and a first width, and is disposed between the package body and the cover body, where the accommodating space has a second length and a second width, the second length is less than the first length and the second width is less than the first width.
    Type: Application
    Filed: July 26, 2023
    Publication date: September 5, 2024
    Inventor: Cheng-Wei Lin
  • MIDDLE-OF-LINE INTERCONNECT STRUCTURE AND MANUFACTURING METHOD
    Publication number: 20240282698
    Abstract: In some embodiments, the present disclosure relates to an integrated circuit device. A transistor structure includes a gate electrode separated from a substrate by a gate dielectric and a pair of source/drain regions disposed within the substrate on opposite sides of the gate electrode. A lower conductive plug is disposed through a lower inter-layer dielectric (ILD) layer and contacting a first source/drain region. A capping layer is disposed directly on the lower conductive plug. An upper inter-layer dielectric (ILD) layer is disposed over the capping layer and the lower ILD layer. An upper conductive plug is disposed through the upper ILD layer and directly on the capping layer.
    Type: Application
    Filed: April 30, 2024
    Publication date: August 22, 2024
    Inventors: Cheng-Wei Chang, Sung-Li Wang, Yi-Ying Liu, Chia-Hung Chu, Fang-Wei Lee
  • MOBILE PHONE BACK COVER THAT CAN BE REPLACED WITH FRAGRANCE AND DECORATIVE PANEL
    Publication number: 20240283856
    Abstract: A mobile phone back cover includes a fragrance unit including a hollow body with a plurality of pores to be arranged on one side of the camera lens of a mobile phone and an aroma material accommodated in the hollow body, a decorative panel decorated with different flat or three-dimensional patterns, characters or commercial advertisement graphics to be located at the bottom side relative the camera lens and the hollow body, and a frame detachably combined with the mobile phone to combine the hollow body and the decorative panel on the back of the mobile phone.
    Type: Application
    Filed: April 21, 2023
    Publication date: August 22, 2024
    Inventor: CHENG-WEI HSU
  • ANTENNA STRUCTURE AND MOBILE DEVICE
    Publication number: 20240283169
    Abstract: An antenna structure includes a ground element, a feeding radiation element, a first radiation element, a second radiation element, a shorting radiation element, a third radiation element, a filter circuit, a proximity sensor, and a tuning circuit. The ground element provides a ground voltage. The feeding radiation element has a feeding point. The first radiation element and the second radiation element are coupled to the feeding radiation element, or are disposed adjacent to the feeding radiation element. The first radiation element is also coupled through the shorting radiation element to the ground voltage. The third radiation element is disposed adjacent to the first radiation element. The third radiation element is coupled through the filter circuit to the proximity sensor. The filter circuit is also coupled through the tuning circuit to the ground voltage.
    Type: Application
    Filed: January 18, 2024
    Publication date: August 22, 2024
    Inventors: Li-Kai KUO, Wen-Pin HO, Cheng-Wei CHIANG, Jia-Le ZHU
  • Hybrid conductive structures
    Patent number: 12068252
    Abstract: The present disclosure describes a method for the fabrication of ruthenium conductive structures over cobalt conductive structures. In some embodiments, the method includes forming a first opening in a dielectric layer to expose a first cobalt contact and filling the first opening with ruthenium metal to form a ruthenium contact on the first cobalt contact. The method also includes forming a second opening in the dielectric layer to expose a second cobalt contact and a gate structure and filling the second opening with tungsten to form a tungsten contact on the second cobalt contact and the gate structure. Further, the method includes forming a copper conductive structure on the ruthenium contact and the tungsten contact, where the copper from the copper conductive structure is in contact with the ruthenium metal from the ruthenium contact.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: August 20, 2024
    Inventors: Cheng-Wei Chang, Chien-Shun Liao, Sung-Li Wang, Shuen-Shin Liang, Shu-Lan Chang, Yi-Ying Liu, Chia-Hung Chu, Hsu-Kai Chang
  • DEPOSITION APPARATUS AND DEPOSITION METHOD
    Publication number: 20240263298
    Abstract: A deposition apparatus is provided, including a deposition chamber, at least one target, at least one substrate holder, and at least one adjustment plate. The at least one target, the at least one substrate holder, and the at least one adjustment plate are disposed in the deposition chamber, and the at least one adjustment plate is disposed between the at least one target and the at least one substrate holder. The at least one substrate holder includes a base portion, a first supporting portion, and a second supporting portion. The base portion has a flat surface. The first supporting portion is disposed on the flat surface and includes a curved surface. The second supporting portion is disposed on the flat surface and protrudes from it.
    Type: Application
    Filed: January 4, 2024
    Publication date: August 8, 2024
    Inventors: Cheng-Wei LIU, Liang-Cheng MA
  • ANTENNA STRUCTURE
    Publication number: 20240266735
    Abstract: An antenna structure includes a first radiation element, a second radiation element, a third radiation element, a first floating metal element, a second floating metal element, a tuning circuit, and a nonconductive support element. The first radiation element has a feeding point. The second radiation element is coupled to the feeding point. The third radiation element is coupled through the tuning circuit to a ground voltage. The first floating metal element is disposed between the second radiation element and the third radiation element. The second floating metal element is disposed between the first radiation element and the third radiation element. The first radiation element, the second radiation element, the third radiation element, and the tuning circuit are disposed on the nonconductive support element.
    Type: Application
    Filed: January 5, 2024
    Publication date: August 8, 2024
    Inventors: Li-Kai KUO, Cheng-Wei CHIANG, Wen-Pin HO
  • METHOD OF UPDATING FIRMWARE OF COMPUTER
    Publication number: 20240264824
    Abstract: A method of updating a firmware of a computer including a motherboard that has a BMC and a first CPLD, and a backplane that has a second CPLD having a flash memory. The method including steps of: the first CPLD changing a logical value of a signal when the first CPLD determines that a power of the computer is in a desired range; the BMC receiving the signal, and being initiated once the logical value of the signal has been changed; when the BMC is to update a firmware of the second CPLD, the BMC changing a logical value of a register of the first CPLD; and when the first CPLD determines that the logical value of the register has been changed, the first CPLD decoding and verifying a firmware code that is received from the BMC, and updating the firmware code thus decoded and verified to the flash memory.
    Type: Application
    Filed: January 26, 2024
    Publication date: August 8, 2024
    Applicant: Mitac Computing Technology Corporation
    Inventor: Cheng-Wei SUN
  • IMAGE ENCODING DEVICE AND WEIGHTED PREDICTION IMAGE ENCODING METHOD
    Publication number: 20240267551
    Abstract: A weighted prediction image encoding method includes: calculating a first feature value of a first frame, a second feature value of a second frame and a third feature value of a third frame; calculating a first offset value according to the first feature value and the second feature value, and calculating a second offset value according to the second feature value and the third feature value; and when both of the first offset value and the second offset value are greater than or less than a predetermined value, encoding the third frame by utilizing weighted prediction operation, wherein the first frame, the second frame and the third frame are multiple frames in chronological order.
    Type: Application
    Filed: November 3, 2023
    Publication date: August 8, 2024
    Inventors: Shao-Bo ZHANG, Cheng-Wei ZHENG, Jian-Qiang DU, Zhen-Bao HUANG
  • SCHOTTKY DIODE AND METHOD OF FABRICATION THEREOF
    Publication number: 20240258439
    Abstract: A method of forming a semiconductor device includes providing a first isolation feature in a substrate, where the first isolation feature defines and isolates a cathode region of a Schottky barrier diode (SBD) from an anode region of the SBD. In some embodiments, the method further includes forming a patterned resist protective oxide (RPO) layer over the first isolation feature. Thereafter, the method further includes forming a first metal contact that extends through the patterned RPO layer and extends into the first isolation feature.
    Type: Application
    Filed: January 30, 2023
    Publication date: August 1, 2024
    Inventors: Cheng-Wei WU, Yu-Chi LIAO
  • Selective Formation Of Titanium Silicide And Titanium Nitride By Hydrogen Gas Control
    Publication number: 20240249948
    Abstract: The present disclosure relates to a method for fabricating a semiconductor structure. The method includes providing a substrate with a gate structure, an insulating structure over the gate structure, and a S/D region; depositing a titanium silicide layer over the S/D region with a first chemical vapor deposition (CVD) process. The first CVD process includes a first hydrogen gas flow. The method also includes depositing a titanium nitride layer over the insulating structure with a second CVD process. The second CVD process includes a second hydrogen gas flow. The first and second CVD processes are performed in a single reaction chamber and a flow rate of the first hydrogen gas flow is higher than a flow rate of the second hydrogen gas flow.
    Type: Application
    Filed: March 28, 2024
    Publication date: July 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Wei CHANG, Kao-Feng LIN, Min-Hsiu HUNG, Yi-Hsiang CHAO, Huang-Yi HUANG, Yu-Ting LIN
  • Manufacturing method of electronic device
    Patent number: 12043011
    Abstract: An manufacturing method of an electronic device includes: providing a first substrate and a second substrate; attaching an adhesive member onto the first substrate; and performing a curve attaching step, so that the first substrate and the second substrate are attached to each other through the adhesive member to form a curved composite component, wherein the curve attaching step is performed at a temperature of 20 degrees Celsius to 160 degrees Celsius.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: July 23, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Cheng-Wei Liu, Fang-Cheng Jhou, Cheng-Chun Zhou
  • Temporary bonding composition, temporary bonding film, composite film, temporary bonding method and semiconductor wafer package
    Patent number: 12043770
    Abstract: A temporary bonding composition is provided. The temporary bonding composition includes a polyfunctional crosslinker, a polymer and a solvent. The polyfunctional crosslinker includes a compound containing at least two functional groups selected from the group consisting of blocked isocyanate groups, alkenyl ether groups, and alkoxyhydrocarbyl groups. Each of the blocked isocyanate groups is an isocyanate group blocked by a blocking agent. The polymer has a functional group reacting with the polyfunctional crosslinker.
    Type: Grant
    Filed: December 29, 2019
    Date of Patent: July 23, 2024
    Assignee: Daxin Materials Corporation
    Inventors: Cheng-Wei Lee, Pei-Ci Cho, Chun-Hung Huang, Min-Chi Yang, Chi-Yen Lin, Yuan-Li Liao
  • Dual side contact structures in semiconductor devices
    Patent number: 12046634
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and methods of fabricating the same are disclosed. The semiconductor device includes first and second S/D regions, a nanostructured channel region disposed between the first and second S/D regions, a gate structure surrounding the nanostructured channel region, first and second contact structures disposed on first surfaces of the first and second S/D regions, a third contact structure disposed on a second surface of the first S/D region, and an etch stop layer disposed on a second surface of the second S/D region. The third contact structure includes a metal silicide layer, a silicide nitride layer disposed on the metal silicide layer, and a conductive layer disposed on the silicide nitride layer.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: July 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Wei Chang, Shuen-Shin Liang, Sung-Li Wang, Hsu-Kai Chang, Chia-Hung Chu, Chien-Shun Liao, Yi-Ying Liu
  • ANTI-PEEPING DISPLAY METHOD AND ANTI-PEEPING DISPLAY DEVICE
    Publication number: 20240241397
    Abstract: An anti-peeping display method and an anti-peeping display device are provided. The anti-peeping display method includes the following. A current display state of the anti-peeping display device is obtained. A designated display state is received and whether the designated display state matches the current display state is determined. In response to a determination result that the designated display state does not match the current display state, the anti-peeping display device is controlled to perform a progressive switching operation.
    Type: Application
    Filed: January 7, 2024
    Publication date: July 18, 2024
    Applicant: Coretronic Corporation
    Inventors: Cheng-Wei Zhu, Chin-Lung Chen