Abstract: An electric motor includes a motor main body and an inverter. The inverter is axially stacked on one end of the motor main body, and the inverter includes a gate driver, a control circuit, a capacitor module, a DC bus bar, a plurality of power modules and a plurality of AC bus bars. The power module includes a plurality of AC output terminals, a plurality of DC input terminals and a plurality of signal terminals, and the AC bus bars are respectively connected to corresponding AC output terminals and extend downward to a motor coil of the motor main body. The power modules and the corresponding DC input terminals are annularly arranged around the capacitor module, the DC bus bar is extended and electrically connected to the corresponding DC input terminals and the capacitor module.

Abstract: An integrated heat dissipation module structure includes a metallic top cover, a metallic bottom cover, a working space, capillary structures and a working fluid in the working space. The top cover includes oppositely an outer heat-dissipating surface having a plurality of columnar heat dissipation structures protruding therefrom and an inner condensation surface surrounded by a top frame. The inner condensation surface has parallel top grooves. The bottom cover includes oppositely an outer heat-absorption surface having screw holes for locking electronic elements and an inner evaporation surface surrounded by a bottom frame. The inner evaporation surface has parallel bottom grooves, protrusive supporting structures disposed between the bottom grooves, and screw-hole protrusions corresponding to the screw holes. The capillary structures are disposed within the bottom grooves or both the bottom and top grooves. The working fluid is in the working space and the capillary structures.

Abstract: Disclosed herein are testing apparatuses for testing stresses in substrates. The testing apparatus includes a base, a first plate coupled to the base, the first plate being movable relative to the base along a first axis, a second plate coupled to the base, the second plate being movable relative to the base and relative to the first plate along a second axis that is perpendicular to the first axis, a first actuator operable to move the first plate along the first axis towards or away from the second plate, a second actuator operable to move the second plate along the second axis relative to the first plate, and a controller operatively connected to the first actuator and the second actuator operable to control movement of the first plate and the second plate.

Abstract: Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.

Abstract: A heat insulation pad applied to an electronic device is provided. The electronic device includes a housing and a heat source. The housing includes an inner side surface. The heat insulation pad includes a first contact layer, a second contact layer, and a hole layer stack structure. The first contact layer is adapted to attach to the inner side surface. The second contact layer is adapted to contact the heat source. The hole layer stack structure includes a plurality of hole layers stacked in sequence and is located between the first contact layer and the second contact layer. An electronic device with the heat insulation pad is further provided.

Abstract: A printed circuit board (PCB) is disclosed. The PCB includes a substrate having a plurality of through holes, a plurality of thermally-conductive blocks disposed in the through holes respectively, bonding structures respectively disposed in each through holes, and a metal circuit formed on the substrate. Particularly, the thermally-conductive block is tightly attached to the inner wall of the through hole through the bonding structure. In brief, the bonding structure includes a metal block and metal layers coated on both surfaces of the metal block to replace the conventional adhesive layer made of epoxy resin to tightly fix the thermally-conductive block in the through hole.

Abstract: A nozzle structure with forward and reverse water sealing, comprising a nozzle head, a cover, and a plurality of sealing rings. The two ends of the nozzle head are the water-filling end and the spraying end respectively, a drainage aperture is pierced on the side of the spraying end, a guide cone is provided at the upper end, and a stopper is installed convexly on the outer periphery at the end portion of spraying end. The cover is sleeved on the nozzle head, which can rotate forwardly and reversely. The sealing rings are set on the nozzle head and the cover respectively. When the cover is rotated to the forward or reverse end, both ends of the cover can be sealed by the sealing rings to seal off the water.

Abstract: An intelligent detection system includes an image module, a target detection module, and a physical model processing module. The target detection module runs a scanning mode on the target object and controls the image module to capture target images of the target object with different physical properties under the scanning mode. The scanning mode is allowed to be based on luminescence or thermal radiation emitted by variation of time, voltage, current, or illumination. The physical model processing module receives the target images and carries out an image stacking process with each target image based on different physical properties, generating a detection result image through physical formula of electronic circuit in cooperation with a chromaticity coordinate diagram.

Abstract: A semiconductor structure including the following components is provided. A first capacitor structure includes first, second, and third electrode layers and first and second dielectric layers. The second electrode layer is disposed on the first electrode layer. The top-view pattern of the second electrode layer partially overlaps the top-view pattern of the first electrode layer to have a first overlapping region. The third electrode layer is disposed on the second electrode layer. The top-view pattern of the third electrode layer partially overlaps the top-view pattern of the second electrode layer to have a second overlapping region. The first overlapping region and the second overlapping region have the same top-view area. The first dielectric layer is disposed between the first electrode layer and the second electrode layer. The second dielectric layer is disposed between the second electrode layer and the third electrode layer.

Abstract: Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate having a first side and a second side opposing the first side. The substrate has one or more sidewalls defining a trench extending along opposing sides of a pixel region having a first width. An isolation structure including one or more dielectric materials is disposed within the trench. The isolation structure has a second width. An image sensing element and a focal region are disposed within the pixel region. The focal region is configured to receive incident radiation along the second side of the substrate. A ratio of the second width to the first width is in a range of between approximately 0.1 and approximately 0.2, so that the focal region is completely confined between interior sidewall of the isolation structure facing the image sensing element.

Abstract: An information handling system detects an initial insertion of an alternating current (AC) adapter, and determines an identifier associated with the AC adapter. The system may also determine a parameter for attenuating noise generated by the AC adapter based on the identifier, and attenuate the noise generated by the AC adapter by applying the parameter.

Abstract: A semiconductor pattern is provided in the present invention, including a first line extending to one end in a first direction and a second line extending in a second direction perpendicular to the first direction and adjacent to the end of the first line in the first direction, wherein the end of the first line is provided with a rounding feature, the first line has a width in the second direction, and the width is gradually increased to a maximum width toward the end and gradually converged to form the rounding feature.

Abstract: A photographing system lens assembly includes eight lens elements, the eight lens elements being, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, a sixth lens element, a seventh lens element and an eighth lens element. Each of the eight lens elements has an object-side surface towards the object side and an image-side surface towards the image side.

Abstract: Provided is an electronic package providing a circuit structure having auxiliary circuit layers. Further, an electronic component is disposed on the circuit structure and electrically connected to the auxiliary circuit layers. In addition, an encapsulant covers the electronic component, and the circuit structure is disposed on the package substrate having a plurality of main circuit layers, such that the main circuit layers are electrically connected to the auxiliary circuit layers. As such, a number of layers of the auxiliary circuit layers is used to replace a layer number configuration of the main circuit layers.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a substrate, at least two gate structures disposed over the substrate, each of the at least two gate structures including a gate electrode and a spacer disposed along sidewalls of the gate electrode, wherein the spacer includes a refill portion and a bottom portion, the refill portion of the spacer has a funnel shape such that a top surface of the refill portion of the spacer is larger than a bottom surface of the refill portion of the spacer, and a source/drain contact disposed over the substrate and between the spacers of the at least two gate structures.

Abstract: A semiconductor light-emitting device includes a substrate, a connection structure disposed on the substrate, a semiconductor light-emitting unit disposed on the connection structure, and first and second electrodes. The connection structure includes an insulating layer formed with a through hole, a first electrically connecting layer disposed on the insulating layer and electrically connected to the first electrode, and a second electrically connecting layer disposed between the substrate and the insulating layer and extending through the through hole to be electrically connected to the second electrode. A projection of the second electrode on the insulating layer covers a portion of the insulating layer.

Abstract: An integrated circuit (IC) device includes a master latch circuit having a data output, a slave latch circuit having a data input electrically coupled to the data output of the master latch circuit, and a clock circuit electrically coupled to the master latch circuit and the slave latch circuit. The slave latch circuit is physically between the master latch circuit and at least a part of the clock circuit.

Abstract: An observation carrier includes a bottom base, a lower cover, an upper cover, and a rotation cover. The bottom has at least one first positioning portion. The lower cover has at least one second positioning portion, and at least one third positioning portion. The lower cover is detachably disposed on the bottom base and positioned with the first positioning portion through the second positioning portion. The upper cover has at least one fourth positioning portion and is detachably disposed on the bottom base. The upper cover is positioned with the third positioning portion through the fourth positioning portion. An observation region is formed between the upper cover and the lower cover. The rotation cover is detachably disposed on the bottom base to limit the upper and lower covers on the bottom base. The rotation cover is adapted to rotate to be locked or released by the bottom base.