Patents by Inventor Cheng-Yu (Sean) Lin

Cheng-Yu (Sean) Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240065609
    Abstract: Disclosed are methods and devices of generating predicted brain images. The present disclosure provides a method of generating a predicted brain image. The method comprises: receiving a first brain image; encoding the first brain image to generate a latent vector; and decoding the latent vector and one or more conditional features to generate the predicted brain image. The first brain image is generated by a magnetic resonance imaging (MRI) method. The one or more conditional features include at least one of: an age in future, a gender, previous brain images, omics features, and medical history. The latent vector is multiplied by a first normal distribution.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Inventors: Yi-Tien LI, Cheng-Yu CHEN
  • Publication number: 20240071656
    Abstract: A circuit protection device includes a first temperature sensitive resistor, a second temperature sensitive resistor, an electrically insulating multilayer, a first and second electrode layer, and at least one external electrode. The first temperature sensitive resistor and the second temperature sensitive resistor are electrically connected in parallel, and have a first upper electrically conductive layer and a second lower electrically conductive layer, respectively. The electrically insulating multilayer includes an upper insulating layer, a middle insulating layer, and a lower insulating layer. The upper insulating layer is between the first upper electrically conductive layer and the first electrode layer. The middle layer is laminated between the first temperature sensitive resistor and the second temperature sensitive resistor. The lower insulating layer is between the second lower electrically conductive layer and the second electrode layer.
    Type: Application
    Filed: January 13, 2023
    Publication date: February 29, 2024
    Inventors: Chien Hui WU, Yung-Hsien CHANG, Cheng-Yu TUNG, Ming-Hsun LU, Yi-An SHA
  • Publication number: 20240072413
    Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 29, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Cheng-Yu HO, Meng-Wei HSIEH, Chih-Pin HUNG
  • Patent number: 11916263
    Abstract: A cross-flow interconnect and a fuel cell stack including the same, the interconnect including fuel inlets and outlets that extend through the interconnect adjacent to opposing first and second peripheral edges of the interconnect; an air side; and an opposing fuel side. The air side includes an air flow field including air channels that extend in a first direction, from a third peripheral edge of the interconnect to an opposing fourth peripheral edge of the interconnect; and riser seal surfaces disposed on two opposing sides of the air flow field and in which the fuel inlets and outlets are formed. The fuel side includes a fuel flow field including fuel channels that extend in a second direction substantially perpendicular to the first direction, between the fuel inlets and outlets; and a perimeter seal surface surrounding the fuel flow field and the fuel inlets and outlets.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: February 27, 2024
    Assignee: BLOOM ENERGY CORPORATION
    Inventors: Michael Gasda, Vijay Srivatsan, Robert M. Hintz, Swaminathan Venkataraman, Padiadpu Shankara Anantha, Emad El Batawi, Cheng-Yu Lin, Sagar Mainkar, Gilbert Richards, Jonathan Scholl
  • Publication number: 20240063975
    Abstract: A dynamic adjustment method for RS reception is provided. The dynamic adjustment method for RS reception includes the following steps. A processor of an apparatus may detect at least one channel condition to generate a detection result. Then, the processor may determine an RS reception scheduling based on the detection result. Then, the processor may perform an RS reception based on the RS reception scheduling to receive RSs from a network node.
    Type: Application
    Filed: August 8, 2023
    Publication date: February 22, 2024
    Inventors: Hsien-Wen HU, Qian-Zhi HUANG, Ying-Hsuan SU, Teng-Yuan CHANG, Cheng-Yu TSAI
  • Publication number: 20240063048
    Abstract: A workpiece chuck includes a supporting platform, a vacuum system, and a gas permeable buffer layer. The supporting platform has a supporting surface for holding a workpiece thereon. The vacuum system is disposed under and in gas communication with the supporting platform. The gas permeable buffer layer is disposed over the supporting platform and covers the supporting surface, wherein a hardness scale of the gas permeable buffer layer is smaller than a hardness scale of the supporting platform.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 22, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Ching Lo, Ching-Pin Yuan, Wei-Jie Huang, Cheng-Yu Kuo, Yi-Yang Lei, Ching-Hua Hsieh
  • Patent number: 11899945
    Abstract: A method for performing communications specification version control of a memory device in predetermined communications architecture with aid of compatibility management, associated apparatus and computer-readable medium are provided.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: February 13, 2024
    Assignee: Silicon Motion, Inc.
    Inventors: Hong-Ren Fang, Chun-Che Yang, Cheng-Yu Lee, Te-Kai Wang
  • Patent number: 11901455
    Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Su-Hao Liu, Kuo-Ju Chen, Kai-Hsuan Lee, I-Hsieh Wong, Cheng-Yu Yang, Liang-Yin Chen, Huicheng Chang, Yee-Chia Yeo, Syun-Ming Jang, Meng-Han Chou
  • Publication number: 20240047497
    Abstract: An image sensor includes a semiconductor substrate having a first surface and a second surface opposite to the first surface in a vertical direction, a first isolation structure disposed in the semiconductor substrate for defining pixel regions, a visible light detection structure, an infrared light detection structure, and a reflective layer. The visible light detection structure and the infrared light detection structure are disposed within the same pixel region. The visible light detection structure includes a first portion disposed between the second surface and the infrared light detection structure in the vertical direction and a second portion disposed between the infrared light detection structure and the first isolation structure in a horizontal direction. The infrared light detection structure is disposed between the reflective layer and the first portion in the vertical direction. The second portion is not sandwiched between the reflective layer and the second surface in the vertical direction.
    Type: Application
    Filed: October 16, 2023
    Publication date: February 8, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Cheng-Yu Hsieh
  • Patent number: 11884154
    Abstract: A detection system for a vehicle comprises a blind spot detection module and a glasses module. The blind spot detection module comprises a first video recording device recording a vehicle surrounding image; a first identification device generating a blind spot identification result; a first determination device determining whether to transmit the vehicle surrounding image and/or a blind spot warning message; and a transmitting device transmitting the vehicle surrounding image and/or the blind spot warning message.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: January 30, 2024
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventor: Cheng-Yu Wu
  • Publication number: 20240028093
    Abstract: Described are system and methods for maximizing charging power to an information handling system (IHS) from a programmable power supply (PPS). The IHS and the PPS initiate communication with one another. Information is exchanged as to the capabilities of the PPS for providing charging power to battery cells of the IHS, and information as to the battery cells of the HIS. Charging power from the PPS based on the configuration and capability of the battery cells of the IHS, and charging power is kept at a maximum power throughout charging of the battery cells.
    Type: Application
    Filed: July 22, 2022
    Publication date: January 25, 2024
    Applicant: Dell Products L.P.
    Inventors: Geroncio Ong Tan, Wei Cheng Yu, Chi-Che Wu, Tsung-Cheng Liao
  • Publication number: 20240029769
    Abstract: Systems and method are provided for a memory circuit that includes a bit cell responsive to a bit line signal line and a bit line bar signal line configured to store a bit of data. A pre-charge circuit is configured to charge one of the bit line and bit line bar signal lines prior to a read operation, where the pre-charge circuit includes a first pre-charge component and a second pre-charge component, the first and second pre-charge components being individually controllable for charging the bit line and bit line bar signal lines.
    Type: Application
    Filed: July 26, 2023
    Publication date: January 25, 2024
    Inventors: Wei-Cheng Wu, Kao-Cheng Lin, Chih-Cheng Yu, Pei-Yuan Li, Chien-Chen Lin, Wei Min Chan, Yen-Huei Chen
  • Publication number: 20240019486
    Abstract: A method includes forming a reconstructed wafer, which includes placing a plurality of package components over a carrier, forming an interconnect structure over and electrically interconnecting the plurality of package components, forming top electrical connectors over and electrically connecting to the interconnect structure, and forming alignment marks at a same level as the top electrical connectors. Probe pads in the top electrical connectors are probed, and the probing is performed using the alignment marks for aligning to the probe pads. An additional package component is bonded to the reconstructed wafer through solder regions. The solder regions are physically joined to the top electrical connectors.
    Type: Application
    Filed: January 9, 2023
    Publication date: January 18, 2024
    Inventors: Cheng-Chieh Wu, Kuo-Lung Pan, Shu-Rong Chun, Hao-Yi Tsai, Po-Yuan Teng, Mao-Yen Chang, Cheng Yu Liu, Chia-Wen Lin
  • Publication number: 20240017538
    Abstract: A lamination chuck for lamination of film materials includes a support layer and a top layer. The top layer is disposed on the support layer. The top layer includes a polymeric material having a Shore A hardness lower than a Shore hardness of a material of the support layer. The top layer and the support layer have at least one vacuum channel formed therethrough, vertically extending from a top surface of the top layer to a bottom surface of the support layer.
    Type: Application
    Filed: August 2, 2023
    Publication date: January 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Jie Huang, Yu-Ching Lo, Ching-Pin Yuan, Wen-Chih Lin, Cheng-Yu Kuo, Yi-Yang Lei, Ching-Hua Hsieh
  • Publication number: 20240021623
    Abstract: An electronic device is provided by the present disclosure. The electronic device includes a substrate; a first transistor disposed on the substrate and including a first semiconductor layer and a gate electrode; a first insulating layer disposed between the first semiconductor layer and the gate electrode; a second insulating layer disposed on the first insulating layer, wherein the first semiconductor layer and the gate electrode are located between the substrate and the second insulating layer; a barrier layer disposed on the second insulating layer; and a second transistor disposed on the barrier layer and including a second semiconductor layer, wherein the barrier layer is disposed between the second semiconductor layer and the second insulating layer.
    Type: Application
    Filed: June 12, 2023
    Publication date: January 18, 2024
    Applicant: InnoLux Corporation
    Inventors: Cheng-Yu YANG, Chih-Hao CHANG, Chia-Hao TSAI
  • Publication number: 20240022237
    Abstract: The disclosure relates to an oscillator control system with dynamic control for power saving.
    Type: Application
    Filed: July 7, 2023
    Publication date: January 18, 2024
    Inventors: Pengfei Ding, Chunlei Zhao, Cheng Yu
  • Publication number: 20240019836
    Abstract: A method for managing motion information is provided. The method obtains a motion document of a first operation target. The motion document of the first operation target recording information of motions of the first operation target. The method generates guiding information according to the motion document of the first operation target. The guiding information is configured to guide motions of second operation targets. The method obtains motion images of each second operation target. The method identifies information of motions of each second operation target from the motion images of each second operation target. The method further determines a pass rate of the motions of each second operation target according to the information of the motions of the first operation target and the information of the motions of each more second operation target. A related electronic device and a related non-transitory storage medium are provided.
    Type: Application
    Filed: April 27, 2023
    Publication date: January 18, 2024
    Inventors: CHENG-YU WANG, PO-CHENG CHEN, YU-TE LEE, TSUNG-SHENG CHEN
  • Publication number: 20240019629
    Abstract: A display device includes a bezel, first and second light guide plates (LGP), first and second light emitting element, first and second reflection sheets, a first fixing member, and at least one display panel. Each of the first and second LGPs has a bottom surface, a light exit surface, a light incident surface, and a first side surface. The first and second reflection sheets are located between the bezel and the first LGP and between the bezel and the second LGP, respectively. Bent portions of the first and second reflection sheets are disposed beside the first side surface of the first LGP and the first side surface of the second LGP, respectively and located between the first side surface of the first LGP and the first side surface of the second LGP. The first fixing member is sandwiched between the bent portions of the first and second reflection sheets.
    Type: Application
    Filed: December 19, 2022
    Publication date: January 18, 2024
    Applicant: AUO Corporation
    Inventors: Cheng-Yu Wang, Cheng-Min Tsai
  • Publication number: 20240021644
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor, and a method for forming the image sensor, in which an inter-pixel trench isolation structure is defined by a low-transmission layer. In some embodiments, the image sensor comprises an array of pixels and the inter-pixel trench isolation structure. The array of pixels is on a substrate, and the pixels of the array comprise individual photodetectors in the substrate. The inter-pixel trench isolation structure is in the substrate. Further, the inter-pixel trench isolation structure extends along boundaries of the pixels, and individually surrounds the photodetectors, to separate the photodetectors from each other. The inter-pixel trench isolation structure is defined by a low-transmission layer with low transmission for incident radiation, such that the inter-pixel trench isolation structure has low transmission for incident radiation.
    Type: Application
    Filed: August 8, 2023
    Publication date: January 18, 2024
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Chin-Chia Kuo, Wen-Hau Wu, Hua-Mao Chen, Chih-Kung Chang
  • Publication number: 20240021636
    Abstract: An optical structure and methods of forming an optical structure are provided. In some embodiments, the optical structure includes a substrate having a frontside and a backside opposite the frontside, a plurality of image-sensing elements arranged within the substrate, and a deep trench isolation (DTI) structure disposed between adjacent image-sensing elements. The DTI structure extends from the backside of the substrate to a first depth within the substrate and laterally surrounds the plurality of image-sensing elements. The optical structure further includes a light transmission layer formed over the backside of the substrate. The light transmission layer includes a first side and a second side adjacent to the backside of the substrate. The optical structure further includes a buried grid structure in the light transmission layer, the buried grid structure extending from the first side of the light transmission layer to a second depth within the light transmission layer.
    Type: Application
    Filed: July 15, 2022
    Publication date: January 18, 2024
    Inventors: Chieh-En CHEN, Chen-Hsien LIN, Tzu-Hsuan HSU, Cheng Yu HUANG, Wei-Chieh CHIANG