Abstract: A multi-gate ferroelectric memory comprises a fin-shaped channel layer, a front ferroelectric layer disposed on one side of the fin-shaped channel layer, a back ferroelectric layer disposed on another side of the fin-shaped channel layer, a front gate attached to the front ferroelectric layer and away from the fin-shaped channel layer, wherein the front gate is configured to connect a word line, and a back gate attached to the back ferroelectric layer and away from the fin-shaped channel layer, wherein the back gate is configured to connect a bit line. The present disclosure further discloses a memory array device, comprises a plurality of the multi-gate ferroelectric memories arranged as an array, a plurality of word lines and a plurality of bit lines.

Abstract: A semiconductor cleaning solution for cleaning a surface of a semiconductor device, and a method of use and a method of manufacture of the cleaning solution are disclosed. In an embodiment, a material is polished away from a first surface of the semiconductor device and the first surface is cleaned with the cleaning solution. The cleaning solution may include a host having at least one ring. The host may have a hydrophilic exterior and a hydrophobic interior.

Abstract: A chemical mechanical polishing (CMP) system includes a polishing pad configured to polish a substrate. The CMP system further includes a heating system configured to adjust a temperature of the polishing pad. The heating system comprises at least one heating element spaced apart from the polishing pad. The CMP system further includes a sensor configured to measure the temperature of the polishing pad.

Abstract: In-situ defect count detection in post chemical mechanical polishing (post-CMP) is provided. Post-CMP is performed, in-situ and according to a recipe, on a surface of a semiconductor wafer within a post-CMP chamber. A light signal is scanned over a target area of the surface of the semiconductor wafer and a reflected light signal reflected from the target area is detected. A defect count of defects present in the target area is determined based on the reflected light signal reflected from the target area.

Abstract: A non-pneumatic tire includes a tread layer and a spoke layer including an inner cylinder and several spoke assemblies. The tread layer is annular and has a maximum outer diameter of the non-pneumatic tire and is adapted to be in contact with a ground. The spoke assemblies extend in a radial direction of the non-pneumatic tire and are arranged around an axial core of the non-pneumatic tire. An end of each spoke assembly is connected to the inner cylinder, and another end thereof is connected to the tread layer. Each spoke assembly includes a straight spoke, a bending spoke, and a connecting rib. Each bending spoke includes a first segment and a second segment, which are not connected in a straight line. Each connecting rib has a first end connected to the straight spoke and a second end opposite to the first end and connected to the bending spoke. When the non-pneumatic tire bears a weight and is squeezed, the spoke assemblies do not get in contact with one another.

Abstract: The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.

Abstract: An amplifier circuit having low parasitic pole effect includes a preamplifier, an output transistor and a buffer circuit. The buffer circuit generates a driving signal to control the output transistor according to a preamplification signal generated by the preamplifier. The buffer circuit includes: a buffer input transistor generating the driving signal, wherein an input impedance at its control end is less than that of the output transistor; a low output impedance circuit having an output impedance which is less than an inverting output impedance of the buffer input transistor; an amplification transistor generating an amplification signal at its inverting output; and an amplification stage circuit amplifying the amplification signal by an amplification ratio, so that an equivalent output impedance at a non-inverting output of the buffer input transistor is less than or equal to a product of the reciprocal of an intrinsic output impedance thereof and an amplification ratio.

Abstract: An electronic package is provided and includes at least one protective structure positioned between a first electronic element and a second electronic element on a carrier for reducing stresses generated inside the first electronic element and the second electronic element when a filling material is formed on the carrier, encapsulates the protective structure and comes into contact with the first electronic element and the second electronic element, thereby preventing cracking of the first electronic element and the second electronic element and improving the reliability of the electronic package.

Abstract: A method for fabricating an electronic package is provided. A filling material is formed in an interval S, at which a plurality of electronic components disposed on a carrying structure are spaced apart from one another. The filling material acts as a spacer having a groove, and the groove acts as a stress buffering region. Therefore, the electronic components can be prevented from being broken due to stress concentration.

Abstract: A light emit diode (LED) driving circuit, an LED driving method and a display device thereof are provided. The LED driving circuit includes: a first LED driving unit for driving first and second color LEDs of the LED circuit. The first LED driving unit includes: a duty cycle circuit generating an enable signal based on at least two color light duty cycle signals, the at least two color light duty cycle signals controlling an emitting cycle of the LED circuit; a current control circuit, generating at least two color light current adjustment signals based the at least two color light duty cycle signals and at least two color light current level signals; and a constant current circuit, for adjusting current levels of the first and the second color LEDs of the LED circuit based on the enable signal and the at least two color light current adjustment signals.

Abstract: This disclosure is directed to a flameproof electronic device having a housing, an electronic assembly, and a thermal-expandable structure. The housing has a pair of vents. The electronic assembly is accommodated in the housing, at least a part of the electronic assembly is spaced from the housing to enclose a flow channel between the electronic component and an internal surface of the housing, and the flow channel communicates with the vent. The thermal-expandable structure covers the internal surface of the housing or an external surface of the electronic assembly. The heat-expandable structure expands to block the flow channel when being heated to greater than or equal to a predetermined temperature.

Abstract: A state detection circuit for detecting whether a state of an input node is floating, grounded, or electrically connected to an external voltage includes: a unidirectional device circuit and a determination circuit. The unidirectional device circuit electrically conducts a test node to a detection node unidirectionally. The detection node is coupled to the input node. The test node, the unidirectional device circuit, the detection node and the input node form a current path. The determination circuit determines a state of the input node according to a voltage level of the detection node. Within a detection stage, the state detection circuit provides a test voltage at the test node. A voltage of the detection node is determined by the input node, the test voltage, and a characteristic of the unidirectional device circuit.

Abstract: A method for CMP includes following operations. A metal layer is received. A CMP slurry composition is provided in a CMP apparatus. The CMP slurry composition includes at least a first oxidizer and a second oxidizer different from each other. The first oxidizer is oxidized to form a peroxidant by the second oxidizer. A portion of the metal layer is oxidized to form a first metal oxide by the peroxidant. The first metal oxide is re-oxidized to form a second metal oxide by the second oxidizer.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

Abstract: The current disclosure describes techniques of protecting a metal interconnect structure from being damaged by subsequent chemical mechanical polishing processes used for forming other metal structures over the metal interconnect structure. The metal interconnect structure is receded to form a recess between the metal interconnect structure and the surrounding dielectric layer. A metal cap structure is formed within the recess. An upper portion of the dielectric layer is strained to include a tensile stress which expands the dielectric layer against the metal cap structure to reduce or eliminate a gap in the interface between the metal cap structure and the dielectric layer.

Abstract: A chemical mechanical polishing (CMP) system includes a polishing pad configured to polish a substrate. The CMP system further includes a heating system configured to adjust a temperature of the polishing pad. The heating system comprises at least one heating element spaced apart from the polishing pad. The CMP system further includes a sensor configured to measure the temperature of the polishing pad.

Abstract: A folding cutting mat having a first and second side boards and a flexible connecting plate. The first and second side boards respectively include a cutting surface, a back surface and a waved joining edge. The first and second side boards are connected to each other through the waved joining edges to form a folding portion. The flexible connecting plate is bonded on the back surfaces of the first and second side boards through a bonding material. The waved joining edge is formed with first and second end sides. A plurality of unit blocks is formed between the first and second ends in continuous and staggered distributions. A center line is defined between the first and second ends to divide each of the unit blocks into first and second surface areas. The distribution area of the bonding material covers the second surface areas of each of the unit blocks.

Abstract: Disclosed is a folding cutting mat. As its main features, the folding cutting mat includes more than one 4-piece folding unit, the single 4-piece folding unit includes a folding face and a flipping face integrally formed, wherein the folding face includes left and right side faces and a first folding line to connect the left and right side faces, the flipping face includes left and right side plates and a separating gap to separate the left and right side plates; the left side face and left side plate are connected through a second folding line, the right side face and the right side plate are connected through a third folding line. With the size of the folded 4-piece folding unit reduced to one fourth of the size in the unfolded state, the size of the folded cutting mat is considerably reduced to facilitate transportation and storage.

Abstract: An electronic package is provided and includes at least one protective structure positioned between a first electronic element and a second electronic element on a carrier for reducing stresses generated inside the first electronic element and the second electronic element when a filling material is formed on the carrier, encapsulates the protective structure and comes into contact with the first electronic element and the second electronic element, thereby preventing cracking of the first electronic element and the second electronic element and improving the reliability of the electronic package.

Abstract: A method for CMP includes following operations. A metal stack is received. The metal layer stack includes at least a first metal layer and a second metal layer, and a top surface of the first metal layer and a top surface of the second metal layer are exposed. A protecting layer is formed over the second metal layer. A portion of the first metal layer is etched. The protecting layer protects the second metal layer during the etching of the portion of the first metal layer. A top surface of the etched first metal layer is lower than a top surface of the protecting layer. The protecting layer is removed from the second metal layer.