Patents by Inventor Chi Chen
Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12121430Abstract: Apparatuses of reusable diapers and methods for manufacturing the same are provided. In one embodiment, a diaper includes an interior layer includes an excretion area, where the excretion area includes one or more openings configured to drain excretions of a user away from the interior layer, a middle layer configured to house an excretion collection unit, where the excretion collection unit is configured to store the excretions from the interior layer, an exterior layer configured to conceal and prevent leakage from the middle layer of the diaper, and a support frame configured to hold the interior layer, the middle layer and the exterior layer of the diaper together.Type: GrantFiled: November 28, 2023Date of Patent: October 22, 2024Inventors: Chi Chen Hsien, Thomas C. Chan
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Patent number: 12125868Abstract: A semiconductor device with dummy and active pixel structures and a method of fabricating the same are disclosed. The semiconductor device includes a first pixel region with a first pixel structure, a second pixel region, surrounding the first pixel region, includes a second pixel structure adjacent to the first pixel structure and electrically isolated from the first pixel structure, and a contact pad region with a pad structure disposed adjacent to the second pixel region. The first pixel structure includes a first epitaxial structure disposed within a substrate and a first capping layer disposed on the first epitaxial structure. The second pixel structure includes a second epitaxial structure disposed within the substrate and a second capping layer disposed on the second epitaxial structure. Top surfaces of the first and second epitaxial structures are substantially coplanar with each other. The first and second epitaxial structures includes a same semiconductor material.Type: GrantFiled: April 10, 2023Date of Patent: October 22, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Wei Chen, Chung-Chuan Tseng, Chiao-Chi Wang, Chia-Ping Lai
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Patent number: 12125526Abstract: A memory is provided that includes bitcell VDD boosting to increase a read margin. In some implementations, the positive boost for the bitcell VDD may be provided by a capacitor that is also used for negative boosting of a write driver.Type: GrantFiled: March 30, 2022Date of Patent: October 22, 2024Assignee: QUALCOMM INCORPORATEDInventors: Chulmin Jung, Xiao Chen, Chi-Jui Chen, Anil Chowdary Kota, Dhvani Sheth
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Patent number: 12125457Abstract: A signal processing circuit, complying with DisplayPort standard and operated in a display device which is as a DisplayPort sink device, includes a main physical circuit, which is configured to receive a first signal from one of a plurality of DisplayPort connectors of the display device connected to a first DisplayPort source device and a plurality of auxiliary physical circuits. Only a first auxiliary physical circuit of the plurality of auxiliary physical circuits is enabled to receive a second signal from the DisplayPort connector connected to the first DisplayPort source device.Type: GrantFiled: December 1, 2021Date of Patent: October 22, 2024Assignee: NOVATEK Microelectronics Corp.Inventors: Wen-Chi Lin, Li-Wei Chen, Hsiang-Chih Chen, Pao-Yen Lin, Cheng-Wei Sung, Chung-Wen Hung
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Publication number: 20240343922Abstract: The present invention discloses an aerogel paint with smoke-free, fireproof and high heat insulation properties and preparation method thereof. The method comprises steps of: (1) mixed hydrolysis, (2) condensation and dispersion, (3) atmospheric drying, (4) high-temperature-resistant glue mixing, (5) homogenizing and dispersing. In this technology, the aerogel particles can be prepared by condensation under suspension and dispersion, and the aerogel particles have more uniform particle sizes. After being dried with hot air on an atmospheric condition, the aerogel paint is then prepared by mixing a high-temperature-resistant glue solution with the dried aerogel particles to obtain an aerogel paint being smoke-free, toxic-free, highly fire-proof and highly heat insulative. The products developed in the present invention withstand impact of high-temperature flames more than 1200° C. for a long time, and remain unpenetrated of the aluminum plate.Type: ApplicationFiled: January 5, 2024Publication date: October 17, 2024Inventors: JEAN-HONG CHEN, CHENG-SHU CHIANG, YA-CHI KO, CHI-HUNG LO, WEN-YEN HSU
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Publication number: 20240347625Abstract: A semiconductor structure includes a substrate, a semiconductor layer, a gate stack, two first gate spacers over two opposing sidewalls of the gate stack and extending above the gate stack; a second gate spacer over a sidewall of one of the first gate spacers and having an upper portion over a lower portion; an etch stop layer adjacent to the lower portion and spaced away from the upper portion; and a seal layer over the gate stack, the two first gate spacers and the second gate spacer, resulting in a first void and a second void below the first seal layer. The first void is above the lower portion of the second gate spacer and laterally between the etch stop layer and the upper portion of the second gate spacer. The second void is above the gate stack and laterally between the two first gate spacers.Type: ApplicationFiled: June 24, 2024Publication date: October 17, 2024Inventors: Cheng-Chi Chuang, Lin-Yu Huang, Chia-Hao Chang, Yu-Ming Lin, Ting-Ya Lo, Chi-Lin Teng, Hsin-Yen Huang, Hai-Ching Chen
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Publication number: 20240347488Abstract: A chip structure is provided. The chip structure includes a semiconductor substrate. The chip structure includes a first conductive layer over the first dielectric layer. The chip structure includes a conductive via passing through the first conductive layer and electrically connected to the first conductive layer. The chip structure includes a conductive pad over and in direct contact with the conductive via. The chip structure includes a second conductive layer over and spaced apart from the first conductive layer. The chip structure includes a first dielectric layer conformally covering a second lower portion of a sidewall of the second conductive layer. The chip structure includes a third conductive layer over the first dielectric layer.Type: ApplicationFiled: June 25, 2024Publication date: October 17, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Fan HUANG, Mao-Nan WANG, Hui-Chi CHEN, Dian-Hau CHEN, Yen-Ming CHEN
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Publication number: 20240347389Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes first channel members over a first backside dielectric feature, second channel members over a second backside dielectric feature, a first epitaxial feature abutting the first channel members and over the first backside dielectric feature, a second epitaxial feature abutting the second channel members and over the second backside dielectric feature, a first gate structure wrapping around each of the first channel members, a second gate structure wrapping around each of the second channel members, and an isolation feature laterally stacked between the first backside dielectric feature and the second backside dielectric feature. A bottommost portion of the isolation feature is below bottom surfaces of the first and second gate structures, and a topmost portion of the isolation feature is above top surfaces of the first and second gate structures.Type: ApplicationFiled: June 25, 2024Publication date: October 17, 2024Inventors: Huan-Chieh SU, Li-Zhen YU, Chun-Yuan CHEN, Lo-Heng CHANG, Cheng-Chi CHUANG, Kuan-Lun CHENG, Chih-Hao WANG
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Publication number: 20240344360Abstract: An electronic control compound lock can be unlocked both electronically and mechanically. The lock comprises two lock cores and at least one latch tongue, which is movable or rotatable. The two lock cores are respectively unlocked mechanically or electronically through electronic signals. There are three configurations for the two lock cores to unlock the latch tongue. In the first configuration, the two lock cores are driven with each other and one of them unlocks the latch tongue. In the second configuration, the two lock cores connect an output unit, which unlocks the latch tongue. In the third configuration, the two lock cores respectively can unlock the latch tongue. In either configuration, when one of the two lock cores is unlocked, the latch tongue can be unlocked. Furthermore, a plurality of the locks can be unlocked at the same time through electronic signals, being convenient to use.Type: ApplicationFiled: April 10, 2024Publication date: October 17, 2024Inventors: Chia-Wei WENG, Yueh-Chen HUANG, Hao-Jhong LYU, Chi-Liang LIEN
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Publication number: 20240345622Abstract: A portable electronic device including a first body, a second body, and a light module is provided. The second body is pivotally connected to the first body. The light module is adjacent to the second body and is disposed on the first body. The light module includes a frame, a light guide plate, a light source, a patterned light guide film, and a light-transmitting cover plate. The frame is disposed on the first body. The light guide plate is disposed in the frame and has a light incident surface and a light emitting surface. The light source is disposed in the frame as corresponding to the light incident surface of the light guide plate. The patterned light guide film is detachably disposed on the light guide plate and covers the light emitting surface. The light-transmitting cover plate is detachably disposed on the frame and covers the patterned light guide film.Type: ApplicationFiled: November 20, 2023Publication date: October 17, 2024Applicant: Acer IncorporatedInventors: Hung-Chi Chen, Hsueh-Wei Chung, Pao-Ching Huang, Huei-Ting Chuang, Chao-Di Shen
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Publication number: 20240347288Abstract: A key structure including a base plate, a thin film circuit, a display key, an elastic supporting member, and a lifting mechanism is provided. The thin film circuit is disposed on the base plate. The display key is disposed above the thin film circuit. The elastic supporting member is disposed between the display key and the thin film circuit. The lifting mechanism is disposed between the display key and the base plate.Type: ApplicationFiled: November 21, 2023Publication date: October 17, 2024Applicant: Acer IncorporatedInventors: Hung-Chi Chen, Cheng-Han Lin, Chuan-Hua Wang, Po-Yi Lee, Pin-Chueh Lin
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Publication number: 20240347645Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first terminal coupled to a substrate of the semiconductor structure, with the first terminal including a first portion of a tunneling layer formed on the substrate, and a first gate formed on the first portion of the tunneling layer. The semiconductor structure includes a second terminal coupled to the substrate and adjacent to the first terminal, with the second terminal including a second portion of the tunneling layer formed on the substrate, a second gate formed on the second portion of the tunneling layer, and a dielectric structure formed on a top surface and side surfaces of the second gate. The semiconductor structure includes a third terminal coupled to an insulating structure and adjacent to the second terminal, with the third terminal including, a third gate formed on the insulating structure.Type: ApplicationFiled: June 24, 2024Publication date: October 17, 2024Inventors: Yu-Chu LIN, Wen-Chih CHIANG, Chi-Chung JEN, Ming-Hong SU, Mei-Chen SU, Chia-Wei LEE, Kuan-Wei SU, Chia-Ming PAN
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Patent number: 12120311Abstract: The present invention provides an encoder including a quantization circuit, an encoding circuit, an energy parameter calculation circuit and a quantization parameter determination circuit. The quantization circuit is configured to perform quantization operations on a plurality of CTUs in image data in sequence to generate quantized data respectively corresponding to the plurality of CTUs. The encoding circuit is configured to perform encoding operations on the quantized data of the plurality of CTUs in sequence to generate encoded data. The energy parameter calculation circuit is configured to receive the image data, and calculate a plurality of energy parameters respectively corresponding to the plurality of CTUs in the image data. The quantization parameter determination circuit is configured to determine a plurality of quantization parameters of the plurality of CTUs according to at least a portion of the plurality of energy parameters, for the quantization circuit to perform the quantization operations.Type: GrantFiled: February 8, 2023Date of Patent: October 15, 2024Assignee: Realtek Semiconductor Corp.Inventors: Weimin Zeng, Chi-Wang Chai, Wei Li, Wujun Chen, Wei Pu
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Patent number: 12118632Abstract: A method includes: acquiring a plurality of historical routes of movement of a plurality of historical users in a geographic area, wherein each historical route includes at least a portion of a plurality of locations; determining, based on the plurality of historical routes and a plurality of current positions of a plurality of users in the geographic area, a set of predicted locations among the plurality of locations that the plurality of users will visit in the future, respectively, wherein the plurality of users use a tour guiding service associated with the plurality of locations that is provided by a mobile network; selecting a set of popular locations from the set of predicted locations based on the number of users among the plurality of users who will visit each predicted location in the set of predicted locations; and scheduling tour guiding resources associated with the set of popular locations.Type: GrantFiled: November 18, 2021Date of Patent: October 15, 2024Assignee: EMC IP Holding Company LLCInventors: Yanjun Liu, Chi Chen, Tao Zhang, Zhiqiang Hu
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Patent number: 12116431Abstract: A light-curing resin composition, a three-dimensional object containing the same, and a manufacturing method of the three-dimensional object are provided. The light-curing resin composition includes a photoinitiator, an acrylic oligomer, an acrylic monomer, and expandable particles with hollow spherical shell structures. The acrylic monomer is a monofunctional monomer, a difunctional monomer, or a combination thereof.Type: GrantFiled: January 10, 2022Date of Patent: October 15, 2024Assignee: Industrial Technology Research InstituteInventors: Pei-Chi Chien, Ping-Chen Chen, Yaw-Ting Wu, Ching-Sung Chen
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Patent number: 12119321Abstract: A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section vieType: GrantFiled: September 19, 2022Date of Patent: October 15, 2024Assignee: EPISTAR CORPORATIONInventors: Shih-An Liao, Shau-Yi Chen, Ming-Chi Hsu, Chun-Hung Liu, Min-Hsun Hsieh
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Publication number: 20240339260Abstract: A transformer includes a magnetic core and four windings. The magnetic core includes a first flange, a second flange and a middle core part. The first terminal of the first winding, the third terminal of the second winding, the fifth terminal of the third winding and the seventh terminal of the fourth winding are disposed on the first flange. The second terminal of the first winding, the fourth terminal of the second winding, the sixth terminal of the third winding and the eighth terminal of the fourth winding are disposed on the second flange. The first winding and the second winding are twisted with each other to dispose around the middle core part. The third winding and the fourth winding are twisted with each other to dispose around the middle core part, or the third winding and the fourth winding are disposed around the middle core part in parallel.Type: ApplicationFiled: January 30, 2024Publication date: October 10, 2024Inventors: Yu-Chen Hsieh, Chieh-Tung Lu, Sheng-Heng Chung, Li-O Lee, Chi-Kai Lin, Chin-Hsin Lai
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Publication number: 20240339326Abstract: A method of trimming a wafer includes securing the wafer on a top surface of a wafer chuck of a wafer edge trimming apparatus, directing a water jet at an edge of the wafer to form a plurality of cracks at uniform intervals along the edge of the wafer, inserting a wedge of a removal module into a first crack of the plurality of cracks, and rotating the wafer, where during the rotation of the wafer, the wedge expands the first crack of the plurality of cracks and removes material from the edge of the wafer.Type: ApplicationFiled: April 10, 2023Publication date: October 10, 2024Inventors: Fang-I Chen, Pei-Keng Tsai, Hui-Chi Huang
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Publication number: 20240339406Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece having an interconnect structure that includes a first conductive feature, a second conductive feature disposed beside the first conductive feature, and an inter-level dielectric disposed between the first conductive feature and the second conductive feature. A conductive material of an etch stop layer is selectively deposited on the first conductive feature and on the second conductive feature without depositing the conductive material on the inter-level dielectric, and the inter-level dielectric is removed to form a gap between the first conductive feature and the second conductive feature.Type: ApplicationFiled: June 21, 2024Publication date: October 10, 2024Inventors: Tai-I Yang, Li-Lin Su, Yung-Hsu Wu, Hsin-Ping Chen, Cheng-Chi Chuang
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Publication number: 20240336828Abstract: The present disclosure provides an ultra-high temperature resistant cement slurry system for cementing and the preparation method and use thereof. The cement slurry system comprises cement, an ultra-high temperature strength stabilizer, an ultra-high temperature reinforcing material, a density regulator, an ultra-high temperature suspension stabilizer, a dispersant, a fluid loss additive, a retarder, a defoaming agent and water, wherein the ultra-high temperature suspension stabilizer comprises an ether-based starch, an aluminosilicate and a polyalcohol polymer. The method for preparing the cement slurry system includes dry mixing and wet mixing raw materials homogeneously, respectively, and then homogeneously mixing the dry mix and wet mix to obtain the cement slurry system. The present disclosure further provides use of the cement slurry system for cementing in deep wells and ultra-deep wells at high and ultra-high temperatures.Type: ApplicationFiled: December 2, 2022Publication date: October 10, 2024Inventors: Jianzhou JIN, Lili CHEN, Yuchao GUO, Hua ZHANG, Fuchen LIU, Yong MA, Yao WANG, Xiaobing ZHANG, Jiaying ZHANG, Zishuai LIU, Haizhi ZHANG, Pu XU, Youzhi ZHENG, Yongjin YU, Congfeng QU, Fengzhong QI, Yong LI, Ming XU, Guifu WANG, Shuoqiong LIU, Chi ZHANG, Bin LYU, Chongfeng ZHOU, Zhiwei DING, Shunping ZHANG, Jiwei JIANG, Qin HAN, Yusi FENG, Chenyang ZHOU, Yiliu SUN, Songbing YAN