Patents by Inventor Chi Hsieh

Chi Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110078363
    Abstract: A block management method for managing a plurality of physical blocks of a flash memory chip is provided. The block management method includes configuring a plurality of logical addresses; mapping the logical addresses to a plurality of logical blocks; and mapping the logical blocks to the physical blocks. Additionally, the block management method also includes obtaining deleting records related to a plurality of deleted logical addresses from a host system, wherein data stored in the deleted logical addresses is recognized as invalid by the host system. And, the block management method further includes obtaining a deleted logical block, marking each of the logical addresses mapped to the deleted logical block as a bad logical address, and linking the physical block mapped to the deleted logical block to a spare area. Accordingly, the block management method can effectively prolong the lifespan of a flash memory chip.
    Type: Application
    Filed: October 26, 2009
    Publication date: March 31, 2011
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Chih-Kang Yeh, Cheng-Chi Hsieh
  • Patent number: 7917832
    Abstract: An apparatus for improving the data access reliability of flash memory is provided, including an instruction register, an address register, a flash memory control circuit, a data register, an encoder, an error correction code (ECC) generator, a signal converter, a comparator, an arbitrator, and a decoder. The instruction register and the address register are connected to a flash memory respectively for storing the access instructions and the addresses. The flash memory control circuit is connected to both instruction register and address register for controlling the access to the flash memory. The data register is connected to flash memory control circuit for loading data to be written to the flash memory. The encoder encodes the written data, and the ECC generator generates an ECC, which is written to the flash memory through the signal converter. The comparator and the arbitrator provide the comparison with ECC and informing decoder f suspicious bit values when data is read from the flash memory.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: March 29, 2011
    Assignee: Genesys Logic, Inc.
    Inventors: Jen-Wei Hsieh, Tei-Wei Kuo, Hsiang-Chi Hsieh
  • Patent number: 7865953
    Abstract: An arrangement for performing active malicious web page discovery is provided. The arrangement includes a web monitor module, which is configured to monitor a plurality of potential suspicious unified resource locators (URLs). The arrangement also includes a crawler module, which is configured to download the plurality of potential suspicious URLs. The arrangement further includes a malicious page identifier (MPI), which is configured to verify a set of risk statuses for the plurality of potential suspicious URLs.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: January 4, 2011
    Assignee: Trend Micro Inc.
    Inventors: Sheng-chi Hsieh, Tse-Min Chen, Yi-Yun Tseng
  • Patent number: 7861028
    Abstract: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive segment, and each segment is configured to include at least a consecutive frame. Each frame is configured to include at least a consecutive page. Each virtual memory region is configured to include a plurality of areas, and each area is configured to include at least a virtual erase unit. The memory logical block region is configured to include a plurality of clusters, and each cluster includes at least a consecutive memory logical block.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: December 28, 2010
    Assignee: Genesys Logic, Inc.
    Inventors: Yi-Lin Tsai, Tei-Wei Kuo, Jen-Wei Hsieh, Yuan-Hao Chang, Hsiang-Chi Hsieh
  • Publication number: 20100288537
    Abstract: A circuit board module includes a circuit board and a heat-dissipating device. The circuit board includes a ceramic substrate, and a circuit pattern formed on a surface of the ceramic substrate. The circuit board is sinter-bonded to a main body of the heat-dissipating device. A method of making the circuit board module is also disclosed.
    Type: Application
    Filed: May 13, 2010
    Publication date: November 18, 2010
    Applicant: High Conduction Scientific Co., Ltd.
    Inventors: Wen-Chung Chiang, Keng-Chung Wu, Ying-Chi Hsieh, Cheng-Kang Lu, Ming-Huang Fu
  • Publication number: 20100258838
    Abstract: A packaging substrate device includes: a first laminate including a first ceramic substrate and a first copper pattern disposed on an upper surface of the first ceramic substrate; and a second laminate disposed over the first copper pattern and including a second ceramic substrate, a second copper pattern that is disposed on an upper surface of the second ceramic substrate, and a through hole extending through the second ceramic substrate and the second copper pattern to expose a copper portion of the first copper pattern. A light emitting semiconductor die can be mounted on the copper portion within the through hole. Efficient heat dissipation can be achieved through the first laminate.
    Type: Application
    Filed: April 2, 2010
    Publication date: October 14, 2010
    Applicant: High Conduction Scientific Co., Ltd.
    Inventors: Wen-Chung Chiang, Keng-Chung Wu, Ying-Chi Hsieh, Cheng-Kang Lu, Ming-Huang Fu
  • Publication number: 20100236819
    Abstract: A method for making a printed circuit board includes: (a) preparing a laminate having a ceramic substrate, first and second metal foils disposed on two opposite surfaces of the ceramic substrate, and a through hole extending through the ceramic substrate and the first and second metal foils; (b) filling the through hole with a metal paste such that the metal paste is in contact with the first and second metal foils; and (c) sintering the metal paste and the laminate such that the metal paste is connected electrically to the first and second metal foils. A printed circuit board made according to the method is also disclosed.
    Type: Application
    Filed: March 15, 2010
    Publication date: September 23, 2010
    Applicant: High Conduction Scientific Co., Ltd.
    Inventors: Wen-Chung Chiang, Keng-Chung Wu, Ying-Chi Hsieh, Cheng-Kang Lu, Ming-Huang Fu
  • Publication number: 20100230156
    Abstract: A method for making a packaging device for an electronic element includes: preparing a ceramic frame body defined with a hollow space for receiving the electronic element therein; preparing a ceramic substrate having a copper layer formed thereon; etching the copper layer to form a predetermined copper pattern on an upper surface of the ceramic substrate; placing the ceramic frame body onto the upper surface of the ceramic substrate and in contact with the copper pattern ; and heating the ceramic frame body and the ceramic substrate such that the copper pattern bonds the ceramic frame body to the ceramic substrate. A packaging device for an electronic element is also disclosed.
    Type: Application
    Filed: March 9, 2010
    Publication date: September 16, 2010
    Applicant: High Conduction Scientific Co., Ltd.
    Inventors: Wen-Chung Chiang, Keng-Chung Wu, Ying-Chi Hsieh, Cheng-Kang Lu, Ming-Huang Fu
  • Patent number: 7761648
    Abstract: A caching method provides a cashing mechanism between a logical addresses and a flash memory physical addresses. The caching mechanism involves a search tree which contains a number of internal and external translation nodes. Each external translation node points to a link list of translation units, and each translation unit records a range of logical addresses and the corresponding range of physical addresses, in addition to a version value. By traversing the search tree to reach a translation unit, the physical address of a target logical address can be determined in an efficient manner. The version value of the translation unit can be used to determine the space taken up for storing the mapping of the logical and physical addresses should be released for reuse.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: July 20, 2010
    Assignee: Genesys Logic, Inc.
    Inventors: Chin-hsien Wu, Tei-wei Kuo, Hsiang-chi Hsieh
  • Publication number: 20100036971
    Abstract: A processing unit, a portable electrical device and an auto-run method thereof are described. The processing unit of the portable electrical device has a kernel program memory area where a virtual memory device is established. Then, a virtual auto-run file is stored in the virtual memory device. When the portable electrical device is electrically connected to an electronic apparatus, the electronic apparatus automatically executes at least one predetermined operation on the portable electrical device according to the virtual auto-run file.
    Type: Application
    Filed: April 27, 2009
    Publication date: February 11, 2010
    Inventors: Hsiang-chi Hsieh, Chi-hung Chiang, Hung-lin Liu, Chiun-wu Chang
  • Publication number: 20090309426
    Abstract: A power management system is described. The power management system includes an input power selecting unit, a charging control unit and a power switching control unit. The input power selecting unit receives a plurality of input power sources for selecting one of the input power sources to be inputted to the electronic apparatus. The charging control unit includes a charging controller and a battery. The charging controller receives a charge-enabling signal. The battery is charged by a second voltage and selectively supplies a battery power. The power switching control unit outputs a driving voltage to drive the electrical apparatus based on an adaptor-enabling signal and a power-detecting signal when the power switching control unit switches the input power sources and the battery power to select one of the input power sources and the battery power.
    Type: Application
    Filed: August 18, 2009
    Publication date: December 17, 2009
    Applicant: Genesys Logic, Inc.
    Inventors: Hsiang-chi Hsieh, Chin-ching Chan
  • Publication number: 20090198860
    Abstract: An integrated data accessing system having control apparatus for multi-directional data transmission is described. The integrated data accessing system includes a control apparatus, a plurality of communication interface engines. The control apparatus includes a plurality of bi-directional transmission modules, a control unit, a multi-directional transferring engine, and a memory unit. The control unit detects a source storage and a target storage. The multi-directional transferring engine selectively transfers the data content among storage units. The multi-directional transferring engine includes a first switch module, a second switch module, and a data buffer. The first switch module switches to the first bi-directional transmission module to select the source storage. The second switch module switches to the second bi-directional transmission module to select the target storage. The data buffer stores the data content transmitted from the source storage and the target storage.
    Type: Application
    Filed: March 18, 2009
    Publication date: August 6, 2009
    Applicant: GENESYS LOGIC, INC.
    Inventors: Chih-kang Pan, Hsiang-chi Hsieh
  • Publication number: 20090198877
    Abstract: A system, a controller, and a method for data storage are provided. The system includes a first storage unit, a second storage unit, and a controller. The first storage unit comprises a single-layer structure for storing data, and the second storage unit comprises a multi-layer structure for storing data. The controller is coupled to the first storage unit, the second storage unit, and a host and controls the host to set the first storage unit as a master storage device and set the second storage unit as a slave storage device. As a result, the host can recognize the first storage unit and the second storage unit as two independent storage devices for storing data. Thereby, the data storage process can be simplified.
    Type: Application
    Filed: July 18, 2008
    Publication date: August 6, 2009
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Khein-Seng Pua, Chung-Hsun Ma, Ming-Jen Liang, Cheng-Chi Hsieh, Chih-Ling Wang
  • Patent number: 7467526
    Abstract: A desalinating process is disclosed. The process comprises freezing sea water as ice of sea water, exerting an external force on the ice of sea water to separate salt therefrom for converting the ice of sea water into ice of fresh water, storing the salt and the ice of fresh water in two different places, and melting the ice of fresh water to produce drinkable fresh water.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: December 23, 2008
    Inventor: Hsuan-Chi Hsieh
  • Publication number: 20080303352
    Abstract: An automatic charging and power management device includes a charging control unit and at least one power switching control unit. The charging control unit is connected to a rechargeable battery and an input power source to control the charging operation to the rechargeable battery. The input power source can be a USB-interfaced power source or a rectification transformer based power source. The power switching control unit connects the input power source and is provided with at least one power input terminal, a charging control terminal, a charging voltage terminal, a system actuation switch, a system actuation terminal, a power type terminal, and at least one power output terminal. The charging control terminal and the charging voltage terminal are connected to the charging control unit. The system actuation terminal is actuated on/off by the system actuation switch to generate a system actuation signal. The power type terminal generates an identification signal based on the type of the input power source.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 11, 2008
    Applicant: Genesys Logic, Inc.
    Inventors: Hsiang-chi Hsieh, Chin-ching Chan
  • Patent number: 7461198
    Abstract: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive segment, and each segment is configured to include at least a consecutive frame. Each frame is configured to include at least a consecutive page. Each virtual memory region is configured to include a plurality of areas, and each area is configured to include at least a virtual erase unit. The memory logical block region is configured to include a plurality of clusters, and each cluster includes at least a consecutive memory logical block.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: December 2, 2008
    Assignee: Genesys Logic, Inc.
    Inventors: Yi-Lin Tsai, Tei-Wei Kuo, Jen-Wei Hsieh, Yuan-Hao Chang, Hsiang-Chi Hsieh
  • Patent number: 7461233
    Abstract: A highly efficient data characteristic identification method for flash memory is provided, including the steps of: (a) based on the LBA corresponding to the write request to the flash memory, finding K corresponding counters in the hash table through K hash functions; (b) determining whether to perform decay period computation on hash table; if so, proceeding to step (c); otherwise, proceeding to step (d); (c) performing decay period computation on the hash table; (d) performing state update computation on the hash table; and (e) checking the hash table state and determining whether the data in the logic block corresponding to the flash memory is frequently updated. The method contains the decay period computation, state update computation, and checking on the data in the corresponding counters in the hash table to determine whether the data is frequently updated. Therefore, the object of a highly efficient data access characteristic identification method for flash memory is provided.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: December 2, 2008
    Assignee: Genesys Logic, Inc.
    Inventors: Jen-Wei Hsieh, Li-Pin Chang, Tei-Wei Kuo, Hsiang-Chi Hsieh
  • Publication number: 20080285958
    Abstract: Disclosed is a storage apparatus for digital TV video/analog TV video/digital audio broadcasting/analog audio broadcasting media (DTV/ATV/DAB/AAB). The storage apparatus comprises a controller, a DTV/ATV/DAB/AAB interface converter and at least one storage media interfaces. The controller has a plurality of terminals for controlling the storage apparatus. The DTV/ATV/DAB/AAB interface converter connects to one of the terminals and a digital/analog tuner to receive DTV/ATV/DAB/AAB signals and converts the DTV/ATV/DAB/AAB signals into DTV/ATV/DAB/AAB data. The storage media interfaces respectively connect to the terminals of the controller and to at least one portable storage media, for storing the DTV/ATV/DAB/AAB data received from the DTV/ATV/DAB/AAB interface converter into the portable storage media. The controller can be an OTG controller.
    Type: Application
    Filed: May 14, 2008
    Publication date: November 20, 2008
    Applicant: GENESYS LOGIC, INC.
    Inventors: Wen-ming Huang, Ching-chun Huang, Chi-wei Hsiao, Wen-fu Tsai, Hsin-ching Yin, Hsiang-chi Hsieh, Yu-feng Lin
  • Publication number: 20080282010
    Abstract: An audio data storage and playback apparatus is provided, including at least a USB hub or USB SIE, at least a storage media interface, and an audio codec. An upstream port of the USB hub or the USB SIE is connected to an electronic device with a USB interface. The storage media interface is connected to a downstream port of the USB hub or an endpoint of a USB SIE. The storage media interface can be connected to a portable storage media, such as flash memory, CD-R/W, DVD-R/W, and hard disk drive, to enable bi-directional data transmission and storage between the electronic device with a USB interface and the portable storage media connected to the storage media interface. The audio codec player forms a bi-directional data transmission connection with the storage media interface. The audio codec player is connected to at least an audio player and an audio input device.
    Type: Application
    Filed: May 11, 2007
    Publication date: November 13, 2008
    Inventors: Wen-Ming Huang, Ching-Chun Huang, Chi-Wei Hsiao, Wen-Fu Tsai, Hsin-Ching Yin, Hsiang-Chi Hsieh, Yu-Feng Lin
  • Publication number: 20080282092
    Abstract: A card reading apparatus integrating identification function is provided, including a USB interface, a memory card interface, an ATA/ATAPI interface, a USB OTG controller, an identification interface module, an encrypted identification processor, and at least an identification device. The USB interface, the memory card interface, and the ATA/ATAPI interface are connected respectively to a USB interface media device, a flash memory card, and a data storage device, such as hard disk or CD-RW. The USB OTG controller is connected to the USB interface, the memory card interface, and the ATA/ATAPI interface so that the USB interface media device, the flash memory card, and the data storage device can exchange data under the control of the USB OTG controller. The identification interface module is connected to the USB OTG controller, the encrypted identification processor is connected to the identification interface module, and the identification device is connected to the encrypted identification processor.
    Type: Application
    Filed: May 11, 2007
    Publication date: November 13, 2008
    Inventors: Chih Kang Pan, Yao-Shun Hung, Hsiang-Chi Hsieh