Patents by Inventor Chi Wang

Chi Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250081354
    Abstract: A method of manufacturing an electronic device includes providing a substrate with a predetermined first-hole region, a first surface, and a second surface. The second surface is opposite the first surface. The method includes laser processing the predetermined first-hole region from the first surface to form a first laser track and laser processing the predetermined first-hole region from the first surface to form a second laser track. The first laser track does not overlap the second laser track. The method further includes etching the predetermined first-hole region to form a first-hole.
    Type: Application
    Filed: July 24, 2024
    Publication date: March 6, 2025
    Inventors: Cheng-Chi WANG, Tzu-Yen CHIU, I-Chang LIANG, Chen-Fang HSIAO, Jui-Jen YUEH
  • Patent number: 12236627
    Abstract: A system and method for measuring circumference of human body are provided. The system includes a 3D sensor configured to obtain a 3D information of a human body with a garment on; a temperature sensor configured to obtain a thermal information of the human body with the garment on; a calibration unit configured to obtain a calibration parameter of the 3D sensor and the temperature sensor; a model generation unit configured to integrate the 3D information and the thermal information according to the calibration parameter to generate a 3D temperature model of the human body with the garment on; and a circumference computation unit configured to retrieve an original profile information corresponding to a target location from the 3D temperature model, and correct the original profile information according to a thermal compensation mechanism to obtain a real circumference of the human body corresponding to the target location.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: February 25, 2025
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Shang-Yi Lin, Tung-Fa Liou, Chuan-Chi Wang
  • Patent number: 12238863
    Abstract: An electronic device is provided. The electronic device includes a substrate structure, a control unit, a first circuit structure, and an electronic unit. The substrate structure has a conductive via pattern and a dummy via pattern. The control unit is electrically connected to the conductive via pattern. The first circuit structure is electrically connected to the conductive via pattern. The electronic unit is electrically connected to the control unit through the first circuit structure. The dummy via pattern is electrically insulated from the first circuit structure.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: February 25, 2025
    Assignee: INNOLUX CORPORATION
    Inventors: Cheng-Chi Wang, Kuan-Feng Lee, Jui-Jen Yueh
  • Publication number: 20250061261
    Abstract: The present disclosure provides a method and an apparatus for arranging electrical components within a semiconductor device, and a non-transitory computer-readable medium. The method includes (a) providing a first layout including a plurality of cells placed therein; (b) generating a second layout by performing a first set of calculations on the first layout such that cell congestions in the first layout is eliminated from the second layout; (c) generating a third layout by performing a second set of calculations on the second layout such that the total wire length of the third layout is less than that of the second layout; and (d) iterating the operations (b) and (c) until a target layout conforming a convergence criterion.
    Type: Application
    Filed: November 5, 2024
    Publication date: February 20, 2025
    Inventors: TING-CHI WANG, WAI-KEI MAK, KUAN-YU CHEN, HSIU-CHU HSU, HSUAN-HAN LIANG, SHENG-HSIUNG CHEN
  • Patent number: 12230558
    Abstract: The present disclosure provides a package device and a manufacturing method thereof. The package device includes an electronic device, a conductive pad having a first bottom surface, and a redistribution layer disposed between the conductive pad and the electronic device. The redistribution layer has a second bottom surface, and the conductive pad is electrically connected to the electronic device through the redistribution layer. The first bottom surface is closer to the electronic device than the second bottom in a normal direction of the electronic device.
    Type: Grant
    Filed: October 5, 2022
    Date of Patent: February 18, 2025
    Assignee: InnoLux Corporation
    Inventors: Hsueh-Hsuan Chou, Chia-Chieh Fan, Kuan-Jen Wang, Cheng-Chi Wang, Yi-Hung Lin, Li-Wei Sung
  • Patent number: 12229073
    Abstract: In one embodiment, an apparatus includes: a plurality of cores to execute instructions; a firmware agent to execute a first firmware; a Peripheral Component Interconnect Express (PCIe) interface to communicate with a device via a PCIe link; and a boot agent coupled to the PCIe interface to download the PCIe firmware from a non-volatile memory and provide the PCIe firmware to the PCIe interface. The PCIe interface may receive a PCIe firmware for the PCIe interface before the firmware agent is to receive the first firmware. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: February 18, 2025
    Assignee: Intel Corporation
    Inventors: Amit Kumar Srivastava, Divya Gupta, Michael Karas, James Mitchell, Malay Trivedi, Chung-Chi Wang
  • Patent number: 12223407
    Abstract: In automated machine learning, an approximate best configuration can be selected among multiple candidate machine-learning configurations by progressively sampling training and test datasets for the iterative training and testing of the configurations while progressively pruning the set of candidate configurations based on associated estimated confidence intervals for their respective performance.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: February 11, 2025
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Chi Wang, Silu Huang, Surajit Chaudhuri, Bolin Ding
  • Patent number: 12224226
    Abstract: An electronic device is disclosed. The electronic device includes a circuit layer, an electronic element and a thermal conducting element. The electronic element is disposed on the circuit layer and electrically connected to the circuit layer. The thermal conducting element is disposed between the circuit layer and the electronic element. The thermal conducting element is used for performing heat exchange with the electronic element.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: February 11, 2025
    Assignee: InnoLux Corporation
    Inventors: Chin-Lung Ting, Chung-Kuang Wei, Cheng-Chi Wang, Yeong-E Chen, Yi-Hung Lin
  • Patent number: 12224339
    Abstract: An HEMT includes an aluminum gallium nitride layer. A gallium nitride layer is disposed below the aluminum gallium nitride layer. A zinc oxide layer is disposed under the gallium nitride layer. A source electrode and a drain electrode are disposed on the aluminum gallium nitride layer. A gate electrode is disposed on the aluminum gallium nitride layer and between the drain electrode and the source electrode.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: February 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Ming Hsu, Yu-Chi Wang, Yen-Hsing Chen, Tsung-Mu Yang, Yu-Ren Wang
  • Publication number: 20250041227
    Abstract: Provided herein are heterocyclic derivative compounds and tablet pharmaceutical compositions comprising said compounds that are useful for the treatment of retinal binding protein (RBP4) related diseases, such as macular degeneration and the like.
    Type: Application
    Filed: November 22, 2022
    Publication date: February 6, 2025
    Inventors: Irene Cheng-Chi WANG, Tom Yu-Hsin WANG
  • Publication number: 20250046623
    Abstract: The application relates to a method for manufacturing an electronic device, and in particular, to a method for manufacturing an electronic device with a carrier substrate. The method includes: providing a carrier substrate; forming a first base layer on the carrier substrate; forming a working unit on the first base layer, performing a detection step on the working unit to identify whether a defect is present, wherein the detection step includes automated optical inspection (AOI), electrical detection, or a combination thereof; and repairing the electronic device.
    Type: Application
    Filed: October 18, 2024
    Publication date: February 6, 2025
    Inventors: Yeong-E CHEN, Cheng-En CHENG, Yu-Ting LIU, Cheng-Chi WANG
  • Publication number: 20250038089
    Abstract: An electronic device includes a first metal layer, a first insulating layer disposed on the first metal layer, a second metal layer, a second insulating layer, a third metal layer, a third insulating layer, a fourth metal layer, a fourth insulating layer and an electronic component. The second metal layer is disposed on the first insulating layer. The second insulating layer is disposed on the second metal layer. The third metal layer is disposed on the second insulating layer. The third insulating layer is disposed on the third metal layer. The fourth metal layer is disposed on the third insulating layer. The fourth insulating layer is disposed on the fourth metal layer. The electronic component is disposed on the fourth insulating layer and electrically connected to the fourth metal layer. A Young's modulus of the third insulating layer is less than a Young's modulus of the first insulating layer.
    Type: Application
    Filed: October 13, 2024
    Publication date: January 30, 2025
    Applicant: Innolux Corporation
    Inventors: Hung-Sheng Chou, Wen-Hsiang Liao, Kuo-Jung Fan, Heng-Shen Yeh, Cheng-Chi Wang
  • Patent number: 12212761
    Abstract: The present invention provides an encoder including a quantization circuit, a control circuit and an encoding circuit is disclosed. The quantization circuit is configured to generate quantized data corresponding to a CTU according to image data, wherein the CTU comprises at least one TU. The control circuit is configured to determine a number of allocated bits for each TU in the CTU, where the number of allocated bits for each TU is determined based on a sum of remaining bits of the TUs that have been encoded. The encoding circuit is configured to encode each TU to obtain encoded data according to the number of allocated bits of the TU in the CTU.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: January 28, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Weimin Zeng, Chi-Wang Chai, Wei Pu, Wujun Chen, Wei Li
  • Publication number: 20250029910
    Abstract: An electronic component includes a first electronic unit including a plurality of pads, a first conductive layer, a second conductive layer, a first insulating layer having a first thickness, a second insulating layer having a second thickness, a second electronic unit, and a solder ball. The first conductive layer is disposed between the first electronic unit and the second conductive layer, and electrically connected to at least one of the pads through a conductive via. The first insulating layer is disposed between the first conductive layer and the second conductive layer. The second conductive layer is disposed between the first insulating layer and the second insulating layer. The first thickness is different from the second thickness. The second conductive layer is disposed between the first conductive layer and the second electronic unit. The second conductive layer is electrically connected to the second electronic unit through the solder ball.
    Type: Application
    Filed: October 8, 2024
    Publication date: January 23, 2025
    Applicant: Innolux Corporation
    Inventors: Yeong-E Chen, Yi-Hung Lin, Cheng-En Cheng, Wen-Hsiang Liao, Cheng-Chi Wang
  • Publication number: 20250020852
    Abstract: A light guide plate includes a light incident surface, a first surface connected to the light incident surface, and a plurality of optical microstructures disposed on the first surface. Each optical microstructure has a first cross-sectional profile along a first direction and a second cross-sectional profile along a second direction perpendicular to the first direction. The first cross-sectional profile is different from the second cross-sectional profile. The optical microstructures include a plurality of first optical microstructures and a plurality of second optical microstructures. The second cross-sectional profile of each first optical microstructure is different from the second cross-sectional profile of each second optical microstructure. A light source module including the light guide plate projects light into the light incident surface.
    Type: Application
    Filed: March 8, 2024
    Publication date: January 16, 2025
    Applicant: CM Visual Technology Corporation
    Inventors: Tsang-Chi Wang, Hsin Wen Chang, Hung Yu Lin, Yung Pin Chen
  • Patent number: 12200254
    Abstract: A three-dimensional data encoding method includes: generating combined point cloud data by combining pieces of point cloud data; and generating a bitstream by encoding the combined point cloud data. The bitstream includes (i) first information indicating a maximum number of duplicated points that are included in each of the pieces of point cloud data and are three-dimensional points having same geometry information, and (ii) pieces of second information corresponding one-to-one with point indexes and each indicating which of the pieces of point cloud data three-dimensional points having a corresponding one of the point indexes belong to, the point indexes being indexes to which values a total number of which is equal to the maximum number are assigned, and being used for identifying duplicated points belonging to same point cloud data.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: January 14, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Toshiyasu Sugio, Noritaka Iguchi, Chung Dean Han, Chi Wang, Pongsak Lasang
  • Publication number: 20250014913
    Abstract: An electronic device includes a wafer, a redistribution layer and a multi-layer insulating structure. The redistribution layer is disposed on the wafer. The multi-layer insulating structure is disposed between the wafer and the redistribution layer. The multi-layer insulating structure includes a first layer and a second layer. A Young's modulus of the first layer is different from a Young's modulus of the second layer.
    Type: Application
    Filed: September 23, 2024
    Publication date: January 9, 2025
    Applicant: Innolux Corporation
    Inventors: Yi-Hung Lin, Wen-Hsiang Liao, Cheng-Chi Wang, Yi-Chen Chou, Fuh-Tsang Wu, Ker-Yih Kao
  • Patent number: 12193182
    Abstract: A hot-swappable electronic device and a method for preventing crash of the same are provided. The method includes: detecting, by a controller, whether or not the hot-swappable electronic device is in a power-on state; detecting, by the controller, whether or not a power connection port is connected to an alternating current power source when the hot-swappable electronic device is in the power-on state; detecting, by a first sensor and a second sensor, whether or not a first battery leaves a first battery installation groove and a second battery leaves a second battery installation groove when the power connection port is not connected to the alternating current power source; and lowering, by the controller, a system power consumption of the hot-swappable electronic device when the first battery leaves the first battery installation groove or the second battery leaves the second battery installation groove.
    Type: Grant
    Filed: March 8, 2023
    Date of Patent: January 7, 2025
    Assignee: Getac Technology Corporation
    Inventor: Chun-Chi Wang
  • Patent number: 12187538
    Abstract: A method for calculating an object pick-and-place sequence and an electronic apparatus for automatic storage pick-and-place are provided. When a warehousing operation is to be performed, the following steps are performed. A weight of an object to be stocked that is to be put on a shelf is obtained. The weight is substituted into a plurality of coordinate positions corresponding to a plurality of unused grid positions respectively, so as to calculate a plurality of estimated center of gravity positions. Whether the estimated center of gravity positions are located within a balance standard area is determined so as to sieve out a plurality of candidate grid positions from these unused grid positions. One of the candidate grid positions is selected as a recommended position of the object to be stocked.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: January 7, 2025
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Chia-Lin Li, Shang-Chi Wang, Chi Yuan Hsu, Han-Zong Wu
  • Patent number: 12191887
    Abstract: A three-dimensional data encoding method includes: generating an N-ary tree structure of three-dimensional points included in three-dimensional data, where N is an integer greater than or equal to 2; generating first encoded data by encoding a first branch using a first encoding process, the first branch having, as a root, a first node included in a first layer that is one of layers included in the N-ary tree structure; generating second encoded data by encoding a second branch using a second encoding process different from the first encoding process, the second branch having, as a root, a second node included in the first layer and different from the first node; and generating a bitstream including the first encoded data and the second encoded data.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: January 7, 2025
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chi Wang, Pongsak Lasang, Toshiyasu Sugio, Tatsuya Koyama